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Rev 3192 Rev 3764
Line 55... Line 55...
55 
/*
 55 
/*
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 * check if the chipset is supported
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 * check if the chipset is supported
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 */
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 */
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static int r600_audio_chipset_supported(struct radeon_device *rdev)
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static int r600_audio_chipset_supported(struct radeon_device *rdev)
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{
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{
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	return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE6(rdev))
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	return ASIC_IS_DCE2(rdev) && !ASIC_IS_DCE6(rdev);
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		|| rdev->family == CHIP_RS600
 - 
 
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		|| rdev->family == CHIP_RS690
 - 
 
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		|| rdev->family == CHIP_RS740;
 - 
 
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}
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}
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 62 
 
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struct r600_audio r600_audio_status(struct radeon_device *rdev)
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struct r600_audio r600_audio_status(struct radeon_device *rdev)
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{
 64 
{
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 179 
 
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	return 0;
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	return 0;
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}
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}
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 - 
 
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/*
 - 
 
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 * atach the audio codec to the clock source of the encoder
 - 
 
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 */
 - 
 
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void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
 - 
 
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{
 - 
 
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	struct drm_device *dev = encoder->dev;
 - 
 
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	struct radeon_device *rdev = dev->dev_private;
 - 
 
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	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
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	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
 - 
 
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	struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
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	int base_rate = 48000;
 - 
 
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 - 
 
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	switch (radeon_encoder->encoder_id) {
 - 
 
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	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
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	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
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		WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
 - 
 
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		break;
 - 
 
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	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
 - 
 
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	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
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	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
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	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
 - 
 
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		WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
 - 
 
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		break;
 - 
 
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	default:
 - 
 
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		dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
 - 
 
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			  radeon_encoder->encoder_id);
 - 
 
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		return;
 - 
 
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	}
 - 
 
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 - 
 
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	if (ASIC_IS_DCE4(rdev)) {
 - 
 
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		/* TODO: other PLLs? */
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		WREG32(EVERGREEN_AUDIO_PLL1_MUL, base_rate * 10);
 - 
 
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		WREG32(EVERGREEN_AUDIO_PLL1_DIV, clock * 10);
 - 
 
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		WREG32(EVERGREEN_AUDIO_PLL1_UNK, 0x00000071);
 - 
 
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 - 
 
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		/* Select DTO source */
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		WREG32(0x5ac, radeon_crtc->crtc_id);
 - 
 
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	} else {
 - 
 
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	switch (dig->dig_encoder) {
 - 
 
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	case 0:
 - 
 
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		WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
 - 
 
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		WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
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		WREG32(R600_AUDIO_CLK_SRCSEL, 0);
 - 
 
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		break;
 - 
 
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 - 
 
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	case 1:
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		WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
 - 
 
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		WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
 - 
 
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		WREG32(R600_AUDIO_CLK_SRCSEL, 1);
 - 
 
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		break;
 - 
 
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	default:
 - 
 
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			dev_err(rdev->dev,
 - 
 
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				"Unsupported DIG on encoder 0x%02X\n",
 - 
 
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			  radeon_encoder->encoder_id);
 - 
 
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		return;
 - 
 
241 
	}
 - 
 
242 
	}
 - 
 
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}
 - 
 
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 182 
 
245 
/*
 183 
/*
246 
 * release the audio timer
 184 
 * release the audio timer
247 
 * TODO: How to do this correctly on SMP systems?
 185 
 * TODO: How to do this correctly on SMP systems?
248 
 */
 186 
 */