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1709 | return radeon_debugfs_add_files(rdev, r600_mc_info_list, ARRAY_SIZE(r600_mc_info_list)); |
1709 | return radeon_debugfs_add_files(rdev, r600_mc_info_list, ARRAY_SIZE(r600_mc_info_list)); |
1710 | #else |
1710 | #else |
1711 | return 0; |
1711 | return 0; |
1712 | #endif |
1712 | #endif |
1713 | }=>1); |
1713 | } |
- | 1714 | ||
- | 1715 | /** |
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- | 1716 | * r600_ioctl_wait_idle - flush host path cache on wait idle ioctl |
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- | 1717 | * rdev: radeon device structure |
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- | 1718 | * bo: buffer object struct which userspace is waiting for idle |
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- | 1719 | * |
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- | 1720 | * Some R6XX/R7XX doesn't seems to take into account HDP flush performed |
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- | 1721 | * through ring buffer, this leads to corruption in rendering, see |
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- | 1722 | * http://bugzilla.kernel.org/show_bug.cgi?id=15186 to avoid this we |
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- | 1723 | * directly perform HDP flush by writing register through MMIO. |
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- | 1724 | */ |
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- | 1725 | void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo) |
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- | 1726 | { |
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- | 1727 | WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1); |
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- | 1728 | }=>1); |