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Rev 5271 Rev 6104
Line 48... Line 48...
48 
 *   the CP read collide with the flush somehow, or maybe the MC, hard to
 48 
 *   the CP read collide with the flush somehow, or maybe the MC, hard to
49 
 *   tell. (Jerome Glisse)
 49 
 *   tell. (Jerome Glisse)
50 
 */
 50 
 */
Line 51... Line 51...
51 
 
 51 
 
- 
 
 52 
/*
- 
 
 53 
 * Indirect registers accessor
- 
 
 54 
 */
- 
 
 55 
uint32_t rv370_pcie_rreg(struct radeon_device *rdev, uint32_t reg)
- 
 
 56 
{
- 
 
 57 
	unsigned long flags;
- 
 
 58 
	uint32_t r;
- 
 
 59 
 
- 
 
 60 
	spin_lock_irqsave(&rdev->pcie_idx_lock, flags);
- 
 
 61 
	WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask));
- 
 
 62 
	r = RREG32(RADEON_PCIE_DATA);
- 
 
 63 
	spin_unlock_irqrestore(&rdev->pcie_idx_lock, flags);
- 
 
 64 
	return r;
- 
 
 65 
}
- 
 
 66 
 
- 
 
 67 
void rv370_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
- 
 
 68 
{
- 
 
 69 
	unsigned long flags;
- 
 
 70 
 
- 
 
 71 
	spin_lock_irqsave(&rdev->pcie_idx_lock, flags);
- 
 
 72 
	WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask));
- 
 
 73 
	WREG32(RADEON_PCIE_DATA, (v));
- 
 
 74 
	spin_unlock_irqrestore(&rdev->pcie_idx_lock, flags);
- 
 
 75 
}
- 
 
 76 
 
52 
/*
 77 
/*
53 
 * rv370,rv380 PCIE GART
 78 
 * rv370,rv380 PCIE GART
54 
 */
 79 
 */
Line 55... Line 80...
55 
static int rv370_debugfs_pcie_gart_info_init(struct radeon_device *rdev);
 80 
static int rv370_debugfs_pcie_gart_info_init(struct radeon_device *rdev);
Line 71... Line 96...
71 
 
 96 
 
72 
#define R300_PTE_UNSNOOPED (1 << 0)
 97 
#define R300_PTE_UNSNOOPED (1 << 0)
73 
#define R300_PTE_WRITEABLE (1 << 2)
 98 
#define R300_PTE_WRITEABLE (1 << 2)
Line 74... Line 99...
74 
#define R300_PTE_READABLE  (1 << 3)
 99 
#define R300_PTE_READABLE  (1 << 3)
75 
 
 - 
 
76 
void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i,
 100 
 
77 
			      uint64_t addr, uint32_t flags)
 - 
 
78 
{
 - 
 
79 
	void __iomem *ptr = rdev->gart.ptr;
 101 
uint64_t rv370_pcie_gart_get_page_entry(uint64_t addr, uint32_t flags)
80 
 
 102 
{
81 
	addr = (lower_32_bits(addr) >> 8) |
 103 
	addr = (lower_32_bits(addr) >> 8) |
82 
		((upper_32_bits(addr) & 0xff) << 24);
 104 
		((upper_32_bits(addr) & 0xff) << 24);
83 
	if (flags & RADEON_GART_PAGE_READ)
 105 
	if (flags & RADEON_GART_PAGE_READ)
84 
		addr |= R300_PTE_READABLE;
 106 
		addr |= R300_PTE_READABLE;
85 
	if (flags & RADEON_GART_PAGE_WRITE)
 107 
	if (flags & RADEON_GART_PAGE_WRITE)
86 
		addr |= R300_PTE_WRITEABLE;
 108 
		addr |= R300_PTE_WRITEABLE;
- 
 
 109 
	if (!(flags & RADEON_GART_PAGE_SNOOP))
- 
 
 110 
		addr |= R300_PTE_UNSNOOPED;
- 
 
 111 
	return addr;
- 
 
 112 
}
- 
 
 113 
 
- 
 
 114 
void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i,
- 
 
 115 
			      uint64_t entry)
- 
 
 116 
{
87 
	if (!(flags & RADEON_GART_PAGE_SNOOP))
 117 
	void __iomem *ptr = rdev->gart.ptr;
88 
		addr |= R300_PTE_UNSNOOPED;
 118 
 
89 
	/* on x86 we want this to be CPU endian, on powerpc
 119 
	/* on x86 we want this to be CPU endian, on powerpc
90 
	 * on powerpc without HW swappers, it'll get swapped on way
 120 
	 * on powerpc without HW swappers, it'll get swapped on way
91 
	 * into VRAM - so no need for cpu_to_le32 on VRAM tables */
 121 
	 * into VRAM - so no need for cpu_to_le32 on VRAM tables */
Line 92... Line 122...
92 
	writel(addr, ((void __iomem *)ptr) + (i * 4));
 122 
	writel(entry, ((void __iomem *)ptr) + (i * 4));
93 
}
 123 
}
94 
 
 124 
 
Line 107... Line 137...
107 
	r = rv370_debugfs_pcie_gart_info_init(rdev);
 137 
	r = rv370_debugfs_pcie_gart_info_init(rdev);
108 
	if (r)
 138 
	if (r)
109 
		DRM_ERROR("Failed to register debugfs file for PCIE gart !\n");
 139 
		DRM_ERROR("Failed to register debugfs file for PCIE gart !\n");
110 
	rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
 140 
	rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
111 
	rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush;
 141 
	rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush;
- 
 
 142 
	rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry;
112 
	rdev->asic->gart.set_page = &rv370_pcie_gart_set_page;
 143 
	rdev->asic->gart.set_page = &rv370_pcie_gart_set_page;
113 
	return radeon_gart_table_vram_alloc(rdev);
 144 
	return radeon_gart_table_vram_alloc(rdev);
114 
}
 145 
}
Line 115... Line 146...
115 
 
 146 
 
Line 1409... Line 1440...
1409 
}
 1440 
}
Line -... Line 1441...
- 
 
 1441 
 
- 
 
 1442 
 
- 
 
 1443 
 
- 
 
 1444 
 
- 
 
 1445 
void r300_fini(struct radeon_device *rdev)
- 
 
 1446 
{
- 
 
 1447 
	radeon_pm_fini(rdev);
- 
 
 1448 
	r100_cp_fini(rdev);
- 
 
 1449 
	radeon_wb_fini(rdev);
- 
 
 1450 
	radeon_ib_pool_fini(rdev);
- 
 
 1451 
	radeon_gem_fini(rdev);
- 
 
 1452 
	if (rdev->flags & RADEON_IS_PCIE)
- 
 
 1453 
		rv370_pcie_gart_fini(rdev);
- 
 
 1454 
	if (rdev->flags & RADEON_IS_PCI)
- 
 
 1455 
		r100_pci_gart_fini(rdev);
- 
 
 1456 
	radeon_agp_fini(rdev);
- 
 
 1457 
	radeon_irq_kms_fini(rdev);
- 
 
 1458 
	radeon_fence_driver_fini(rdev);
- 
 
 1459 
	radeon_bo_fini(rdev);
Line 1410... Line 1460...
1410 
 
 1460 
	radeon_atombios_fini(rdev);
1411 
 
 1461 
	kfree(rdev->bios);
1412 
 
 1462 
	rdev->bios = NULL;
Line 1487... Line 1537...
1487 
	rdev->accel_working = true;
 1537 
	rdev->accel_working = true;
1488 
	r = r300_startup(rdev);
 1538 
	r = r300_startup(rdev);
1489 
	if (r) {
 1539 
	if (r) {
1490 
		/* Something went wrong with the accel init, so stop accel */
 1540 
		/* Something went wrong with the accel init, so stop accel */
1491 
		dev_err(rdev->dev, "Disabling GPU acceleration\n");
 1541 
		dev_err(rdev->dev, "Disabling GPU acceleration\n");
- 
 
 1542 
		r100_cp_fini(rdev);
- 
 
 1543 
		radeon_wb_fini(rdev);
- 
 
 1544 
		radeon_ib_pool_fini(rdev);
- 
 
 1545 
		radeon_irq_kms_fini(rdev);
1492 
		if (rdev->flags & RADEON_IS_PCIE)
 1546 
		if (rdev->flags & RADEON_IS_PCIE)
1493 
			rv370_pcie_gart_fini(rdev);
 1547 
			rv370_pcie_gart_fini(rdev);
1494 
		if (rdev->flags & RADEON_IS_PCI)
 1548 
		if (rdev->flags & RADEON_IS_PCI)
1495 
			r100_pci_gart_fini(rdev);
 1549 
			r100_pci_gart_fini(rdev);
1496 
		rdev->accel_working = false;
 1550 
		rdev->accel_working = false;