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| Rev 5078 | Rev 5271 | ||
|---|---|---|---|
| Line 21... | Line 21... | ||
| 21 | * |
21 | * |
| 22 | */ |
22 | */ |
| Line 23... | Line 23... | ||
| 23 | 23 | ||
| 24 | #include "drmP.h" |
24 | #include "drmP.h" |
| - | 25 | #include "radeon.h" |
|
| 25 | #include "radeon.h" |
26 | #include "radeon_asic.h" |
| 26 | #include "nid.h" |
27 | #include "nid.h" |
| 27 | #include "r600_dpm.h" |
28 | #include "r600_dpm.h" |
| 28 | #include "ni_dpm.h" |
29 | #include "ni_dpm.h" |
| 29 | #include "atom.h" |
30 | #include "atom.h" |
| Line 787... | Line 788... | ||
| 787 | struct ni_ps *ps = ni_get_ps(rps); |
788 | struct ni_ps *ps = ni_get_ps(rps); |
| 788 | struct radeon_clock_and_voltage_limits *max_limits; |
789 | struct radeon_clock_and_voltage_limits *max_limits; |
| 789 | bool disable_mclk_switching; |
790 | bool disable_mclk_switching; |
| 790 | u32 mclk; |
791 | u32 mclk; |
| 791 | u16 vddci; |
792 | u16 vddci; |
| 792 | u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc; |
- | |
| 793 | int i; |
793 | int i; |
| Line 794... | Line 794... | ||
| 794 | 794 | ||
| 795 | if ((rdev->pm.dpm.new_active_crtc_count > 1) || |
795 | if ((rdev->pm.dpm.new_active_crtc_count > 1) || |
| 796 | ni_dpm_vblank_too_short(rdev)) |
796 | ni_dpm_vblank_too_short(rdev)) |
| Line 814... | Line 814... | ||
| 814 | if (ps->performance_levels[i].vddci > max_limits->vddci) |
814 | if (ps->performance_levels[i].vddci > max_limits->vddci) |
| 815 | ps->performance_levels[i].vddci = max_limits->vddci; |
815 | ps->performance_levels[i].vddci = max_limits->vddci; |
| 816 | } |
816 | } |
| 817 | } |
817 | } |
| Line 818... | Line -... | ||
| 818 | - | ||
| 819 | /* limit clocks to max supported clocks based on voltage dependency tables */ |
- | |
| 820 | btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, |
- | |
| 821 | &max_sclk_vddc); |
- | |
| 822 | btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, |
- | |
| 823 | &max_mclk_vddci); |
- | |
| 824 | btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, |
- | |
| 825 | &max_mclk_vddc); |
- | |
| 826 | - | ||
| 827 | for (i = 0; i < ps->performance_level_count; i++) { |
- | |
| 828 | if (max_sclk_vddc) { |
- | |
| 829 | if (ps->performance_levels[i].sclk > max_sclk_vddc) |
- | |
| 830 | ps->performance_levels[i].sclk = max_sclk_vddc; |
- | |
| 831 | } |
- | |
| 832 | if (max_mclk_vddci) { |
- | |
| 833 | if (ps->performance_levels[i].mclk > max_mclk_vddci) |
- | |
| 834 | ps->performance_levels[i].mclk = max_mclk_vddci; |
- | |
| 835 | } |
- | |
| 836 | if (max_mclk_vddc) { |
- | |
| 837 | if (ps->performance_levels[i].mclk > max_mclk_vddc) |
- | |
| 838 | ps->performance_levels[i].mclk = max_mclk_vddc; |
- | |
| 839 | } |
- | |
| 840 | } |
- | |
| 841 | 818 | ||
| Line 842... | Line 819... | ||
| 842 | /* XXX validate the min clocks required for display */ |
819 | /* XXX validate the min clocks required for display */ |
| 843 | 820 | ||
| 844 | /* adjust low state */ |
821 | /* adjust low state */ |