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Rev 5078 Rev 5271
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#define CIK_LB_DATA_FORMAT                        0x6b00
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#define CIK_LB_DATA_FORMAT                        0x6b00
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#       define CIK_INTERLEAVE_EN                  (1 << 3)
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#       define CIK_INTERLEAVE_EN                  (1 << 3)
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#define CIK_LB_DESKTOP_HEIGHT                     0x6b0c
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#define CP_HQD_IQ_RPTR					0xC970u
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#define AQL_ENABLE					(1U << 0)
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#define IDLE					(1 << 2)
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struct cik_mqd {
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	uint32_t header;
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	uint32_t compute_dispatch_initiator;
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	uint32_t compute_dim_x;
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	uint32_t compute_dim_y;
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	uint32_t compute_dim_z;
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	uint32_t compute_start_x;
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	uint32_t compute_start_y;
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	uint32_t compute_start_z;
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	uint32_t compute_num_thread_x;
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	uint32_t compute_num_thread_y;
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	uint32_t compute_num_thread_z;
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	uint32_t compute_pipelinestat_enable;
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	uint32_t compute_perfcount_enable;
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	uint32_t compute_pgm_lo;
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	uint32_t compute_pgm_hi;
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	uint32_t compute_tba_lo;
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	uint32_t compute_tba_hi;
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	uint32_t compute_tma_lo;
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	uint32_t compute_tma_hi;
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	uint32_t compute_pgm_rsrc1;
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	uint32_t compute_pgm_rsrc2;
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	uint32_t compute_vmid;
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	uint32_t compute_resource_limits;
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	uint32_t compute_static_thread_mgmt_se0;
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	uint32_t compute_static_thread_mgmt_se1;
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	uint32_t compute_tmpring_size;
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	uint32_t compute_static_thread_mgmt_se2;
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	uint32_t compute_static_thread_mgmt_se3;
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	uint32_t compute_restart_x;
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	uint32_t compute_restart_y;
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	uint32_t compute_restart_z;
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	uint32_t compute_thread_trace_enable;
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	uint32_t compute_misc_reserved;
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	uint32_t compute_user_data_0;
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	uint32_t compute_user_data_1;
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	uint32_t compute_user_data_2;
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	uint32_t compute_user_data_3;
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	uint32_t compute_user_data_4;
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	uint32_t compute_user_data_5;
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	uint32_t compute_user_data_6;
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	uint32_t compute_user_data_7;
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	uint32_t compute_user_data_8;
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	uint32_t compute_user_data_9;
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	uint32_t compute_user_data_10;
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	uint32_t compute_user_data_11;
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	uint32_t compute_user_data_12;
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	uint32_t compute_user_data_13;
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	uint32_t compute_user_data_14;
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	uint32_t compute_user_data_15;
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	uint32_t cp_compute_csinvoc_count_lo;
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	uint32_t cp_compute_csinvoc_count_hi;
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	uint32_t cp_mqd_base_addr_lo;
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	uint32_t cp_mqd_base_addr_hi;
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	uint32_t cp_hqd_active;
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	uint32_t cp_hqd_vmid;
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	uint32_t cp_hqd_persistent_state;
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	uint32_t cp_hqd_pipe_priority;
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	uint32_t cp_hqd_queue_priority;
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	uint32_t cp_hqd_quantum;
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	uint32_t cp_hqd_pq_base_lo;
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	uint32_t cp_hqd_pq_base_hi;
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	uint32_t cp_hqd_pq_rptr;
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	uint32_t cp_hqd_pq_rptr_report_addr_lo;
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	uint32_t cp_hqd_pq_rptr_report_addr_hi;
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	uint32_t cp_hqd_pq_wptr_poll_addr_lo;
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	uint32_t cp_hqd_pq_wptr_poll_addr_hi;
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	uint32_t cp_hqd_pq_doorbell_control;
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	uint32_t cp_hqd_pq_wptr;
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	uint32_t cp_hqd_pq_control;
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	uint32_t cp_hqd_ib_base_addr_lo;
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	uint32_t cp_hqd_ib_base_addr_hi;
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	uint32_t cp_hqd_ib_rptr;
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	uint32_t cp_hqd_ib_control;
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	uint32_t cp_hqd_iq_timer;
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	uint32_t cp_hqd_iq_rptr;
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	uint32_t cp_hqd_dequeue_request;
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	uint32_t cp_hqd_dma_offload;
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	uint32_t cp_hqd_sema_cmd;
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	uint32_t cp_hqd_msg_type;
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	uint32_t cp_hqd_atomic0_preop_lo;
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	uint32_t cp_hqd_atomic0_preop_hi;
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	uint32_t cp_hqd_atomic1_preop_lo;
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	uint32_t cp_hqd_atomic1_preop_hi;
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	uint32_t cp_hqd_hq_status0;
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	uint32_t cp_hqd_hq_control0;
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	uint32_t cp_mqd_control;
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	uint32_t cp_mqd_query_time_lo;
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	uint32_t cp_mqd_query_time_hi;
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	uint32_t cp_mqd_connect_start_time_lo;
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	uint32_t cp_mqd_connect_start_time_hi;
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	uint32_t cp_mqd_connect_end_time_lo;
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	uint32_t cp_mqd_connect_end_time_hi;
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	uint32_t cp_mqd_connect_end_wf_count;
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	uint32_t cp_mqd_connect_end_pq_rptr;
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	uint32_t cp_mqd_connect_end_pq_wptr;
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	uint32_t cp_mqd_connect_end_ib_rptr;
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	uint32_t reserved_96;
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	uint32_t reserved_97;
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	uint32_t reserved_98;
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	uint32_t reserved_99;
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	uint32_t iqtimer_pkt_header;
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	uint32_t iqtimer_pkt_dw0;
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	uint32_t iqtimer_pkt_dw1;
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	uint32_t iqtimer_pkt_dw2;
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	uint32_t iqtimer_pkt_dw3;
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	uint32_t iqtimer_pkt_dw4;
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	uint32_t iqtimer_pkt_dw5;
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	uint32_t iqtimer_pkt_dw6;
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	uint32_t reserved_108;
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	uint32_t reserved_109;
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	uint32_t reserved_110;
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	uint32_t reserved_111;
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	uint32_t queue_doorbell_id0;
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	uint32_t queue_doorbell_id1;
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	uint32_t queue_doorbell_id2;
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	uint32_t queue_doorbell_id3;
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	uint32_t queue_doorbell_id4;
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	uint32_t queue_doorbell_id5;
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	uint32_t queue_doorbell_id6;
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	uint32_t queue_doorbell_id7;
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	uint32_t queue_doorbell_id8;
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	uint32_t queue_doorbell_id9;
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	uint32_t queue_doorbell_id10;
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	uint32_t queue_doorbell_id11;
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	uint32_t queue_doorbell_id12;
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	uint32_t queue_doorbell_id13;
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	uint32_t queue_doorbell_id14;
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	uint32_t queue_doorbell_id15;
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#define CIK_LB_DESKTOP_HEIGHT                     0x6b0c
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};