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| Rev 5271 | Rev 6104 | ||
|---|---|---|---|
| Line 185... | Line 185... | ||
| 185 | static int ci_update_uvd_dpm(struct radeon_device *rdev, bool gate); |
185 | static int ci_update_uvd_dpm(struct radeon_device *rdev, bool gate); |
| Line 186... | Line 186... | ||
| 186 | 186 | ||
| 187 | static PPSMC_Result ci_send_msg_to_smc_with_parameter(struct radeon_device *rdev, |
187 | static PPSMC_Result ci_send_msg_to_smc_with_parameter(struct radeon_device *rdev, |
| Line -... | Line 188... | ||
| - | 188 | PPSMC_Msg msg, u32 parameter); |
|
| - | 189 | ||
| - | 190 | static void ci_thermal_start_smc_fan_control(struct radeon_device *rdev); |
|
| 188 | PPSMC_Msg msg, u32 parameter); |
191 | static void ci_fan_ctrl_set_default_mode(struct radeon_device *rdev); |
| 189 | 192 | ||
| 190 | static struct ci_power_info *ci_get_pi(struct radeon_device *rdev) |
193 | static struct ci_power_info *ci_get_pi(struct radeon_device *rdev) |
| Line 191... | Line 194... | ||
| 191 | { |
194 | { |
| Line 1041... | Line 1044... | ||
| 1041 | FAN_CONTROL_TABLE); |
1044 | FAN_CONTROL_TABLE); |
| 1042 | if (ret != PPSMC_Result_OK) |
1045 | if (ret != PPSMC_Result_OK) |
| 1043 | return -EINVAL; |
1046 | return -EINVAL; |
| 1044 | } |
1047 | } |
| Line -... | Line 1048... | ||
| - | 1048 | ||
| 1045 | 1049 | pi->fan_is_controlled_by_smc = true; |
|
| 1046 | return 0; |
1050 | return 0; |
| Line 1047... | Line -... | ||
| 1047 | } |
- | |
| 1048 | 1051 | } |
|
| 1049 | #if 0 |
1052 | |
| 1050 | static int ci_fan_ctrl_stop_smc_fan_control(struct radeon_device *rdev) |
1053 | static int ci_fan_ctrl_stop_smc_fan_control(struct radeon_device *rdev) |
| - | 1054 | { |
|
| Line 1051... | Line 1055... | ||
| 1051 | { |
1055 | PPSMC_Result ret; |
| 1052 | PPSMC_Result ret; |
1056 | struct ci_power_info *pi = ci_get_pi(rdev); |
| - | 1057 | ||
| 1053 | 1058 | ret = ci_send_msg_to_smc(rdev, PPSMC_StopFanControl); |
|
| 1054 | ret = ci_send_msg_to_smc(rdev, PPSMC_StopFanControl); |
1059 | if (ret == PPSMC_Result_OK) { |
| 1055 | if (ret == PPSMC_Result_OK) |
1060 | pi->fan_is_controlled_by_smc = false; |
| 1056 | return 0; |
1061 | return 0; |
| Line 1057... | Line 1062... | ||
| 1057 | else |
1062 | } else |
| 1058 | return -EINVAL; |
1063 | return -EINVAL; |
| 1059 | } |
1064 | } |
| 1060 | 1065 | ||
| 1061 | static int ci_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev, |
1066 | int ci_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev, |
| Line 1081... | Line 1086... | ||
| 1081 | *speed = 100; |
1086 | *speed = 100; |
| Line 1082... | Line 1087... | ||
| 1082 | 1087 | ||
| 1083 | return 0; |
1088 | return 0; |
| Line 1084... | Line 1089... | ||
| 1084 | } |
1089 | } |
| 1085 | 1090 | ||
| 1086 | static int ci_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev, |
1091 | int ci_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev, |
| 1087 | u32 speed) |
1092 | u32 speed) |
| 1088 | { |
1093 | { |
| 1089 | u32 tmp; |
1094 | u32 tmp; |
| - | 1095 | u32 duty, duty100; |
|
| Line 1090... | Line 1096... | ||
| 1090 | u32 duty, duty100; |
1096 | u64 tmp64; |
| 1091 | u64 tmp64; |
1097 | struct ci_power_info *pi = ci_get_pi(rdev); |
| Line 1092... | Line 1098... | ||
| 1092 | 1098 | ||
| 1093 | if (rdev->pm.no_fan) |
1099 | if (rdev->pm.no_fan) |
| Line 1094... | Line 1100... | ||
| 1094 | return -ENOENT; |
1100 | return -ENOENT; |
| 1095 | 1101 | ||
| Line 1096... | Line 1102... | ||
| 1096 | if (speed > 100) |
1102 | if (pi->fan_is_controlled_by_smc) |
| Line 1097... | Line 1103... | ||
| 1097 | return -EINVAL; |
1103 | return -EINVAL; |
| 1098 | 1104 | ||
| Line 1110... | Line 1116... | ||
| 1110 | 1116 | ||
| 1111 | tmp = RREG32_SMC(CG_FDO_CTRL0) & ~FDO_STATIC_DUTY_MASK; |
1117 | tmp = RREG32_SMC(CG_FDO_CTRL0) & ~FDO_STATIC_DUTY_MASK; |
| 1112 | tmp |= FDO_STATIC_DUTY(duty); |
1118 | tmp |= FDO_STATIC_DUTY(duty); |
| Line -... | Line 1119... | ||
| - | 1119 | WREG32_SMC(CG_FDO_CTRL0, tmp); |
|
| - | 1120 | ||
| - | 1121 | return 0; |
|
| - | 1122 | } |
|
| - | 1123 | ||
| - | 1124 | void ci_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode) |
|
| - | 1125 | { |
|
| - | 1126 | if (mode) { |
|
| - | 1127 | /* stop auto-manage */ |
|
| 1113 | WREG32_SMC(CG_FDO_CTRL0, tmp); |
1128 | if (rdev->pm.dpm.fan.ucode_fan_control) |
| - | 1129 | ci_fan_ctrl_stop_smc_fan_control(rdev); |
|
| - | 1130 | ci_fan_ctrl_set_static_mode(rdev, mode); |
|
| - | 1131 | } else { |
|
| - | 1132 | /* restart auto-manage */ |
|
| - | 1133 | if (rdev->pm.dpm.fan.ucode_fan_control) |
|
| - | 1134 | ci_thermal_start_smc_fan_control(rdev); |
|
| - | 1135 | else |
|
| - | 1136 | ci_fan_ctrl_set_default_mode(rdev); |
|
| - | 1137 | } |
|
| - | 1138 | } |
|
| - | 1139 | ||
| - | 1140 | u32 ci_fan_ctrl_get_mode(struct radeon_device *rdev) |
|
| - | 1141 | { |
|
| Line -... | Line 1142... | ||
| - | 1142 | struct ci_power_info *pi = ci_get_pi(rdev); |
|
| 1114 | 1143 | u32 tmp; |
|
| - | 1144 | ||
| - | 1145 | if (pi->fan_is_controlled_by_smc) |
|
| - | 1146 | return 0; |
|
| 1115 | ci_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC); |
1147 | |
| Line -... | Line 1148... | ||
| - | 1148 | tmp = RREG32_SMC(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK; |
|
| 1116 | 1149 | return (tmp >> FDO_PWM_MODE_SHIFT); |
|
| 1117 | return 0; |
1150 | } |
| 1118 | } |
1151 | |
| 1119 | 1152 | #if 0 |
|
| 1120 | static int ci_fan_ctrl_get_fan_speed_rpm(struct radeon_device *rdev, |
1153 | static int ci_fan_ctrl_get_fan_speed_rpm(struct radeon_device *rdev, |
| Line 1696... | Line 1729... | ||
| 1696 | if (smc_result != PPSMC_Result_OK) |
1729 | if (smc_result != PPSMC_Result_OK) |
| 1697 | return -EINVAL; |
1730 | return -EINVAL; |
| 1698 | return 0; |
1731 | return 0; |
| 1699 | } |
1732 | } |
| Line -... | Line 1733... | ||
| - | 1733 | ||
| 1700 | 1734 | #if 0 |
|
| 1701 | static int ci_set_boot_state(struct radeon_device *rdev) |
1735 | static int ci_set_boot_state(struct radeon_device *rdev) |
| 1702 | { |
1736 | { |
| 1703 | return ci_enable_sclk_mclk_dpm(rdev, false); |
1737 | return ci_enable_sclk_mclk_dpm(rdev, false); |
| - | 1738 | } |
|
| Line 1704... | Line 1739... | ||
| 1704 | } |
1739 | #endif |
| 1705 | 1740 | ||
| 1706 | static u32 ci_get_average_sclk_freq(struct radeon_device *rdev) |
1741 | static u32 ci_get_average_sclk_freq(struct radeon_device *rdev) |
| 1707 | { |
1742 | { |
| Line 5341... | Line 5376... | ||
| 5341 | ci_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps); |
5376 | ci_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps); |
| Line 5342... | Line 5377... | ||
| 5342 | 5377 | ||
| 5343 | return 0; |
5378 | return 0; |
| Line -... | Line 5379... | ||
| - | 5379 | } |
|
| 5344 | } |
5380 | |
| 5345 | 5381 | #if 0 |
|
| 5346 | void ci_dpm_reset_asic(struct radeon_device *rdev) |
5382 | void ci_dpm_reset_asic(struct radeon_device *rdev) |
| 5347 | { |
5383 | { |
| - | 5384 | ci_set_boot_state(rdev); |
|
| Line 5348... | Line 5385... | ||
| 5348 | ci_set_boot_state(rdev); |
5385 | } |
| 5349 | } |
5386 | #endif |
| 5350 | 5387 | ||
| 5351 | void ci_dpm_display_configuration_changed(struct radeon_device *rdev) |
5388 | void ci_dpm_display_configuration_changed(struct radeon_device *rdev) |
| Line 5779... | Line 5816... | ||
| 5779 | break; |
5816 | break; |
| 5780 | case 4: |
5817 | case 4: |
| 5781 | tmp |= DPM_ENABLED; |
5818 | tmp |= DPM_ENABLED; |
| 5782 | break; |
5819 | break; |
| 5783 | default: |
5820 | default: |
| 5784 | DRM_ERROR("Invalid PCC GPIO: %u!\n", gpio.shift); |
5821 | DRM_DEBUG("Invalid PCC GPIO: %u!\n", gpio.shift); |
| 5785 | break; |
5822 | break; |
| 5786 | } |
5823 | } |
| 5787 | WREG32_SMC(CNB_PWRMGT_CNTL, tmp); |
5824 | WREG32_SMC(CNB_PWRMGT_CNTL, tmp); |
| 5788 | } |
5825 | } |
| Line 5883... | Line 5920... | ||
| 5883 | i, pl->sclk, pl->mclk, pl->pcie_gen + 1, pl->pcie_lane); |
5920 | i, pl->sclk, pl->mclk, pl->pcie_gen + 1, pl->pcie_lane); |
| 5884 | } |
5921 | } |
| 5885 | r600_dpm_print_ps_status(rdev, rps); |
5922 | r600_dpm_print_ps_status(rdev, rps); |
| 5886 | } |
5923 | } |
| Line -... | Line 5924... | ||
| - | 5924 | ||
| - | 5925 | u32 ci_dpm_get_current_sclk(struct radeon_device *rdev) |
|
| - | 5926 | { |
|
| - | 5927 | u32 sclk = ci_get_average_sclk_freq(rdev); |
|
| - | 5928 | ||
| - | 5929 | return sclk; |
|
| - | 5930 | } |
|
| - | 5931 | ||
| - | 5932 | u32 ci_dpm_get_current_mclk(struct radeon_device *rdev) |
|
| - | 5933 | { |
|
| - | 5934 | u32 mclk = ci_get_average_mclk_freq(rdev); |
|
| - | 5935 | ||
| - | 5936 | return mclk; |
|
| - | 5937 | } |
|
| 5887 | 5938 | ||
| 5888 | u32 ci_dpm_get_sclk(struct radeon_device *rdev, bool low) |
5939 | u32 ci_dpm_get_sclk(struct radeon_device *rdev, bool low) |
| 5889 | { |
5940 | { |
| 5890 | struct ci_power_info *pi = ci_get_pi(rdev); |
5941 | struct ci_power_info *pi = ci_get_pi(rdev); |