Rev 5078 | Rev 6104 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 5078 | Rev 5271 | ||
|---|---|---|---|
| Line 22... | Line 22... | ||
| 22 | * Authors: Alex Deucher |
22 | * Authors: Alex Deucher |
| 23 | */ |
23 | */ |
| Line 24... | Line 24... | ||
| 24 | 24 | ||
| 25 | #include "drmP.h" |
25 | #include "drmP.h" |
| - | 26 | #include "radeon.h" |
|
| 26 | #include "radeon.h" |
27 | #include "radeon_asic.h" |
| 27 | #include "btcd.h" |
28 | #include "btcd.h" |
| 28 | #include "r600_dpm.h" |
29 | #include "r600_dpm.h" |
| 29 | #include "cypress_dpm.h" |
30 | #include "cypress_dpm.h" |
| 30 | #include "btc_dpm.h" |
31 | #include "btc_dpm.h" |
| Line 2097... | Line 2098... | ||
| 2097 | struct rv7xx_ps *ps = rv770_get_ps(rps); |
2098 | struct rv7xx_ps *ps = rv770_get_ps(rps); |
| 2098 | struct radeon_clock_and_voltage_limits *max_limits; |
2099 | struct radeon_clock_and_voltage_limits *max_limits; |
| 2099 | bool disable_mclk_switching; |
2100 | bool disable_mclk_switching; |
| 2100 | u32 mclk, sclk; |
2101 | u32 mclk, sclk; |
| 2101 | u16 vddc, vddci; |
2102 | u16 vddc, vddci; |
| 2102 | u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc; |
- | |
| Line 2103... | Line 2103... | ||
| 2103 | 2103 | ||
| 2104 | if ((rdev->pm.dpm.new_active_crtc_count > 1) || |
2104 | if ((rdev->pm.dpm.new_active_crtc_count > 1) || |
| 2105 | btc_dpm_vblank_too_short(rdev)) |
2105 | btc_dpm_vblank_too_short(rdev)) |
| 2106 | disable_mclk_switching = true; |
2106 | disable_mclk_switching = true; |
| Line 2139... | Line 2139... | ||
| 2139 | ps->low.vddc = max_limits->vddc; |
2139 | ps->low.vddc = max_limits->vddc; |
| 2140 | if (ps->low.vddci > max_limits->vddci) |
2140 | if (ps->low.vddci > max_limits->vddci) |
| 2141 | ps->low.vddci = max_limits->vddci; |
2141 | ps->low.vddci = max_limits->vddci; |
| 2142 | } |
2142 | } |
| Line 2143... | Line -... | ||
| 2143 | - | ||
| 2144 | /* limit clocks to max supported clocks based on voltage dependency tables */ |
- | |
| 2145 | btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, |
- | |
| 2146 | &max_sclk_vddc); |
- | |
| 2147 | btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, |
- | |
| 2148 | &max_mclk_vddci); |
- | |
| 2149 | btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, |
- | |
| 2150 | &max_mclk_vddc); |
- | |
| 2151 | - | ||
| 2152 | if (max_sclk_vddc) { |
- | |
| 2153 | if (ps->low.sclk > max_sclk_vddc) |
- | |
| 2154 | ps->low.sclk = max_sclk_vddc; |
- | |
| 2155 | if (ps->medium.sclk > max_sclk_vddc) |
- | |
| 2156 | ps->medium.sclk = max_sclk_vddc; |
- | |
| 2157 | if (ps->high.sclk > max_sclk_vddc) |
- | |
| 2158 | ps->high.sclk = max_sclk_vddc; |
- | |
| 2159 | } |
- | |
| 2160 | if (max_mclk_vddci) { |
- | |
| 2161 | if (ps->low.mclk > max_mclk_vddci) |
- | |
| 2162 | ps->low.mclk = max_mclk_vddci; |
- | |
| 2163 | if (ps->medium.mclk > max_mclk_vddci) |
- | |
| 2164 | ps->medium.mclk = max_mclk_vddci; |
- | |
| 2165 | if (ps->high.mclk > max_mclk_vddci) |
- | |
| 2166 | ps->high.mclk = max_mclk_vddci; |
- | |
| 2167 | } |
- | |
| 2168 | if (max_mclk_vddc) { |
- | |
| 2169 | if (ps->low.mclk > max_mclk_vddc) |
- | |
| 2170 | ps->low.mclk = max_mclk_vddc; |
- | |
| 2171 | if (ps->medium.mclk > max_mclk_vddc) |
- | |
| 2172 | ps->medium.mclk = max_mclk_vddc; |
- | |
| 2173 | if (ps->high.mclk > max_mclk_vddc) |
- | |
| 2174 | ps->high.mclk = max_mclk_vddc; |
- | |
| 2175 | } |
- | |
| 2176 | 2143 | ||
| Line 2177... | Line 2144... | ||
| 2177 | /* XXX validate the min clocks required for display */ |
2144 | /* XXX validate the min clocks required for display */ |
| 2178 | 2145 | ||
| 2179 | if (disable_mclk_switching) { |
2146 | if (disable_mclk_switching) { |