Subversion Repositories Kolibri OS

Rev

Rev 5271 | Rev 6661 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 5271 Rev 6104
Line 328... Line 328...
328 
		misc |= ATOM_HSYNC_POLARITY;
 328 
		misc |= ATOM_HSYNC_POLARITY;
329 
	if (mode->flags & DRM_MODE_FLAG_CSYNC)
 329 
	if (mode->flags & DRM_MODE_FLAG_CSYNC)
330 
		misc |= ATOM_COMPOSITESYNC;
 330 
		misc |= ATOM_COMPOSITESYNC;
331 
	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 331 
	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
332 
		misc |= ATOM_INTERLACE;
 332 
		misc |= ATOM_INTERLACE;
333 
	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 333 
	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
334 
		misc |= ATOM_DOUBLE_CLOCK_MODE;
 334 
		misc |= ATOM_DOUBLE_CLOCK_MODE;
- 
 
 335 
	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
- 
 
 336 
		misc |= ATOM_H_REPLICATIONBY2 | ATOM_V_REPLICATIONBY2;
Line 335... Line 337...
335 
 
 337 
 
336 
	args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
 338 
	args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
Line 337... Line 339...
337 
	args.ucCRTC = radeon_crtc->crtc_id;
 339 
	args.ucCRTC = radeon_crtc->crtc_id;
Line 372... Line 374...
372 
		misc |= ATOM_HSYNC_POLARITY;
 374 
		misc |= ATOM_HSYNC_POLARITY;
373 
	if (mode->flags & DRM_MODE_FLAG_CSYNC)
 375 
	if (mode->flags & DRM_MODE_FLAG_CSYNC)
374 
		misc |= ATOM_COMPOSITESYNC;
 376 
		misc |= ATOM_COMPOSITESYNC;
375 
	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 377 
	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
376 
		misc |= ATOM_INTERLACE;
 378 
		misc |= ATOM_INTERLACE;
377 
	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 379 
	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
378 
		misc |= ATOM_DOUBLE_CLOCK_MODE;
 380 
		misc |= ATOM_DOUBLE_CLOCK_MODE;
- 
 
 381 
	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
- 
 
 382 
		misc |= ATOM_H_REPLICATIONBY2 | ATOM_V_REPLICATIONBY2;
Line 379... Line 383...
379 
 
 383 
 
380 
	args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
 384 
	args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
Line 381... Line 385...
381 
	args.ucCRTC = radeon_crtc->crtc_id;
 385 
	args.ucCRTC = radeon_crtc->crtc_id;
Line 604... Line 608...
604 
 
 608 
 
605 
			dp_clock = dig_connector->dp_clock;
 609 
			dp_clock = dig_connector->dp_clock;
606 
		}
 610 
		}
Line -... Line 611...
- 
 
 611 
	}
- 
 
 612 
 
- 
 
 613 
	if (radeon_encoder->is_mst_encoder) {
- 
 
 614 
		struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv;
- 
 
 615 
		struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv;
- 
 
 616 
 
- 
 
 617 
		dp_clock = dig_connector->dp_clock;
607 
	}
 618 
	}
608 
 
 619 
 
609 
	/* use recommended ref_div for ss */
 620 
	/* use recommended ref_div for ss */
610 
	if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
 621 
	if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
611 
		if (radeon_crtc->ss_enabled) {
 622 
		if (radeon_crtc->ss_enabled) {
Line 950... Line 961...
950 
	int encoder_mode = atombios_get_encoder_mode(radeon_crtc->encoder);
 961 
	int encoder_mode = atombios_get_encoder_mode(radeon_crtc->encoder);
Line 951... Line 962...
951 
 
 962 
 
952 
	radeon_crtc->bpc = 8;
 963 
	radeon_crtc->bpc = 8;
Line -... Line 964...
- 
 
 964 
	radeon_crtc->ss_enabled = false;
- 
 
 965 
 
953 
	radeon_crtc->ss_enabled = false;
 966 
	if (radeon_encoder->is_mst_encoder) {
954 
 
 967 
		radeon_dp_mst_prepare_pll(crtc, mode);
955 
	if ((radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) ||
 968 
	} else if ((radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) ||
956 
	    (radeon_encoder_get_dp_bridge_encoder_id(radeon_crtc->encoder) != ENCODER_OBJECT_ID_NONE)) {
 969 
	    (radeon_encoder_get_dp_bridge_encoder_id(radeon_crtc->encoder) != ENCODER_OBJECT_ID_NONE)) {
957 
		struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
 970 
		struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
958 
		struct drm_connector *connector =
 971 
		struct drm_connector *connector =
Line 1403... Line 1416...
1403 
	y &= ~1;
 1416 
	y &= ~1;
1404 
	WREG32(EVERGREEN_VIEWPORT_START + radeon_crtc->crtc_offset,
 1417 
	WREG32(EVERGREEN_VIEWPORT_START + radeon_crtc->crtc_offset,
1405 
	       (x << 16) | y);
 1418 
	       (x << 16) | y);
1406 
	viewport_w = crtc->mode.hdisplay;
 1419 
	viewport_w = crtc->mode.hdisplay;
1407 
	viewport_h = (crtc->mode.vdisplay + 1) & ~1;
 1420 
	viewport_h = (crtc->mode.vdisplay + 1) & ~1;
- 
 
 1421 
	if ((rdev->family >= CHIP_BONAIRE) &&
- 
 
 1422 
	    (crtc->mode.flags & DRM_MODE_FLAG_INTERLACE))
- 
 
 1423 
		viewport_h *= 2;
1408 
	WREG32(EVERGREEN_VIEWPORT_SIZE + radeon_crtc->crtc_offset,
 1424 
	WREG32(EVERGREEN_VIEWPORT_SIZE + radeon_crtc->crtc_offset,
1409 
	       (viewport_w << 16) | viewport_h);
 1425 
	       (viewport_w << 16) | viewport_h);
Line 1410... Line 1426...
1410 
 
 1426 
 
1411 
	/* pageflip setup */
 1427 
	/* pageflip setup */
Line 1849... Line 1865...
1849 
			pll = radeon_get_shared_nondp_ppll(crtc);
 1865 
			pll = radeon_get_shared_nondp_ppll(crtc);
1850 
			if (pll != ATOM_PPLL_INVALID)
 1866 
			if (pll != ATOM_PPLL_INVALID)
1851 
				return pll;
 1867 
				return pll;
1852 
		}
 1868 
		}
1853 
		/* otherwise, pick one of the plls */
 1869 
		/* otherwise, pick one of the plls */
1854 
		if ((rdev->family == CHIP_KAVERI) ||
 - 
 
1855 
		    (rdev->family == CHIP_KABINI) ||
 1870 
		if ((rdev->family == CHIP_KABINI) ||
1856 
		    (rdev->family == CHIP_MULLINS)) {
 1871 
		    (rdev->family == CHIP_MULLINS)) {
1857 
			/* KB/KV/ML has PPLL1 and PPLL2 */
 1872 
			/* KB/ML has PPLL1 and PPLL2 */
1858 
			pll_in_use = radeon_get_pll_use_mask(crtc);
 1873 
			pll_in_use = radeon_get_pll_use_mask(crtc);
1859 
			if (!(pll_in_use & (1 << ATOM_PPLL2)))
 1874 
			if (!(pll_in_use & (1 << ATOM_PPLL2)))
1860 
				return ATOM_PPLL2;
 1875 
				return ATOM_PPLL2;
1861 
			if (!(pll_in_use & (1 << ATOM_PPLL1)))
 1876 
			if (!(pll_in_use & (1 << ATOM_PPLL1)))
1862 
				return ATOM_PPLL1;
 1877 
				return ATOM_PPLL1;
1863 
			DRM_ERROR("unable to allocate a PPLL\n");
 1878 
			DRM_ERROR("unable to allocate a PPLL\n");
1864 
			return ATOM_PPLL_INVALID;
 1879 
			return ATOM_PPLL_INVALID;
1865 
		} else {
 1880 
		} else {
1866 
			/* CI has PPLL0, PPLL1, and PPLL2 */
 1881 
			/* CI/KV has PPLL0, PPLL1, and PPLL2 */
1867 
			pll_in_use = radeon_get_pll_use_mask(crtc);
 1882 
			pll_in_use = radeon_get_pll_use_mask(crtc);
1868 
			if (!(pll_in_use & (1 << ATOM_PPLL2)))
 1883 
			if (!(pll_in_use & (1 << ATOM_PPLL2)))
1869 
				return ATOM_PPLL2;
 1884 
				return ATOM_PPLL2;
1870 
			if (!(pll_in_use & (1 << ATOM_PPLL1)))
 1885 
			if (!(pll_in_use & (1 << ATOM_PPLL1)))
1871 
				return ATOM_PPLL1;
 1886 
				return ATOM_PPLL1;
Line 2065... Line 2080...
2065 
	if ((radeon_crtc->encoder == NULL) || (radeon_crtc->connector == NULL)) {
 2080 
	if ((radeon_crtc->encoder == NULL) || (radeon_crtc->connector == NULL)) {
2066 
		radeon_crtc->encoder = NULL;
 2081 
		radeon_crtc->encoder = NULL;
2067 
		radeon_crtc->connector = NULL;
 2082 
		radeon_crtc->connector = NULL;
2068 
		return false;
 2083 
		return false;
2069 
	}
 2084 
	}
- 
 
 2085 
	if (radeon_crtc->encoder) {
- 
 
 2086 
		struct radeon_encoder *radeon_encoder =
- 
 
 2087 
			to_radeon_encoder(radeon_crtc->encoder);
- 
 
 2088 
 
- 
 
 2089 
		radeon_crtc->output_csc = radeon_encoder->output_csc;
- 
 
 2090 
	}
2070 
	if (!radeon_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))
 2091 
	if (!radeon_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))
2071 
		return false;
 2092 
		return false;
2072 
	if (!atombios_crtc_prepare_pll(crtc, adjusted_mode))
 2093 
	if (!atombios_crtc_prepare_pll(crtc, adjusted_mode))
2073 
		return false;
 2094 
		return false;
2074 
	/* pick pll */
 2095 
	/* pick pll */
Line 2153... Line 2174...
2153 
					  0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);
 2174 
					  0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);
2154 
		break;
 2175 
		break;
2155 
	case ATOM_PPLL0:
 2176 
	case ATOM_PPLL0:
2156 
		/* disable the ppll */
 2177 
		/* disable the ppll */
2157 
		if ((rdev->family == CHIP_ARUBA) ||
 2178 
		if ((rdev->family == CHIP_ARUBA) ||
- 
 
 2179 
		    (rdev->family == CHIP_KAVERI) ||
2158 
		    (rdev->family == CHIP_BONAIRE) ||
 2180 
		    (rdev->family == CHIP_BONAIRE) ||
2159 
		    (rdev->family == CHIP_HAWAII))
 2181 
		    (rdev->family == CHIP_HAWAII))
2160 
			atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,
 2182 
			atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,
2161 
						  0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);
 2183 
						  0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);
2162 
		break;
 2184 
		break;