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/* Maximum size of that FireGL flag string */

/* Maximum size of that FireGL flag string */

#define ATOM_FIREGL_FLAG_STRING     "FGL"	/* Flag used to enable FireGL Support */

#define ATOM_FIREGL_FLAG_STRING     "FGL"             //Flag used to enable FireGL Support

#define ATOM_FAKE_DESKTOP_STRING    "DSK"	/* Flag used to enable mobile ASIC on Desktop */

#define ATOM_FAKE_DESKTOP_STRING    "DSK"             //Flag used to enable mobile ASIC on Desktop

  And the pointer actually points to this header. */

  And the pointer actually points to this header. */

	/*Image can't be updated, while Driver needs to carry the new table! */

	/*Image can't be updated, while Driver needs to carry the new table! */

typedef struct _ATOM_MASTER_LIST_OF_COMMAND_TABLES {

typedef struct _ATOM_MASTER_LIST_OF_COMMAND_TABLES{

	USHORT ASIC_Init;	/* Function Table, used by various SW components,latest version 1.1 */

  USHORT ASIC_Init;                              //Function Table, used by various SW components,latest version 1.1

	USHORT GetDisplaySurfaceSize;	/* Atomic Table,  Used by Bios when enabling HW ICON */

  USHORT GetDisplaySurfaceSize;                  //Atomic Table,  Used by Bios when enabling HW ICON

	USHORT ASIC_RegistersInit;	/* Atomic Table,  indirectly used by various SW components,called from ASIC_Init */

  USHORT ASIC_RegistersInit;                     //Atomic Table,  indirectly used by various SW components,called from ASIC_Init

	USHORT VRAM_BlockVenderDetection;	/* Atomic Table,  used only by Bios */

  USHORT VRAM_BlockVenderDetection;              //Atomic Table,  used only by Bios

	USHORT DIGxEncoderControl;	/* Only used by Bios */

  USHORT DIGxEncoderControl;										 //Only used by Bios

	USHORT MemoryControllerInit;	/* Atomic Table,  indirectly used by various SW components,called from ASIC_Init */

  USHORT MemoryControllerInit;                   //Atomic Table,  indirectly used by various SW components,called from ASIC_Init

	USHORT EnableCRTCMemReq;	/* Function Table,directly used by various SW components,latest version 2.1 */

  USHORT EnableCRTCMemReq;                       //Function Table,directly used by various SW components,latest version 2.1

	USHORT MemoryParamAdjust;	/* Atomic Table,  indirectly used by various SW components,called from SetMemoryClock if needed */

  USHORT MemoryParamAdjust; 										 //Atomic Table,  indirectly used by various SW components,called from SetMemoryClock if needed

	USHORT DVOEncoderControl;	/* Function Table,directly used by various SW components,latest version 1.2 */

  USHORT DVOEncoderControl;                      //Function Table,directly used by various SW components,latest version 1.2

	USHORT GPIOPinControl;	/* Atomic Table,  only used by Bios */

  USHORT GPIOPinControl;												 //Atomic Table,  only used by Bios

	USHORT SetEngineClock;	/*Function Table,directly used by various SW components,latest version 1.1 */

  USHORT SetEngineClock;                         //Function Table,directly used by various SW components,latest version 1.1

	USHORT SetMemoryClock;	/* Function Table,directly used by various SW components,latest version 1.1 */

  USHORT SetMemoryClock;                         //Function Table,directly used by various SW components,latest version 1.1

	USHORT SetPixelClock;	/*Function Table,directly used by various SW components,latest version 1.2 */

  USHORT SetPixelClock;                          //Function Table,directly used by various SW components,latest version 1.2  

	USHORT DynamicClockGating;	/* Atomic Table,  indirectly used by various SW components,called from ASIC_Init */

  USHORT DynamicClockGating;                     //Atomic Table,  indirectly used by various SW components,called from ASIC_Init

	USHORT ResetMemoryDLL;	/* Atomic Table,  indirectly used by various SW components,called from SetMemoryClock */

  USHORT ResetMemoryDLL;                         //Atomic Table,  indirectly used by various SW components,called from SetMemoryClock

	USHORT MemoryPLLInit;

	USHORT MemoryPLLInit;

	USHORT AdjustDisplayPll;	/* only used by Bios */

  USHORT AdjustDisplayPll;												//only used by Bios

	USHORT AdjustMemoryController;	/* Atomic Table,  indirectly used by various SW components,called from SetMemoryClock */

  USHORT AdjustMemoryController;                 //Atomic Table,  indirectly used by various SW components,called from SetMemoryClock                

	USHORT EnableASIC_StaticPwrMgt;	/* Atomic Table,  only used by Bios */

  USHORT EnableASIC_StaticPwrMgt;                //Atomic Table,  only used by Bios

	USHORT ASIC_StaticPwrMgtStatusChange;	/* Obsolete, only used by Bios */

  USHORT ASIC_StaticPwrMgtStatusChange;          //Obsolete ,     only used by Bios   

	USHORT DAC_LoadDetection;	/* Atomic Table,  directly used by various SW components,latest version 1.2 */

  USHORT DAC_LoadDetection;                      //Atomic Table,  directly used by various SW components,latest version 1.2  

	USHORT LVTMAEncoderControl;	/* Atomic Table,directly used by various SW components,latest version 1.3 */

  USHORT LVTMAEncoderControl;                    //Atomic Table,directly used by various SW components,latest version 1.3

	USHORT LCD1OutputControl;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT LCD1OutputControl;                      //Atomic Table,  directly used by various SW components,latest version 1.1 

	USHORT DAC1EncoderControl;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT DAC1EncoderControl;                     //Atomic Table,  directly used by various SW components,latest version 1.1  

	USHORT DAC2EncoderControl;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT DAC2EncoderControl;                     //Atomic Table,  directly used by various SW components,latest version 1.1 

	USHORT DVOOutputControl;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT DVOOutputControl;                       //Atomic Table,  directly used by various SW components,latest version 1.1 

	USHORT CV1OutputControl;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT CV1OutputControl;                       //Atomic Table,  Atomic Table,  Obsolete from Ry6xx, use DAC2 Output instead 

	USHORT GetConditionalGoldenSetting;	/* only used by Bios */

  USHORT GetConditionalGoldenSetting;            //only used by Bios

	USHORT TVEncoderControl;	/* Function Table,directly used by various SW components,latest version 1.1 */

  USHORT TVEncoderControl;                       //Function Table,directly used by various SW components,latest version 1.1

	USHORT TMDSAEncoderControl;	/* Atomic Table,  directly used by various SW components,latest version 1.3 */

  USHORT TMDSAEncoderControl;                    //Atomic Table,  directly used by various SW components,latest version 1.3

	USHORT LVDSEncoderControl;	/* Atomic Table,  directly used by various SW components,latest version 1.3 */

  USHORT LVDSEncoderControl;                     //Atomic Table,  directly used by various SW components,latest version 1.3

	USHORT TV1OutputControl;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT TV1OutputControl;                       //Atomic Table,  Obsolete from Ry6xx, use DAC2 Output instead

	USHORT EnableScaler;	/* Atomic Table,  used only by Bios */

  USHORT EnableScaler;                           //Atomic Table,  used only by Bios

	USHORT BlankCRTC;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT BlankCRTC;                              //Atomic Table,  directly used by various SW components,latest version 1.1 

	USHORT EnableCRTC;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT EnableCRTC;                             //Atomic Table,  directly used by various SW components,latest version 1.1 

	USHORT GetPixelClock;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT GetPixelClock;                          //Atomic Table,  directly used by various SW components,latest version 1.1 

	USHORT EnableVGA_Render;	/* Function Table,directly used by various SW components,latest version 1.1 */

  USHORT EnableVGA_Render;                       //Function Table,directly used by various SW components,latest version 1.1

	USHORT EnableVGA_Access;	/* Obsolete ,     only used by Bios */

  USHORT GetSCLKOverMCLKRatio;                   //Atomic Table,  only used by Bios

	USHORT SetCRTC_Timing;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT SetCRTC_Timing;                         //Atomic Table,  directly used by various SW components,latest version 1.1

	USHORT SetCRTC_OverScan;	/* Atomic Table,  used by various SW components,latest version 1.1 */

  USHORT SetCRTC_OverScan;                       //Atomic Table,  used by various SW components,latest version 1.1 

	USHORT SetCRTC_Replication;	/* Atomic Table,  used only by Bios */

  USHORT SetCRTC_Replication;                    //Atomic Table,  used only by Bios

	USHORT SelectCRTC_Source;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT SelectCRTC_Source;                      //Atomic Table,  directly used by various SW components,latest version 1.1 

	USHORT UpdateCRTC_DoubleBufferRegisters;

	USHORT UpdateCRTC_DoubleBufferRegisters;

	USHORT LUT_AutoFill;	/* Atomic Table,  only used by Bios */

  USHORT LUT_AutoFill;                           //Atomic Table,  only used by Bios

	USHORT EnableHW_IconCursor;	/* Atomic Table,  only used by Bios */

  USHORT EnableHW_IconCursor;                    //Atomic Table,  only used by Bios

	USHORT GetMemoryClock;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT GetMemoryClock;                         //Atomic Table,  directly used by various SW components,latest version 1.1 

	USHORT GetEngineClock;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT GetEngineClock;                         //Atomic Table,  directly used by various SW components,latest version 1.1 

	USHORT SetCRTC_UsingDTDTiming;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT SetCRTC_UsingDTDTiming;                 //Atomic Table,  directly used by various SW components,latest version 1.1

	USHORT ExternalEncoderControl;	/* Atomic Table,  directly used by various SW components,latest version 2.1 */

  USHORT ExternalEncoderControl;                 //Atomic Table,  directly used by various SW components,latest version 2.1

	USHORT LVTMAOutputControl;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT LVTMAOutputControl;                     //Atomic Table,  directly used by various SW components,latest version 1.1

	USHORT VRAM_BlockDetectionByStrap;	/* Atomic Table,  used only by Bios */

  USHORT VRAM_BlockDetectionByStrap;             //Atomic Table,  used only by Bios

	USHORT MemoryCleanUp;	/* Atomic Table,  only used by Bios */

  USHORT MemoryCleanUp;                          //Atomic Table,  only used by Bios    

	USHORT ProcessI2cChannelTransaction;	/* Function Table,only used by Bios */

  USHORT ProcessI2cChannelTransaction;           //Function Table,only used by Bios

	USHORT WriteOneByteToHWAssistedI2C;	/* Function Table,indirectly used by various SW components */

  USHORT WriteOneByteToHWAssistedI2C;            //Function Table,indirectly used by various SW components 

	USHORT ReadHWAssistedI2CStatus;	/* Atomic Table,  indirectly used by various SW components */

  USHORT ReadHWAssistedI2CStatus;                //Atomic Table,  indirectly used by various SW components

	USHORT SpeedFanControl;	/* Function Table,indirectly used by various SW components,called from ASIC_Init */

  USHORT SpeedFanControl;                        //Function Table,indirectly used by various SW components,called from ASIC_Init

	USHORT PowerConnectorDetection;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT PowerConnectorDetection;                //Atomic Table,  directly used by various SW components,latest version 1.1

	USHORT MC_Synchronization;	/* Atomic Table,  indirectly used by various SW components,called from SetMemoryClock */

  USHORT MC_Synchronization;                     //Atomic Table,  indirectly used by various SW components,called from SetMemoryClock

	USHORT ComputeMemoryEnginePLL;	/* Atomic Table,  indirectly used by various SW components,called from SetMemory/EngineClock */

  USHORT ComputeMemoryEnginePLL;                 //Atomic Table,  indirectly used by various SW components,called from SetMemory/EngineClock

	USHORT MemoryRefreshConversion;	/* Atomic Table,  indirectly used by various SW components,called from SetMemory or SetEngineClock */

  USHORT MemoryRefreshConversion;                //Atomic Table,  indirectly used by various SW components,called from SetMemory or SetEngineClock

	USHORT VRAM_GetCurrentInfoBlock;	/* Atomic Table,  used only by Bios */

  USHORT VRAM_GetCurrentInfoBlock;               //Atomic Table,  used only by Bios

	USHORT DynamicMemorySettings;	/* Atomic Table,  indirectly used by various SW components,called from SetMemoryClock */

  USHORT DynamicMemorySettings;                  //Atomic Table,  indirectly used by various SW components,called from SetMemoryClock

	USHORT MemoryTraining;	/* Atomic Table,  used only by Bios */

  USHORT MemoryTraining;                         //Atomic Table,  used only by Bios

	USHORT EnableSpreadSpectrumOnPPLL;	/* Atomic Table,  directly used by various SW components,latest version 1.2 */

  USHORT EnableSpreadSpectrumOnPPLL;             //Atomic Table,  directly used by various SW components,latest version 1.2

	USHORT TMDSAOutputControl;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT TMDSAOutputControl;                     //Atomic Table,  directly used by various SW components,latest version 1.1

	USHORT SetVoltage;	/* Function Table,directly and/or indirectly used by various SW components,latest version 1.1 */

  USHORT SetVoltage;                             //Function Table,directly and/or indirectly used by various SW components,latest version 1.1

	USHORT DAC1OutputControl;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT DAC1OutputControl;                      //Atomic Table,  directly used by various SW components,latest version 1.1

	USHORT DAC2OutputControl;	/* Atomic Table,  directly used by various SW components,latest version 1.1 */

  USHORT DAC2OutputControl;                      //Atomic Table,  directly used by various SW components,latest version 1.1

	USHORT SetupHWAssistedI2CStatus;	/* Function Table,only used by Bios, obsolete soon.Switch to use "ReadEDIDFromHWAssistedI2C" */

  USHORT SetupHWAssistedI2CStatus;               //Function Table,only used by Bios, obsolete soon.Switch to use "ReadEDIDFromHWAssistedI2C"

	USHORT ClockSource;	/* Atomic Table,  indirectly used by various SW components,called from ASIC_Init */

  USHORT ClockSource;                            //Atomic Table,  indirectly used by various SW components,called from ASIC_Init

	USHORT MemoryDeviceInit;	/* Atomic Table,  indirectly used by various SW components,called from SetMemoryClock */

  USHORT MemoryDeviceInit;                       //Atomic Table,  indirectly used by various SW components,called from SetMemoryClock

	USHORT EnableYUV;	/* Atomic Table,  indirectly used by various SW components,called from EnableVGARender */

  USHORT EnableYUV;                              //Atomic Table,  indirectly used by various SW components,called from EnableVGARender

	USHORT DIG1EncoderControl;	/* Atomic Table,directly used by various SW components,latest version 1.1 */

  USHORT DIG1EncoderControl;                     //Atomic Table,directly used by various SW components,latest version 1.1

	USHORT DIG2EncoderControl;	/* Atomic Table,directly used by various SW components,latest version 1.1 */

  USHORT DIG2EncoderControl;                     //Atomic Table,directly used by various SW components,latest version 1.1

	USHORT DIG1TransmitterControl;	/* Atomic Table,directly used by various SW components,latest version 1.1 */

  USHORT DIG1TransmitterControl;                 //Atomic Table,directly used by various SW components,latest version 1.1

	USHORT DIG2TransmitterControl;	/* Atomic Table,directly used by various SW components,latest version 1.1 */

  USHORT DIG2TransmitterControl;	               //Atomic Table,directly used by various SW components,latest version 1.1 

	USHORT ProcessAuxChannelTransaction;	/* Function Table,only used by Bios */

  USHORT ProcessAuxChannelTransaction;					 //Function Table,only used by Bios

} ATOM_MASTER_LIST_OF_COMMAND_TABLES;

}ATOM_MASTER_LIST_OF_COMMAND_TABLES;   

#define SetCRTC_DPM_State                        GetConditionalGoldenSetting

#define HPDInterruptService                      ReadHWAssistedI2CStatus

	ATOM_MASTER_LIST_OF_COMMAND_TABLES ListOfCommandTables;

	ATOM_MASTER_LIST_OF_COMMAND_TABLES ListOfCommandTables;

/*  Structures used in every command table */

/****************************************************************************/

/****************************************************************************/

typedef struct _ATOM_TABLE_ATTRIBUTE

typedef struct _ATOM_TABLE_ATTRIBUTE {

{

	USHORT UpdatedByUtility:1;	/* [15]=Table updated by utility flag */

  USHORT  UpdatedByUtility:1;         //[15]=Table updated by utility flag

	USHORT PS_SizeInBytes:7;	/* [14:8]=Size of parameter space in Bytes (multiple of a dword), */

  USHORT  PS_SizeInBytes:7;           //[14:8]=Size of parameter space in Bytes (multiple of a dword), 

	USHORT WS_SizeInBytes:8;	/* [7:0]=Size of workspace in Bytes (in multiple of a dword), */

  USHORT  WS_SizeInBytes:8;           //[7:0]=Size of workspace in Bytes (in multiple of a dword), 

	USHORT PS_SizeInBytes:7;	/* [14:8]=Size of parameter space in Bytes (multiple of a dword), */

  USHORT  PS_SizeInBytes:7;           //[14:8]=Size of parameter space in Bytes (multiple of a dword), 

typedef union _ATOM_TABLE_ATTRIBUTE_ACCESS {

{

	ATOM_TABLE_ATTRIBUTE sbfAccess;

	ATOM_TABLE_ATTRIBUTE sbfAccess;

	USHORT susAccess;

	USHORT susAccess;

/****************************************************************************/

typedef struct _ATOM_COMMON_ROM_COMMAND_TABLE_HEADER

} ATOM_COMMON_ROM_COMMAND_TABLE_HEADER;

}ATOM_COMMON_ROM_COMMAND_TABLE_HEADER;

/****************************************************************************/

/****************************************************************************/

// Structures used by ComputeMemoryEnginePLLTable

/*  Structures used by ComputeMemoryEnginePLLTable */

/****************************************************************************/

/****************************************************************************/

#define COMPUTE_MEMORY_PLL_PARAM        1

#define COMPUTE_MEMORY_PLL_PARAM        1

#define COMPUTE_ENGINE_PLL_PARAM        2

typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS

typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS {

  ULONG   ulClock;        //When returen, it's the re-calculated clock based on given Fb_div Post_Div and ref_div

	ULONG ulClock;		/* When returen, it's the re-calculated clock based on given Fb_div Post_Div and ref_div */

  UCHAR   ucAction;       //0:reserved //1:Memory //2:Engine  

	UCHAR ucAction;		/* 0:reserved //1:Memory //2:Engine */

  UCHAR   ucReserved;     //may expand to return larger Fbdiv later

	UCHAR ucReserved;	/* may expand to return larger Fbdiv later */

  UCHAR   ucFbDiv;        //return value

} COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS;

typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V2

{

typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V2 {

  ULONG   ulClock;        //When return, [23:0] return real clock 

	ULONG ulClock;		/* When return, [23:0] return real clock */

  UCHAR   ucAction;       //0:reserved;COMPUTE_MEMORY_PLL_PARAM:Memory;COMPUTE_ENGINE_PLL_PARAM:Engine. it return ref_div to be written to register

	UCHAR ucAction;		/* 0:reserved;COMPUTE_MEMORY_PLL_PARAM:Memory;COMPUTE_ENGINE_PLL_PARAM:Engine. it return ref_div to be written to register */

  USHORT  usFbDiv;		    //return Feedback value to be written to register

	USHORT usFbDiv;		/* return Feedback value to be written to register */

  UCHAR   ucPostDiv;      //return post div to be written to register

} COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V2;

#define COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_PS_ALLOCATION   COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS

#define COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_PS_ALLOCATION   COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS

#define SET_CLOCK_FREQ_MASK                     0x00FFFFFF	/* Clock change tables only take bit [23:0] as the requested clock value */

#define SET_CLOCK_FREQ_MASK                     0x00FFFFFF  //Clock change tables only take bit [23:0] as the requested clock value

#define USE_NON_BUS_CLOCK_MASK                  0x01000000	/* Applicable to both memory and engine clock change, when set, it uses another clock as the temporary clock (engine uses memory and vice versa) */

#define USE_NON_BUS_CLOCK_MASK                  0x01000000  //Applicable to both memory and engine clock change, when set, it uses another clock as the temporary clock (engine uses memory and vice versa)

#define USE_MEMORY_SELF_REFRESH_MASK            0x02000000	/* Only applicable to memory clock change, when set, using memory self refresh during clock transition */

#define USE_MEMORY_SELF_REFRESH_MASK            0x02000000	//Only applicable to memory clock change, when set, using memory self refresh during clock transition

#define FIRST_TIME_CHANGE_CLOCK									0x08000000	/* Applicable to both memory and engine clock change,when set, it means this is 1st time to change clock after ASIC bootup */

#define SKIP_SW_PROGRAM_PLL											0x10000000	//Applicable to both memory and engine clock change, when set, it means the table will not program SPLL/MPLL

#define SKIP_SW_PROGRAM_PLL											0x10000000	/* Applicable to both memory and engine clock change, when set, it means the table will not program SPLL/MPLL */

#define USE_SS_ENABLED_PIXEL_CLOCK  USE_NON_BUS_CLOCK_MASK

#define b3USE_NON_BUS_CLOCK_MASK                  0x01       //Applicable to both memory and engine clock change, when set, it uses another clock as the temporary clock (engine uses memory and vice versa)

#define b3USE_NON_BUS_CLOCK_MASK                  0x01	/* Applicable to both memory and engine clock change, when set, it uses another clock as the temporary clock (engine uses memory and vice versa) */

#define b3USE_MEMORY_SELF_REFRESH                 0x02	     //Only applicable to memory clock change, when set, using memory self refresh during clock transition

#define b3FIRST_TIME_CHANGE_CLOCK									0x08	/* Applicable to both memory and engine clock change,when set, it means this is 1st time to change clock after ASIC bootup */

#define b3SKIP_SW_PROGRAM_PLL											0x10			 //Applicable to both memory and engine clock change, when set, it means the table will not program SPLL/MPLL

#if ATOM_BIG_ENDIAN

  ULONG ulComputeClockFlag:8;                 // =1: COMPUTE_MEMORY_PLL_PARAM, =2: COMPUTE_ENGINE_PLL_PARAM

	ULONG ulComputeClockFlag:8;	/*  =1: COMPUTE_MEMORY_PLL_PARAM, =2: COMPUTE_ENGINE_PLL_PARAM */

#else

	ULONG ulClockFreq:24;	/*  in unit of 10kHz */

  ULONG ulComputeClockFlag:8;                 // =1: COMPUTE_MEMORY_PLL_PARAM, =2: COMPUTE_ENGINE_PLL_PARAM

#else

#endif

	ULONG ulComputeClockFlag:8;	/*  =1: COMPUTE_MEMORY_PLL_PARAM, =2: COMPUTE_ENGINE_PLL_PARAM */

#endif

typedef struct _ATOM_S_MPLL_FB_DIVIDER

} ATOM_COMPUTE_CLOCK_FREQ;

{

	USHORT usFbDivFrac;

}ATOM_S_MPLL_FB_DIVIDER;

typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3 {

#define ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE         4

	};

typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4

  ULONG  ucPostDiv;          //return parameter: post divider which is used to program to register directly

#define ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN          1

}COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4;

#define ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE            2

typedef struct _DYNAMICE_MEMORY_SETTINGS_PARAMETER

	ATOM_COMPUTE_CLOCK_FREQ ulClock;

typedef struct _DYNAMICE_MEMORY_SETTINGS_PARAMETER {

}DYNAMICE_MEMORY_SETTINGS_PARAMETER;

	ATOM_COMPUTE_CLOCK_FREQ ulClock;

	ATOM_COMPUTE_CLOCK_FREQ ulClock;

	ULONG ulReserved;

	ULONG ulMemoryClock;

} DYNAMICE_ENGINE_SETTINGS_PARAMETER;

// Structures used by SetEngineClockTable

typedef struct _SET_ENGINE_CLOCK_PARAMETERS

typedef struct _SET_ENGINE_CLOCK_PARAMETERS {

} SET_ENGINE_CLOCK_PARAMETERS;

{

	COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_PS_ALLOCATION sReserved;

typedef struct _SET_ENGINE_CLOCK_PS_ALLOCATION {

}SET_ENGINE_CLOCK_PS_ALLOCATION;

	COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_PS_ALLOCATION sReserved;

/****************************************************************************/

typedef struct _SET_MEMORY_CLOCK_PARAMETERS

/****************************************************************************/

}SET_MEMORY_CLOCK_PARAMETERS;

	ULONG ulTargetMemoryClock;	/* In 10Khz unit */

typedef struct _SET_MEMORY_CLOCK_PS_ALLOCATION

} SET_MEMORY_CLOCK_PARAMETERS;

  ULONG ulTargetMemoryClock;          //In 10Khz unit

} SET_MEMORY_CLOCK_PS_ALLOCATION;

// Structures used by ASIC_Init.ctb

/****************************************************************************/

typedef struct _ASIC_INIT_PARAMETERS

/*  Structures used by ASIC_Init.ctb */

  ULONG ulDefaultEngineClock;         //In 10Khz unit

} ASIC_INIT_PARAMETERS;

{

typedef struct _ASIC_INIT_PS_ALLOCATION {

  SET_ENGINE_CLOCK_PS_ALLOCATION sReserved; //Caller doesn't need to init this structure

	ASIC_INIT_PARAMETERS sASICInitClocks;

	SET_ENGINE_CLOCK_PS_ALLOCATION sReserved;	/* Caller doesn't need to init this structure */

/****************************************************************************/

} ASIC_INIT_PS_ALLOCATION;

// Structure used by DynamicClockGatingTable.ctb

/****************************************************************************/

typedef struct _DYNAMIC_CLOCK_GATING_PARAMETERS 

/****************************************************************************/

  UCHAR ucEnable;                     // ATOM_ENABLE or ATOM_DISABLE

	UCHAR ucEnable;		/*  ATOM_ENABLE or ATOM_DISABLE */

#define  DYNAMIC_CLOCK_GATING_PS_ALLOCATION  DYNAMIC_CLOCK_GATING_PARAMETERS

#define  DYNAMIC_CLOCK_GATING_PS_ALLOCATION  DYNAMIC_CLOCK_GATING_PARAMETERS

// Structure used by EnableASIC_StaticPwrMgtTable.ctb

/****************************************************************************/

typedef struct _ENABLE_ASIC_STATIC_PWR_MGT_PARAMETERS

/*  Structure used by EnableASIC_StaticPwrMgtTable.ctb */

  UCHAR ucEnable;                     // ATOM_ENABLE or ATOM_DISABLE

/****************************************************************************/

	UCHAR ucPadding[3];

typedef struct _ENABLE_ASIC_STATIC_PWR_MGT_PARAMETERS {

}ENABLE_ASIC_STATIC_PWR_MGT_PARAMETERS;

	UCHAR ucEnable;		/*  ATOM_ENABLE or ATOM_DISABLE */

#define ENABLE_ASIC_STATIC_PWR_MGT_PS_ALLOCATION  ENABLE_ASIC_STATIC_PWR_MGT_PARAMETERS

	UCHAR ucPadding[3];

/****************************************************************************/

typedef struct _DAC_LOAD_DETECTION_PARAMETERS

/*  Structures used by DAC_LoadDetectionTable.ctb */

{

/****************************************************************************/

  USHORT usDeviceID;                  //{ATOM_DEVICE_CRTx_SUPPORT,ATOM_DEVICE_TVx_SUPPORT,ATOM_DEVICE_CVx_SUPPORT}

	USHORT usDeviceID;	/* {ATOM_DEVICE_CRTx_SUPPORT,ATOM_DEVICE_TVx_SUPPORT,ATOM_DEVICE_CVx_SUPPORT} */

  UCHAR  ucMisc;											//Valid only when table revision =1.3 and above

	UCHAR ucDacType;	/* {ATOM_DAC_A,ATOM_DAC_B, ATOM_EXT_DAC} */

} DAC_LOAD_DETECTION_PARAMETERS;

#define DAC_LOAD_MISC_YPrPb						0x01

/*  DAC_LOAD_DETECTION_PARAMETERS.ucMisc */

typedef struct _DAC_LOAD_DETECTION_PS_ALLOCATION

#define DAC_LOAD_MISC_YPrPb						0x01

{

	DAC_LOAD_DETECTION_PARAMETERS sDacload;

typedef struct _DAC_LOAD_DETECTION_PS_ALLOCATION {

  ULONG                                    Reserved[2];// Don't set this one, allocation for EXT DAC

	DAC_LOAD_DETECTION_PARAMETERS sDacload;

}DAC_LOAD_DETECTION_PS_ALLOCATION;

	ULONG Reserved[2];	/*  Don't set this one, allocation for EXT DAC */

} DAC_LOAD_DETECTION_PS_ALLOCATION;

/****************************************************************************/

/****************************************************************************/

/****************************************************************************/

/*  Structures used by DAC1EncoderControlTable.ctb and DAC2EncoderControlTable.ctb */

typedef struct _DAC_ENCODER_CONTROL_PARAMETERS 

/****************************************************************************/

{

typedef struct _DAC_ENCODER_CONTROL_PARAMETERS {

  USHORT usPixelClock;                // in 10KHz; for bios convenient

	USHORT usPixelClock;	/*  in 10KHz; for bios convenient */

  UCHAR  ucDacStandard;               // See definition of ATOM_DACx_xxx, For DEC3.0, bit 7 used as internal flag to indicate DAC2 (==1) or DAC1 (==0)

	UCHAR ucDacStandard;	/*  See definition of ATOM_DACx_xxx, For DEC3.0, bit 7 used as internal flag to indicate DAC2 (==1) or DAC1 (==0) */

  UCHAR  ucAction;                    // 0: turn off encoder

#define DAC_ENCODER_CONTROL_PS_ALLOCATION  DAC_ENCODER_CONTROL_PARAMETERS

#define ATOM_ENCODER_CONFIG_DIGB								  0x80	/*  VBIOS Internal use, outside SW should set this bit=0 */

#define ATOM_ENCODER_CONFIG_DIGB								  0x80			// VBIOS Internal use, outside SW should set this bit=0

/*  ucAction */

// ucAction

/*  ATOM_ENABLE:  Enable Encoder */

// ATOM_ENABLE:  Enable Encoder

/*  ATOM_DISABLE: Disable Encoder */

// ATOM_DISABLE: Disable Encoder

#define ATOM_ENCODER_MODE_CRT											15

#define ATOM_ENCODER_MODE_CRT											15

#if ATOM_BIG_ENDIAN

#if ATOM_BIG_ENDIAN

	UCHAR ucReserved1:2;

	UCHAR ucReserved1:2;

	UCHAR ucLinkSel:1;	/*  =0: linkA/C/E =1: linkB/D/F */

    UCHAR ucLinkSel:1;            // =0: linkA/C/E =1: linkB/D/F

	UCHAR ucDPLinkRate:1;	/*  =0: 1.62Ghz, =1: 2.7Ghz */

    UCHAR ucDPLinkRate:1;         // =0: 1.62Ghz, =1: 2.7Ghz

	UCHAR ucDPLinkRate:1;	/*  =0: 1.62Ghz, =1: 2.7Ghz */

    UCHAR ucDPLinkRate:1;         // =0: 1.62Ghz, =1: 2.7Ghz

	UCHAR ucReserved:1;

	UCHAR ucReserved:1;

#endif

}ATOM_DIG_ENCODER_CONFIG_V2;

} ATOM_DIG_ENCODER_CONFIG_V2;

	ATOM_DIG_ENCODER_CONFIG_V2 acConfig;

	ATOM_DIG_ENCODER_CONFIG_V2 acConfig;

	UCHAR ucAction;

	UCHAR ucAction;

	UCHAR ucEncoderMode;

	UCHAR ucEncoderMode;

	/*  =0: DP   encoder */

                            // =0: DP   encoder      

	/*  =1: LVDS encoder */

                            // =1: LVDS encoder          

	/*  =2: DVI  encoder */

                            // =2: DVI  encoder  

	/*  =3: HDMI encoder */

                            // =4: SDVO encoder

	UCHAR ucLaneNum;	/*  how many lanes to enable */

  UCHAR ucStatus;           // = DP_LINK_TRAINING_COMPLETE or DP_LINK_TRAINING_INCOMPLETE, only used by VBIOS with command ATOM_ENCODER_CMD_QUERY_DP_LINK_TRAINING_STATUS

/****************************************************************************/

/****************************************************************************/

/*  Structures used by UNIPHYTransmitterControlTable */

// Structures used by UNIPHYTransmitterControlTable

/*                     LVTMATransmitterControlTable */

//                    LVTMATransmitterControlTable

/****************************************************************************/

/****************************************************************************/

} ATOM_DP_VS_MODE;

}ATOM_DP_VS_MODE;

typedef struct _DIG_TRANSMITTER_CONTROL_PARAMETERS

typedef struct _DIG_TRANSMITTER_CONTROL_PARAMETERS {

	union

	union {

	{

		USHORT usPixelClock;	/*  in 10KHz; for bios convenient */

  USHORT usPixelClock;		// in 10KHz; for bios convenient

	};

	};

	UCHAR ucConfig;

	UCHAR ucConfig;

	/*  [0]=0: 4 lane Link, */

													// [0]=0: 4 lane Link,      

	/*     =1: 8 lane Link ( Dual Links TMDS ) */

													//    =1: 8 lane Link ( Dual Links TMDS ) 

	/*  [1]=0: InCoherent mode */

                          // [1]=0: InCoherent mode   

	/*     =1: Coherent Mode */

													//    =1: Coherent Mode										

	/*  [2] Link Select: */

													// [2] Link Select:

	/*  =0: PHY linkA   if bfLane<3 */

  												// =0: PHY linkA   if bfLane<3

	/*  =1: PHY linkB   if bfLanes<3 */

													// =1: PHY linkB   if bfLanes<3

	/*  =0: PHY linkA+B if bfLanes=3 */

		  										// =0: PHY linkA+B if bfLanes=3		

	/*  [5:4]PCIE lane Sel */

                          // [5:4]PCIE lane Sel

	/*  =0: lane 0~3 or 0~7 */

                          // =0: lane 0~3 or 0~7

	/*  =1: lane 4~7 */

                          // =1: lane 4~7

	/*  =2: lane 8~11 or 8~15 */

                          // =2: lane 8~11 or 8~15

	/*  =3: lane 12~15 */

                          // =3: lane 12~15 

} DIG_TRANSMITTER_CONTROL_PARAMETERS;

}DIG_TRANSMITTER_CONTROL_PARAMETERS;

#define DIG_TRANSMITTER_CONTROL_PS_ALLOCATION		DIG_TRANSMITTER_CONTROL_PARAMETERS

#define DIG_TRANSMITTER_CONTROL_PS_ALLOCATION		DIG_TRANSMITTER_CONTROL_PARAMETERS

#define ATOM_TRANSMITTER_CONFIG_LINK_SEL_MASK		0x04

#define ATOM_TRANSMITTER_CONFIG_LINK_SEL_MASK		0x04

#define ATOM_TRANSMITTER_CONFIG_LINKA						0x00

#define ATOM_TRANSMITTER_CONFIG_LINKA						0x00

#define ATOM_TRANSMITTER_CONFIG_LINKB						0x04

#define ATOM_TRANSMITTER_CONFIG_LINKB						0x04

/*  Following are used for DigTransmitterControlTable ver1.2 */

// Following are used for DigTransmitterControlTable ver1.2

#if ATOM_BIG_ENDIAN

#if ATOM_BIG_ENDIAN

	UCHAR ucTransmitterSel:2;	/* bit7:6: =0 Dig Transmitter 1 ( Uniphy AB ) */

  UCHAR ucTransmitterSel:2;         //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )

	/*         =1 Dig Transmitter 2 ( Uniphy CD ) */

                                    //        =1 Dig Transmitter 2 ( Uniphy CD )

	UCHAR ucReserved:1;

	UCHAR ucReserved:1;

	UCHAR fDPConnector:1;	/* bit4=0: DP connector  =1: None DP connector */

  UCHAR fDPConnector:1;             //bit4=0: DP connector  =1: None DP connector

	UCHAR ucEncoderSel:1;	/* bit3=0: Data/Clk path source from DIGA( DIG inst0 ). =1: Data/clk path source from DIGB ( DIG inst1 ) */

  UCHAR ucEncoderSel:1;             //bit3=0: Data/Clk path source from DIGA( DIG inst0 ). =1: Data/clk path source from DIGB ( DIG inst1 )

	UCHAR ucLinkSel:1;	/* bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E */

  UCHAR ucLinkSel:1;                //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E

	/*     =1: Uniphy LINKB or D or F when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is B or D or F */

                                    //    =1: Uniphy LINKB or D or F when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is B or D or F

	UCHAR fDualLinkConnector:1;	/* bit0=1: Dual Link DVI connector */

  UCHAR fDualLinkConnector:1;       //bit0=1: Dual Link DVI connector

#else

#else

	UCHAR fDualLinkConnector:1;	/* bit0=1: Dual Link DVI connector */

  UCHAR fDualLinkConnector:1;       //bit0=1: Dual Link DVI connector

	UCHAR fCoherentMode:1;	/* bit1=1: Coherent Mode ( for DVI/HDMI mode ) */

  UCHAR fCoherentMode:1;            //bit1=1: Coherent Mode ( for DVI/HDMI mode )

	UCHAR ucLinkSel:1;	/* bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E */

  UCHAR ucLinkSel:1;                //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E

	/*     =1: Uniphy LINKB or D or F when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is B or D or F */

                                    //    =1: Uniphy LINKB or D or F when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is B or D or F

	UCHAR fDPConnector:1;	/* bit4=0: DP connector  =1: None DP connector */

  UCHAR fDPConnector:1;             //bit4=0: DP connector  =1: None DP connector

	UCHAR ucReserved:1;

	UCHAR ucReserved:1;

	UCHAR ucTransmitterSel:2;	/* bit7:6: =0 Dig Transmitter 1 ( Uniphy AB ) */

  UCHAR ucTransmitterSel:2;         //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )

#endif

#endif

} ATOM_DIG_TRANSMITTER_CONFIG_V2;

}ATOM_DIG_TRANSMITTER_CONFIG_V2;

/* ucConfig */

//ucConfig 

#define ATOM_TRANSMITTER_CONFIG_V2_DUAL_LINK_CONNECTOR			0x01

#define ATOM_TRANSMITTER_CONFIG_V2_DUAL_LINK_CONNECTOR			0x01

#define ATOM_TRANSMITTER_CONFIG_V2_LINK_SEL_MASK		        0x04

#define ATOM_TRANSMITTER_CONFIG_V2_LINK_SEL_MASK		        0x04

#define ATOM_TRANSMITTER_CONFIG_V2_LINKA			            0x00

#define ATOM_TRANSMITTER_CONFIG_V2_LINKA			            0x00

#define ATOM_TRANSMITTER_CONFIG_V2_LINKB				            0x04

#define ATOM_TRANSMITTER_CONFIG_V2_LINKB				            0x04

/*  Bit3 */

// Bit3

#define ATOM_TRANSMITTER_CONFIG_V2_DIG1_ENCODER		          0x00	/*  only used when ucAction == ATOM_TRANSMITTER_ACTION_ENABLE or ATOM_TRANSMITTER_ACTION_SETUP */

#define ATOM_TRANSMITTER_CONFIG_V2_DIG1_ENCODER		          0x00				// only used when ucAction == ATOM_TRANSMITTER_ACTION_ENABLE or ATOM_TRANSMITTER_ACTION_SETUP

#define ATOM_TRANSMITTER_CONFIG_V2_DIG2_ENCODER		          0x08	/*  only used when ucAction == ATOM_TRANSMITTER_ACTION_ENABLE or ATOM_TRANSMITTER_ACTION_SETUP */

#define ATOM_TRANSMITTER_CONFIG_V2_DIG2_ENCODER		          0x08				// only used when ucAction == ATOM_TRANSMITTER_ACTION_ENABLE or ATOM_TRANSMITTER_ACTION_SETUP

/*  Bit4 */

// Bit4

#define ATOM_TRASMITTER_CONFIG_V2_DP_CONNECTOR			        0x10

#define ATOM_TRANSMITTER_CONFIG_V2_TRANSMITTER_SEL_MASK     0xC0

/*  Bit7:6 */

#define ATOM_TRANSMITTER_CONFIG_V2_TRANSMITTER1           	0x00	//AB

#define ATOM_TRANSMITTER_CONFIG_V2_TRANSMITTER_SEL_MASK     0xC0

#define ATOM_TRANSMITTER_CONFIG_V2_TRANSMITTER2           	0x40	//CD

#define ATOM_TRANSMITTER_CONFIG_V2_TRANSMITTER3			0x80	/* EF */

typedef struct _DIG_TRANSMITTER_CONTROL_PARAMETERS_V2

	UCHAR ucAction;		/*  define as ATOM_TRANSMITER_ACTION_XXX */

#define ATOM_TRANSMITTER_CONFIG_V3_TRANSMITTER1           	0x00	//AB

	UCHAR ucReserved[4];

#define ATOM_TRANSMITTER_CONFIG_V3_TRANSMITTER3           	0x80	//EF

} DIG_TRANSMITTER_CONTROL_PARAMETERS_V2;

/****************************************************************************/	

/****************************************************************************/

// Structures used by DAC1OuputControlTable

/*  Structures used by DAC1OuputControlTable */

//                    DAC2OuputControlTable

/****************************************************************************/

/****************************************************************************/

/****************************************************************************/

/****************************************************************************/

typedef struct _BLANK_CRTC_PARAMETERS {

{

	UCHAR ucCRTC;		/*  ATOM_CRTC1 or ATOM_CRTC2 */

  UCHAR  ucCRTC;                    	// ATOM_CRTC1 or ATOM_CRTC2

/****************************************************************************/

/****************************************************************************/

/*  Structures used by EnableCRTCTable */

// Structures used by EnableCRTCTable

/*                     EnableCRTCMemReqTable */

//                    EnableCRTCMemReqTable

/*                     UpdateCRTC_DoubleBufferRegistersTable */

//                    UpdateCRTC_DoubleBufferRegistersTable

/****************************************************************************/

typedef struct _ENABLE_CRTC_PARAMETERS

typedef struct _ENABLE_CRTC_PARAMETERS {

{

#define ENABLE_CRTC_PS_ALLOCATION   ENABLE_CRTC_PARAMETERS

#define ENABLE_CRTC_PS_ALLOCATION   ENABLE_CRTC_PARAMETERS

/****************************************************************************/

/****************************************************************************/

/*  Structures used by SetCRTC_OverScanTable */

/****************************************************************************/

/****************************************************************************/

typedef struct _SET_CRTC_OVERSCAN_PARAMETERS

typedef struct _SET_CRTC_OVERSCAN_PARAMETERS {

{

	USHORT usOverscanRight;	/*  right */

  USHORT usOverscanRight;             // right

	USHORT usOverscanLeft;	/*  left */

  USHORT usOverscanLeft;              // left

} SET_CRTC_OVERSCAN_PARAMETERS;

}SET_CRTC_OVERSCAN_PARAMETERS;

/****************************************************************************/

// Structures used by SetCRTC_ReplicationTable

/*  Structures used by SetCRTC_ReplicationTable */

/****************************************************************************/

/****************************************************************************/

typedef struct _SET_CRTC_REPLICATION_PARAMETERS

	UCHAR ucPadding;

	UCHAR ucPadding;

#define SET_CRTC_REPLICATION_PS_ALLOCATION  SET_CRTC_REPLICATION_PARAMETERS

#define SET_CRTC_REPLICATION_PS_ALLOCATION  SET_CRTC_REPLICATION_PARAMETERS

/****************************************************************************/

/****************************************************************************/

// Structures used by SelectCRTC_SourceTable

	UCHAR ucCRTC;		/*  ATOM_CRTC1 or ATOM_CRTC2 */

  UCHAR ucCRTC;                    	  // ATOM_CRTC1 or ATOM_CRTC2

	UCHAR ucDevice;		/*  ATOM_DEVICE_CRT1|ATOM_DEVICE_CRT2|.... */

	UCHAR ucPadding[2];

	UCHAR ucPadding[2];

}SELECT_CRTC_SOURCE_PARAMETERS;

} SELECT_CRTC_SOURCE_PARAMETERS;

#define SELECT_CRTC_SOURCE_PS_ALLOCATION  SELECT_CRTC_SOURCE_PARAMETERS

typedef struct _SELECT_CRTC_SOURCE_PARAMETERS_V2 {

{

	UCHAR ucCRTC;		/*  ATOM_CRTC1 or ATOM_CRTC2 */

  UCHAR ucCRTC;                    	  // ATOM_CRTC1 or ATOM_CRTC2

	UCHAR ucEncoderID;	/*  DAC1/DAC2/TVOUT/DIG1/DIG2/DVO */

  UCHAR ucEncoderID;                  // DAC1/DAC2/TVOUT/DIG1/DIG2/DVO

	UCHAR ucEncodeMode;	/*  Encoding mode, only valid when using DIG1/DIG2/DVO */

  UCHAR ucEncodeMode;									// Encoding mode, only valid when using DIG1/DIG2/DVO

	UCHAR ucPadding;

	UCHAR ucPadding;

} SELECT_CRTC_SOURCE_PARAMETERS_V2;

}SELECT_CRTC_SOURCE_PARAMETERS_V2;

/* ucEncoderID */

//ucEncoderID

/* #define ASIC_INT_DAC1_ENCODER_ID                                              0x00 */

//#define ASIC_INT_DAC1_ENCODER_ID    						0x00 

/* #define ASIC_INT_TV_ENCODER_ID                                                                        0x02 */

//#define ASIC_INT_TV_ENCODER_ID									0x02

/* #define ASIC_INT_DIG1_ENCODER_ID                                                              0x03 */

//#define ASIC_INT_DIG1_ENCODER_ID								0x03

/* #define ASIC_INT_DAC2_ENCODER_ID                                                              0x04 */

//#define ASIC_INT_DAC2_ENCODER_ID								0x04

/* #define ASIC_EXT_TV_ENCODER_ID                                                                        0x06 */

//#define ASIC_EXT_TV_ENCODER_ID									0x06

/* #define ASIC_INT_DVO_ENCODER_ID                                                                       0x07 */

//#define ASIC_INT_DVO_ENCODER_ID									0x07

/* #define ASIC_INT_DIG2_ENCODER_ID                                                              0x09 */

//#define ASIC_INT_DIG2_ENCODER_ID								0x09

/* #define ASIC_EXT_DIG_ENCODER_ID                                                                       0x05 */

//#define ASIC_EXT_DIG_ENCODER_ID									0x05

/* ucEncodeMode */

//ucEncodeMode

/* #define ATOM_ENCODER_MODE_DP                                                                          0 */

//#define ATOM_ENCODER_MODE_DP										0

/* #define ATOM_ENCODER_MODE_LVDS                                                                        1 */

//#define ATOM_ENCODER_MODE_LVDS									1

/* #define ATOM_ENCODER_MODE_DVI                                                                         2 */

//#define ATOM_ENCODER_MODE_DVI										2

/* #define ATOM_ENCODER_MODE_HDMI                                                                        3 */

//#define ATOM_ENCODER_MODE_HDMI									3

/* #define ATOM_ENCODER_MODE_SDVO                                                                        4 */

//#define ATOM_ENCODER_MODE_SDVO									4

/* #define ATOM_ENCODER_MODE_TV                                                                          13 */

//#define ATOM_ENCODER_MODE_TV										13

/* #define ATOM_ENCODER_MODE_CV                                                                          14 */

//#define ATOM_ENCODER_MODE_CV										14

/* #define ATOM_ENCODER_MODE_CRT                                                                         15 */

//#define ATOM_ENCODER_MODE_CRT										15

/****************************************************************************/	

/****************************************************************************/

// Structures used by SetPixelClockTable

/*  Structures used by SetPixelClockTable */

//                    GetPixelClockTable 

/*                     GetPixelClockTable */

/****************************************************************************/	

/****************************************************************************/

//Major revision=1., Minor revision=1

/* Major revision=1., Minor revision=1 */

typedef struct _PIXEL_CLOCK_PARAMETERS

typedef struct _PIXEL_CLOCK_PARAMETERS {

{

	USHORT usPixelClock;	/*  in 10kHz unit; for bios convenient = (RefClk*FB_Div)/(Ref_Div*Post_Div) */

  USHORT usPixelClock;                // in 10kHz unit; for bios convenient = (RefClk*FB_Div)/(Ref_Div*Post_Div)

	/*  0 means disable PPLL */

                                      // 0 means disable PPLL

	UCHAR ucPostDiv;	/*  post divider */

  UCHAR  ucPostDiv;                   // post divider	

	UCHAR ucFracFbDiv;	/*  fractional feedback divider */

  UCHAR  ucFracFbDiv;                 // fractional feedback divider

	UCHAR ucPadding;

	UCHAR ucPadding;

} PIXEL_CLOCK_PARAMETERS;

//Major revision=1., Minor revision=2, add ucMiscIfno

/* Major revision=1., Minor revision=2, add ucMiscIfno */

//ucMiscInfo:

/* ucMiscInfo: */

#define MISC_FORCE_REPROG_PIXEL_CLOCK 0x1

#define MISC_FORCE_REPROG_PIXEL_CLOCK 0x1

#define MISC_DEVICE_INDEX_MASK        0xF0

#define MISC_DEVICE_INDEX_MASK        0xF0

#define MISC_DEVICE_INDEX_SHIFT       4

#define MISC_DEVICE_INDEX_SHIFT       4

typedef struct _PIXEL_CLOCK_PARAMETERS_V2

typedef struct _PIXEL_CLOCK_PARAMETERS_V2 {

{

	USHORT usPixelClock;	/*  in 10kHz unit; for bios convenient = (RefClk*FB_Div)/(Ref_Div*Post_Div) */

  USHORT usPixelClock;                // in 10kHz unit; for bios convenient = (RefClk*FB_Div)/(Ref_Div*Post_Div)

	USHORT usRefDiv;	/*  Reference divider */

  USHORT usRefDiv;                    // Reference divider

	USHORT usFbDiv;		/*  feedback divider */

  USHORT usFbDiv;                     // feedback divider

	UCHAR ucPostDiv;	/*  post divider */

  UCHAR  ucPostDiv;                   // post divider	

	UCHAR ucFracFbDiv;	/*  fractional feedback divider */

  UCHAR  ucFracFbDiv;                 // fractional feedback divider

	UCHAR ucPpll;		/*  ATOM_PPLL1 or ATOM_PPL2 */

  UCHAR  ucPpll;                      // ATOM_PPLL1 or ATOM_PPL2

	UCHAR ucRefDivSrc;	/*  ATOM_PJITTER or ATO_NONPJITTER */

  UCHAR  ucRefDivSrc;                 // ATOM_PJITTER or ATO_NONPJITTER

	UCHAR ucCRTC;		/*  Which CRTC uses this Ppll */

  UCHAR  ucCRTC;                      // Which CRTC uses this Ppll

	UCHAR ucMiscInfo;	/*  Different bits for different purpose, bit [7:4] as device index, bit[0]=Force prog */

  UCHAR  ucMiscInfo;                  // Different bits for different purpose, bit [7:4] as device index, bit[0]=Force prog

} PIXEL_CLOCK_PARAMETERS_V2;

}PIXEL_CLOCK_PARAMETERS_V2;

/* Major revision=1., Minor revision=3, structure/definition change */

//Major revision=1., Minor revision=3, structure/definition change

/* ucEncoderMode: */

//ucEncoderMode:

/* ATOM_ENCODER_MODE_DP */

//ATOM_ENCODER_MODE_DP

/* ATOM_ENOCDER_MODE_LVDS */

//ATOM_ENOCDER_MODE_LVDS

/* ATOM_ENOCDER_MODE_DVI */

//ATOM_ENOCDER_MODE_DVI

/* ATOM_ENOCDER_MODE_HDMI */

//ATOM_ENOCDER_MODE_HDMI

/* ATOM_ENOCDER_MODE_SDVO */

//ATOM_ENOCDER_MODE_SDVO

/* ATOM_ENCODER_MODE_TV                                                                          13 */

//ATOM_ENCODER_MODE_TV										13

/* ATOM_ENCODER_MODE_CV                                                                          14 */

//ATOM_ENCODER_MODE_CV										14

/* ATOM_ENCODER_MODE_CRT                                                                         15 */

//ATOM_ENCODER_MODE_CRT										15

/* #define DVO_ENCODER_CONFIG_LOW12BIT                                                   0x00 */

//ucMiscInfo: also changed, see below

/* #define DVO_ENCODER_CONFIG_UPPER12BIT                                         0x04 */

#define PIXEL_CLOCK_MISC_VGA_MODE										0x02

/* #define DVO_ENCODER_CONFIG_24BIT                                                              0x08 */

#define PIXEL_CLOCK_MISC_CRTC_SEL_MASK							0x04

#define PIXEL_CLOCK_MISC_CRTC_SEL_CRTC1							0x00

/* ucMiscInfo: also changed, see below */

#define PIXEL_CLOCK_MISC_CRTC_SEL_CRTC2							0x04

#define PIXEL_CLOCK_MISC_FORCE_PROG_PPLL						0x01

#define PIXEL_CLOCK_MISC_USE_ENGINE_FOR_DISPCLK			0x08

#define PIXEL_CLOCK_MISC_VGA_MODE										0x02

#define PIXEL_CLOCK_MISC_REF_DIV_SRC                    0x10

#define PIXEL_CLOCK_MISC_CRTC_SEL_MASK							0x04

// V1.4 for RoadRunner

#define PIXEL_CLOCK_MISC_CRTC_SEL_CRTC1							0x00

#define PIXEL_CLOCK_V4_MISC_SS_ENABLE               0x10

#define PIXEL_CLOCK_MISC_CRTC_SEL_CRTC2							0x04

#define PIXEL_CLOCK_V4_MISC_COHERENT_MODE           0x20

#define PIXEL_CLOCK_MISC_USE_ENGINE_FOR_DISPCLK			0x08

typedef struct _PIXEL_CLOCK_PARAMETERS_V3

{

	USHORT usPixelClock;	/*  in 10kHz unit; for bios convenient = (RefClk*FB_Div)/(Ref_Div*Post_Div) */

                                      // 0 means disable PPLL. For VGA PPLL,make sure this value is not 0.

	/*  0 means disable PPLL. For VGA PPLL,make sure this value is not 0. */

  USHORT usRefDiv;                    // Reference divider

	UCHAR ucPpll;		/*  ATOM_PPLL1 or ATOM_PPL2 */

	union {

{

	UCHAR ucMiscInfo;	/*  bit[0]=Force program, bit[1]= set pclk for VGA, b[2]= CRTC sel */

	/*  bit[3]=0:use PPLL for dispclk source, =1: use engine clock for dispclock source */

{

} PIXEL_CLOCK_PARAMETERS_V3;

  PIXEL_CLOCK_PARAMETERS_V5 sDispClkInput;

typedef struct _ADJUST_DISPLAY_PLL_PARAMETERS {

  ULONG ulDispPllFreq;                 // return display PPLL freq which is used to generate the pixclock, and related idclk, symclk etc

	UCHAR ucTransmitterID;

  UCHAR ucPostDiv;                     // if it is none-zero, it is used to be calculated the other ppll parameter fb_divider

	UCHAR ucEncodeMode;

}ADJUST_DISPLAY_PLL_OUTPUT_PARAMETERS_V3;

	union {

} ADJUST_DISPLAY_PLL_PARAMETERS;

    ADJUST_DISPLAY_PLL_INPUT_PARAMETERS_V3  sInput;

#define ADJUST_DISPLAY_CONFIG_SS_ENABLE       0x10

  };

/*  Structures used by EnableYUVTable */

typedef struct _ENABLE_YUV_PARAMETERS

typedef struct _ENABLE_YUV_PARAMETERS {

  UCHAR ucEnable;                     // ATOM_ENABLE:Enable YUV or ATOM_DISABLE:Disable YUV (RGB)

	UCHAR ucEnable;		/*  ATOM_ENABLE:Enable YUV or ATOM_DISABLE:Disable YUV (RGB) */

	UCHAR ucPadding[2];

#define ENABLE_YUV_PS_ALLOCATION ENABLE_YUV_PARAMETERS

/****************************************************************************/

/****************************************************************************/

/****************************************************************************/

/*  Structures used by GetMemoryClockTable */

typedef struct _GET_MEMORY_CLOCK_PARAMETERS

/****************************************************************************/

{

typedef struct _GET_MEMORY_CLOCK_PARAMETERS {

} GET_MEMORY_CLOCK_PARAMETERS;

	ULONG ulReturnMemoryClock;	/*  current memory speed in 10KHz unit */

#define GET_MEMORY_CLOCK_PS_ALLOCATION  GET_MEMORY_CLOCK_PARAMETERS

} GET_MEMORY_CLOCK_PARAMETERS;

#define GET_MEMORY_CLOCK_PS_ALLOCATION  GET_MEMORY_CLOCK_PARAMETERS

/****************************************************************************/