WebSVN – Kolibri OS – Diff – /drivers/video/drm/radeon/atom.c


/*
 * Copyright 2008 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Author: Stanislaw Skowronek
 */
 
#include 
#include 
#include 
 
#define ATOM_DEBUG
 
#include "atom.h"
#include "atom-names.h"
#include "atom-bits.h"
 
#define ATOM_COND_ABOVE		0
#define ATOM_COND_ABOVEOREQUAL	1
#define ATOM_COND_ALWAYS	2
#define ATOM_COND_BELOW		3
#define ATOM_COND_BELOWOREQUAL	4
#define ATOM_COND_EQUAL		5
#define ATOM_COND_NOTEQUAL	6
 
#define ATOM_PORT_ATI	0
#define ATOM_PORT_PCI	1
#define ATOM_PORT_SYSIO	2
 
#define ATOM_UNIT_MICROSEC	0
#define ATOM_UNIT_MILLISEC	1
 
#define PLL_INDEX	2
#define PLL_DATA	3
 
typedef struct {
	struct atom_context *ctx;
 
	uint32_t *ps, *ws;
	int ps_shift;
	uint16_t start;
} atom_exec_context;
 
int atom_debug = 0;
static void atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
 
static uint32_t atom_arg_mask[8] =
    { 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000,
0xFF000000 };
static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
 
static int atom_dst_to_src[8][4] = {
	/* translate destination alignment field to the source alignment encoding */
	{0, 0, 0, 0},
	{1, 2, 3, 0},
	{1, 2, 3, 0},
	{1, 2, 3, 0},
	{4, 5, 6, 7},
	{4, 5, 6, 7},
	{4, 5, 6, 7},
	{4, 5, 6, 7},
};
static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
 
static int debug_depth = 0;
#ifdef ATOM_DEBUG
static void debug_print_spaces(int n)
{
	while (n--)
		printk("   ");
}
 
#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
#else
#define DEBUG(...) do { } while (0)
#define SDEBUG(...) do { } while (0)
#endif
 
static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
				 uint32_t index, uint32_t data)
{
	uint32_t temp = 0xCDCDCDCD;
	while (1)
		switch (CU8(base)) {
		case ATOM_IIO_NOP:
			base++;
			break;
		case ATOM_IIO_READ:
			temp = ctx->card->reg_read(ctx->card, CU16(base + 1));
			base += 3;
			break;
		case ATOM_IIO_WRITE:
			(void)ctx->card->reg_read(ctx->card, CU16(base + 1));
			ctx->card->reg_write(ctx->card, CU16(base + 1), temp);
			base += 3;
			break;
		case ATOM_IIO_CLEAR:
			temp &=
			    ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
			      CU8(base + 2));
			base += 3;
			break;
		case ATOM_IIO_SET:
			temp |=
			    (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
									2);
			base += 3;
			break;
		case ATOM_IIO_MOVE_INDEX:
			temp &=
			    ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
			      CU8(base + 2));
			temp |=
			    ((index >> CU8(base + 2)) &
			     (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
									  3);
			base += 4;
			break;
		case ATOM_IIO_MOVE_DATA:
			temp &=
			    ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
			      CU8(base + 2));
			temp |=
			    ((data >> CU8(base + 2)) &
			     (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
									  3);
			base += 4;
			break;
		case ATOM_IIO_MOVE_ATTR:
			temp &=
			    ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
			      CU8(base + 2));
			temp |=
			    ((ctx->
			      io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
									  CU8
									  (base
									   +
									   1))))
			    << CU8(base + 3);
			base += 4;
			break;
		case ATOM_IIO_END:
			return temp;
		default:
			printk(KERN_INFO "Unknown IIO opcode.\n");
			return 0;
		}
}
 
static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
				 int *ptr, uint32_t *saved, int print)
{
	uint32_t idx, val = 0xCDCDCDCD, align, arg;
	struct atom_context *gctx = ctx->ctx;
	arg = attr & 7;
	align = (attr >> 3) & 7;
	switch (arg) {
	case ATOM_ARG_REG:
		idx = U16(*ptr);
		(*ptr) += 2;
		if (print)
			DEBUG("REG[0x%04X]", idx);
		idx += gctx->reg_block;
		switch (gctx->io_mode) {
		case ATOM_IO_MM:
			val = gctx->card->reg_read(gctx->card, idx);
			break;
		case ATOM_IO_PCI:
			printk(KERN_INFO
			       "PCI registers are not implemented.\n");
			return 0;
		case ATOM_IO_SYSIO:
			printk(KERN_INFO
			       "SYSIO registers are not implemented.\n");
			return 0;
		default:
			if (!(gctx->io_mode & 0x80)) {
				printk(KERN_INFO "Bad IO mode.\n");
				return 0;
			}
			if (!gctx->iio[gctx->io_mode & 0x7F]) {
				printk(KERN_INFO
				       "Undefined indirect IO read method %d.\n",
				       gctx->io_mode & 0x7F);
				return 0;
			}
			val =
			    atom_iio_execute(gctx,
					     gctx->iio[gctx->io_mode & 0x7F],
					     idx, 0);
		}
		break;
	case ATOM_ARG_PS:
		idx = U8(*ptr);
		(*ptr)++;
		/* get_unaligned_le32 avoids unaligned accesses from atombios
		 * tables, noticed on a DEC Alpha. */
		val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
		if (print)
			DEBUG("PS[0x%02X,0x%04X]", idx, val);
		break;
	case ATOM_ARG_WS:
		idx = U8(*ptr);
		(*ptr)++;
		if (print)
			DEBUG("WS[0x%02X]", idx);
		switch (idx) {
		case ATOM_WS_QUOTIENT:
			val = gctx->divmul[0];
			break;
		case ATOM_WS_REMAINDER:
			val = gctx->divmul[1];
			break;
		case ATOM_WS_DATAPTR:
			val = gctx->data_block;
			break;
		case ATOM_WS_SHIFT:
			val = gctx->shift;
			break;
		case ATOM_WS_OR_MASK:
			val = 1 << gctx->shift;
			break;
		case ATOM_WS_AND_MASK:
			val = ~(1 << gctx->shift);
			break;
		case ATOM_WS_FB_WINDOW:
			val = gctx->fb_base;
			break;
		case ATOM_WS_ATTRIBUTES:
			val = gctx->io_attr;
			break;
		case ATOM_WS_REGPTR:
			val = gctx->reg_block;
			break;
		default:
			val = ctx->ws[idx];
		}
		break;
	case ATOM_ARG_ID:
		idx = U16(*ptr);
		(*ptr) += 2;
		if (print) {
			if (gctx->data_block)
				DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
			else
				DEBUG("ID[0x%04X]", idx);
		}
		val = U32(idx + gctx->data_block);
		break;
	case ATOM_ARG_FB:
		idx = U8(*ptr);
		(*ptr)++;
		val = gctx->scratch[((gctx->fb_base + idx) / 4)];
		if (print)
			DEBUG("FB[0x%02X]", idx);
		break;
	case ATOM_ARG_IMM:
		switch (align) {
		case ATOM_SRC_DWORD:
			val = U32(*ptr);
			(*ptr) += 4;
			if (print)
				DEBUG("IMM 0x%08X\n", val);
			return val;
		case ATOM_SRC_WORD0:
		case ATOM_SRC_WORD8:
		case ATOM_SRC_WORD16:
			val = U16(*ptr);
			(*ptr) += 2;
			if (print)
				DEBUG("IMM 0x%04X\n", val);
			return val;
		case ATOM_SRC_BYTE0:
		case ATOM_SRC_BYTE8:
		case ATOM_SRC_BYTE16:
		case ATOM_SRC_BYTE24:
			val = U8(*ptr);
			(*ptr)++;
			if (print)
				DEBUG("IMM 0x%02X\n", val);
			return val;
		}
		return 0;
	case ATOM_ARG_PLL:
		idx = U8(*ptr);
		(*ptr)++;
		if (print)
			DEBUG("PLL[0x%02X]", idx);
		val = gctx->card->pll_read(gctx->card, idx);
		break;
	case ATOM_ARG_MC:
		idx = U8(*ptr);
		(*ptr)++;
		if (print)
			DEBUG("MC[0x%02X]", idx);
		val = gctx->card->mc_read(gctx->card, idx);
		break;
	}
	if (saved)
		*saved = val;
	val &= atom_arg_mask[align];
	val >>= atom_arg_shift[align];
	if (print)
		switch (align) {
		case ATOM_SRC_DWORD:
			DEBUG(".[31:0] -> 0x%08X\n", val);
			break;
		case ATOM_SRC_WORD0:
			DEBUG(".[15:0] -> 0x%04X\n", val);
			break;
		case ATOM_SRC_WORD8:
			DEBUG(".[23:8] -> 0x%04X\n", val);
			break;
		case ATOM_SRC_WORD16:
			DEBUG(".[31:16] -> 0x%04X\n", val);
			break;
		case ATOM_SRC_BYTE0:
			DEBUG(".[7:0] -> 0x%02X\n", val);
			break;
		case ATOM_SRC_BYTE8:
			DEBUG(".[15:8] -> 0x%02X\n", val);
			break;
		case ATOM_SRC_BYTE16:
			DEBUG(".[23:16] -> 0x%02X\n", val);
			break;
		case ATOM_SRC_BYTE24:
			DEBUG(".[31:24] -> 0x%02X\n", val);
			break;
		}
	return val;
}
 
static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
{
	uint32_t align = (attr >> 3) & 7, arg = attr & 7;
	switch (arg) {
	case ATOM_ARG_REG:
	case ATOM_ARG_ID:
		(*ptr) += 2;
		break;
	case ATOM_ARG_PLL:
	case ATOM_ARG_MC:
	case ATOM_ARG_PS:
	case ATOM_ARG_WS:
	case ATOM_ARG_FB:
		(*ptr)++;
		break;
	case ATOM_ARG_IMM:
		switch (align) {
		case ATOM_SRC_DWORD:
			(*ptr) += 4;
			return;
		case ATOM_SRC_WORD0:
		case ATOM_SRC_WORD8:
		case ATOM_SRC_WORD16:
			(*ptr) += 2;
			return;
		case ATOM_SRC_BYTE0:
		case ATOM_SRC_BYTE8:
		case ATOM_SRC_BYTE16:
		case ATOM_SRC_BYTE24:
			(*ptr)++;
			return;
		}
		return;
	}
}
 
static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
{
	return atom_get_src_int(ctx, attr, ptr, NULL, 1);
}
 
static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
{
	uint32_t val = 0xCDCDCDCD;
 
	switch (align) {
	case ATOM_SRC_DWORD:
		val = U32(*ptr);
		(*ptr) += 4;
		break;
	case ATOM_SRC_WORD0:
	case ATOM_SRC_WORD8:
	case ATOM_SRC_WORD16:
		val = U16(*ptr);
		(*ptr) += 2;
		break;
	case ATOM_SRC_BYTE0:
	case ATOM_SRC_BYTE8:
	case ATOM_SRC_BYTE16:
	case ATOM_SRC_BYTE24:
		val = U8(*ptr);
		(*ptr)++;
		break;
	}
	return val;
}
 
static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
			     int *ptr, uint32_t *saved, int print)
{
	return atom_get_src_int(ctx,
				arg | atom_dst_to_src[(attr >> 3) &
						      7][(attr >> 6) & 3] << 3,
				ptr, saved, print);
}
 
static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
{
	atom_skip_src_int(ctx,
			  arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
								 3] << 3, ptr);
}
 
static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
			 int *ptr, uint32_t val, uint32_t saved)
{
	uint32_t align =
	    atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
	    val, idx;
	struct atom_context *gctx = ctx->ctx;
	old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
	val <<= atom_arg_shift[align];
	val &= atom_arg_mask[align];
	saved &= ~atom_arg_mask[align];
	val |= saved;
	switch (arg) {
	case ATOM_ARG_REG:
		idx = U16(*ptr);
		(*ptr) += 2;
		DEBUG("REG[0x%04X]", idx);
		idx += gctx->reg_block;
		switch (gctx->io_mode) {
		case ATOM_IO_MM:
			if (idx == 0)
				gctx->card->reg_write(gctx->card, idx,
						      val << 2);
			else
				gctx->card->reg_write(gctx->card, idx, val);
			break;
		case ATOM_IO_PCI:
			printk(KERN_INFO
			       "PCI registers are not implemented.\n");
			return;
		case ATOM_IO_SYSIO:
			printk(KERN_INFO
			       "SYSIO registers are not implemented.\n");
			return;
		default:
			if (!(gctx->io_mode & 0x80)) {
				printk(KERN_INFO "Bad IO mode.\n");
				return;
			}
			if (!gctx->iio[gctx->io_mode & 0xFF]) {
				printk(KERN_INFO
				       "Undefined indirect IO write method %d.\n",
				       gctx->io_mode & 0x7F);
				return;
			}
			atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
					 idx, val);
		}
		break;
	case ATOM_ARG_PS:
		idx = U8(*ptr);
		(*ptr)++;
		DEBUG("PS[0x%02X]", idx);
		ctx->ps[idx] = cpu_to_le32(val);
		break;
	case ATOM_ARG_WS:
		idx = U8(*ptr);
		(*ptr)++;
		DEBUG("WS[0x%02X]", idx);
		switch (idx) {
		case ATOM_WS_QUOTIENT:
			gctx->divmul[0] = val;
			break;
		case ATOM_WS_REMAINDER:
			gctx->divmul[1] = val;
			break;
		case ATOM_WS_DATAPTR:
			gctx->data_block = val;
			break;
		case ATOM_WS_SHIFT:
			gctx->shift = val;
			break;
		case ATOM_WS_OR_MASK:
		case ATOM_WS_AND_MASK:
			break;
		case ATOM_WS_FB_WINDOW:
			gctx->fb_base = val;
			break;
		case ATOM_WS_ATTRIBUTES:
			gctx->io_attr = val;
			break;
		case ATOM_WS_REGPTR:
			gctx->reg_block = val;
			break;
		default:
			ctx->ws[idx] = val;
		}
		break;
	case ATOM_ARG_FB:
		idx = U8(*ptr);
		(*ptr)++;
		gctx->scratch[((gctx->fb_base + idx) / 4)] = val;
		DEBUG("FB[0x%02X]", idx);
		break;
	case ATOM_ARG_PLL:
		idx = U8(*ptr);
		(*ptr)++;
		DEBUG("PLL[0x%02X]", idx);
		gctx->card->pll_write(gctx->card, idx, val);
		break;
	case ATOM_ARG_MC:
		idx = U8(*ptr);
		(*ptr)++;
		DEBUG("MC[0x%02X]", idx);
		gctx->card->mc_write(gctx->card, idx, val);
		return;
	}
	switch (align) {
	case ATOM_SRC_DWORD:
		DEBUG(".[31:0] <- 0x%08X\n", old_val);
		break;
	case ATOM_SRC_WORD0:
		DEBUG(".[15:0] <- 0x%04X\n", old_val);
		break;
	case ATOM_SRC_WORD8:
		DEBUG(".[23:8] <- 0x%04X\n", old_val);
		break;
	case ATOM_SRC_WORD16:
		DEBUG(".[31:16] <- 0x%04X\n", old_val);
		break;
	case ATOM_SRC_BYTE0:
		DEBUG(".[7:0] <- 0x%02X\n", old_val);
		break;
	case ATOM_SRC_BYTE8:
		DEBUG(".[15:8] <- 0x%02X\n", old_val);
		break;
	case ATOM_SRC_BYTE16:
		DEBUG(".[23:16] <- 0x%02X\n", old_val);
		break;
	case ATOM_SRC_BYTE24:
		DEBUG(".[31:24] <- 0x%02X\n", old_val);
		break;
	}
}
 
static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	uint32_t dst, src, saved;
	int dptr = *ptr;
	SDEBUG("   dst: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
	SDEBUG("   src: ");
	src = atom_get_src(ctx, attr, ptr);
	dst += src;
	SDEBUG("   dst: ");
	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}
 
static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	uint32_t dst, src, saved;
	int dptr = *ptr;
	SDEBUG("   dst: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
	SDEBUG("   src: ");
	src = atom_get_src(ctx, attr, ptr);
	dst &= src;
	SDEBUG("   dst: ");
	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}
 
static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
{
	printk("ATOM BIOS beeped!\n");
}
 
static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
{
	int idx = U8((*ptr)++);
	if (idx < ATOM_TABLE_NAMES_CNT)
		SDEBUG("   table: %d (%s)\n", idx, atom_table_names[idx]);
	else
		SDEBUG("   table: %d\n", idx);
	if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
		atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
}
 
static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	uint32_t saved;
	int dptr = *ptr;
	attr &= 0x38;
	attr |= atom_def_dst[attr >> 3] << 6;
	atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
	SDEBUG("   dst: ");
	atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
}
 
static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	uint32_t dst, src;
	SDEBUG("   src1: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
	SDEBUG("   src2: ");
	src = atom_get_src(ctx, attr, ptr);
	ctx->ctx->cs_equal = (dst == src);
	ctx->ctx->cs_above = (dst > src);
	SDEBUG("   result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
	       ctx->ctx->cs_above ? "GT" : "LE");
}
 
static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t count = U8((*ptr)++);
	SDEBUG("   count: %d\n", count);
    if (arg == ATOM_UNIT_MICROSEC)
       udelay(count);
    else
       mdelay(count);
}
 
static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	uint32_t dst, src;
	SDEBUG("   src1: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
	SDEBUG("   src2: ");
	src = atom_get_src(ctx, attr, ptr);
	if (src != 0) {
		ctx->ctx->divmul[0] = dst / src;
		ctx->ctx->divmul[1] = dst % src;
	} else {
		ctx->ctx->divmul[0] = 0;
		ctx->ctx->divmul[1] = 0;
	}
}
 
static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
{
	/* functionally, a nop */
}
 
static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
{
	int execute = 0, target = U16(*ptr);
	(*ptr) += 2;
	switch (arg) {
	case ATOM_COND_ABOVE:
		execute = ctx->ctx->cs_above;
		break;
	case ATOM_COND_ABOVEOREQUAL:
		execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
		break;
	case ATOM_COND_ALWAYS:
		execute = 1;
		break;
	case ATOM_COND_BELOW:
		execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
		break;
	case ATOM_COND_BELOWOREQUAL:
		execute = !ctx->ctx->cs_above;
		break;
	case ATOM_COND_EQUAL:
		execute = ctx->ctx->cs_equal;
		break;
	case ATOM_COND_NOTEQUAL:
		execute = !ctx->ctx->cs_equal;
		break;
	}
	if (arg != ATOM_COND_ALWAYS)
		SDEBUG("   taken: %s\n", execute ? "yes" : "no");
	SDEBUG("   target: 0x%04X\n", target);
	if (execute)
		*ptr = ctx->start + target;
}
 
static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	uint32_t dst, src1, src2, saved;
	int dptr = *ptr;
	SDEBUG("   dst: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
	SDEBUG("   src1: ");
	src1 = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
	SDEBUG("   src2: ");
	src2 = atom_get_src(ctx, attr, ptr);
	dst &= src1;
	dst |= src2;
	SDEBUG("   dst: ");
	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}
 
static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	uint32_t src, saved;
	int dptr = *ptr;
	if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
		atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
	else {
		atom_skip_dst(ctx, arg, attr, ptr);
		saved = 0xCDCDCDCD;
	}
	SDEBUG("   src: ");
	src = atom_get_src(ctx, attr, ptr);
	SDEBUG("   dst: ");
	atom_put_dst(ctx, arg, attr, &dptr, src, saved);
}
 
static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	uint32_t dst, src;
	SDEBUG("   src1: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
	SDEBUG("   src2: ");
	src = atom_get_src(ctx, attr, ptr);
	ctx->ctx->divmul[0] = dst * src;
}
 
static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
{
	/* nothing */
}
 
static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	uint32_t dst, src, saved;
	int dptr = *ptr;
	SDEBUG("   dst: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
	SDEBUG("   src: ");
	src = atom_get_src(ctx, attr, ptr);
	dst |= src;
	SDEBUG("   dst: ");
	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}
 
static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t val = U8((*ptr)++);
	SDEBUG("POST card output: 0x%02X\n", val);
}
 
static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
{
	printk(KERN_INFO "unimplemented!\n");
}
 
static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
{
	printk(KERN_INFO "unimplemented!\n");
}
 
static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
{
	printk(KERN_INFO "unimplemented!\n");
}
 
static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
{
	int idx = U8(*ptr);
	(*ptr)++;
	SDEBUG("   block: %d\n", idx);
	if (!idx)
		ctx->ctx->data_block = 0;
	else if (idx == 255)
		ctx->ctx->data_block = ctx->start;
	else
		ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
	SDEBUG("   base: 0x%04X\n", ctx->ctx->data_block);
}
 
static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	SDEBUG("   fb_base: ");
	ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
}
 
static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
{
	int port;
	switch (arg) {
	case ATOM_PORT_ATI:
		port = U16(*ptr);
		if (port < ATOM_IO_NAMES_CNT)
			SDEBUG("   port: %d (%s)\n", port, atom_io_names[port]);
		else
			SDEBUG("   port: %d\n", port);
		if (!port)
			ctx->ctx->io_mode = ATOM_IO_MM;
		else
			ctx->ctx->io_mode = ATOM_IO_IIO | port;
		(*ptr) += 2;
		break;
	case ATOM_PORT_PCI:
		ctx->ctx->io_mode = ATOM_IO_PCI;
		(*ptr)++;
		break;
	case ATOM_PORT_SYSIO:
		ctx->ctx->io_mode = ATOM_IO_SYSIO;
		(*ptr)++;
		break;
	}
}
 
static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
{
	ctx->ctx->reg_block = U16(*ptr);
	(*ptr) += 2;
	SDEBUG("   base: 0x%04X\n", ctx->ctx->reg_block);
}
 
static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++), shift;
	uint32_t saved, dst;
	int dptr = *ptr;
	attr &= 0x38;
	attr |= atom_def_dst[attr >> 3] << 6;
	SDEBUG("   dst: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
	shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
	SDEBUG("   shift: %d\n", shift);
	dst <<= shift;
	SDEBUG("   dst: ");
	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}
 
static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++), shift;
	uint32_t saved, dst;
	int dptr = *ptr;
	attr &= 0x38;
	attr |= atom_def_dst[attr >> 3] << 6;
	SDEBUG("   dst: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
	shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
	SDEBUG("   shift: %d\n", shift);
	dst >>= shift;
	SDEBUG("   dst: ");
	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}
 
static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++), shift;
	uint32_t saved, dst;
	int dptr = *ptr;
 
 
	SDEBUG("   dst: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
	shift = atom_get_src(ctx, attr, ptr);
	SDEBUG("   shift: %d\n", shift);
	dst <<= shift;
	SDEBUG("   dst: ");
	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}
 
static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++), shift;
	uint32_t saved, dst;
	int dptr = *ptr;
 
 
	SDEBUG("   dst: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
	shift = atom_get_src(ctx, attr, ptr);
	SDEBUG("   shift: %d\n", shift);
	dst >>= shift;
	SDEBUG("   dst: ");
	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}
 
static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	uint32_t dst, src, saved;
	int dptr = *ptr;
	SDEBUG("   dst: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
	SDEBUG("   src: ");
	src = atom_get_src(ctx, attr, ptr);
	dst -= src;
	SDEBUG("   dst: ");
	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}
 
static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	uint32_t src, val, target;
	SDEBUG("   switch: ");
	src = atom_get_src(ctx, attr, ptr);
	while (U16(*ptr) != ATOM_CASE_END)
		if (U8(*ptr) == ATOM_CASE_MAGIC) {
			(*ptr)++;
			SDEBUG("   case: ");
			val =
			    atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
					 ptr);
			target = U16(*ptr);
			if (val == src) {
				SDEBUG("   target: %04X\n", target);
				*ptr = ctx->start + target;
				return;
			}
			(*ptr) += 2;
		} else {
			printk(KERN_INFO "Bad case.\n");
			return;
		}
	(*ptr) += 2;
}
 
static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	uint32_t dst, src;
	SDEBUG("   src1: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
	SDEBUG("   src2: ");
	src = atom_get_src(ctx, attr, ptr);
	ctx->ctx->cs_equal = ((dst & src) == 0);
	SDEBUG("   result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
}
 
static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
{
	uint8_t attr = U8((*ptr)++);
	uint32_t dst, src, saved;
	int dptr = *ptr;
	SDEBUG("   dst: ");
	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
	SDEBUG("   src: ");
	src = atom_get_src(ctx, attr, ptr);
	dst ^= src;
	SDEBUG("   dst: ");
	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
}
 
static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
{
	printk(KERN_INFO "unimplemented!\n");
}
 
static struct {
	void (*func) (atom_exec_context *, int *, int);
	int arg;
} opcode_table[ATOM_OP_CNT] = {
	{
	NULL, 0}, {
	atom_op_move, ATOM_ARG_REG}, {
	atom_op_move, ATOM_ARG_PS}, {
	atom_op_move, ATOM_ARG_WS}, {
	atom_op_move, ATOM_ARG_FB}, {
	atom_op_move, ATOM_ARG_PLL}, {
	atom_op_move, ATOM_ARG_MC}, {
	atom_op_and, ATOM_ARG_REG}, {
	atom_op_and, ATOM_ARG_PS}, {
	atom_op_and, ATOM_ARG_WS}, {
	atom_op_and, ATOM_ARG_FB}, {
	atom_op_and, ATOM_ARG_PLL}, {
	atom_op_and, ATOM_ARG_MC}, {
	atom_op_or, ATOM_ARG_REG}, {
	atom_op_or, ATOM_ARG_PS}, {
	atom_op_or, ATOM_ARG_WS}, {
	atom_op_or, ATOM_ARG_FB}, {
	atom_op_or, ATOM_ARG_PLL}, {
	atom_op_or, ATOM_ARG_MC}, {
	atom_op_shift_left, ATOM_ARG_REG}, {
	atom_op_shift_left, ATOM_ARG_PS}, {
	atom_op_shift_left, ATOM_ARG_WS}, {
	atom_op_shift_left, ATOM_ARG_FB}, {
	atom_op_shift_left, ATOM_ARG_PLL}, {
	atom_op_shift_left, ATOM_ARG_MC}, {
	atom_op_shift_right, ATOM_ARG_REG}, {
	atom_op_shift_right, ATOM_ARG_PS}, {
	atom_op_shift_right, ATOM_ARG_WS}, {
	atom_op_shift_right, ATOM_ARG_FB}, {
	atom_op_shift_right, ATOM_ARG_PLL}, {
	atom_op_shift_right, ATOM_ARG_MC}, {
	atom_op_mul, ATOM_ARG_REG}, {
	atom_op_mul, ATOM_ARG_PS}, {
	atom_op_mul, ATOM_ARG_WS}, {
	atom_op_mul, ATOM_ARG_FB}, {
	atom_op_mul, ATOM_ARG_PLL}, {
	atom_op_mul, ATOM_ARG_MC}, {
	atom_op_div, ATOM_ARG_REG}, {
	atom_op_div, ATOM_ARG_PS}, {
	atom_op_div, ATOM_ARG_WS}, {
	atom_op_div, ATOM_ARG_FB}, {
	atom_op_div, ATOM_ARG_PLL}, {
	atom_op_div, ATOM_ARG_MC}, {
	atom_op_add, ATOM_ARG_REG}, {
	atom_op_add, ATOM_ARG_PS}, {
	atom_op_add, ATOM_ARG_WS}, {
	atom_op_add, ATOM_ARG_FB}, {
	atom_op_add, ATOM_ARG_PLL}, {
	atom_op_add, ATOM_ARG_MC}, {
	atom_op_sub, ATOM_ARG_REG}, {
	atom_op_sub, ATOM_ARG_PS}, {
	atom_op_sub, ATOM_ARG_WS}, {
	atom_op_sub, ATOM_ARG_FB}, {
	atom_op_sub, ATOM_ARG_PLL}, {
	atom_op_sub, ATOM_ARG_MC}, {
	atom_op_setport, ATOM_PORT_ATI}, {
	atom_op_setport, ATOM_PORT_PCI}, {
	atom_op_setport, ATOM_PORT_SYSIO}, {
	atom_op_setregblock, 0}, {
	atom_op_setfbbase, 0}, {
	atom_op_compare, ATOM_ARG_REG}, {
	atom_op_compare, ATOM_ARG_PS}, {
	atom_op_compare, ATOM_ARG_WS}, {
	atom_op_compare, ATOM_ARG_FB}, {
	atom_op_compare, ATOM_ARG_PLL}, {
	atom_op_compare, ATOM_ARG_MC}, {
	atom_op_switch, 0}, {
	atom_op_jump, ATOM_COND_ALWAYS}, {
	atom_op_jump, ATOM_COND_EQUAL}, {
	atom_op_jump, ATOM_COND_BELOW}, {
	atom_op_jump, ATOM_COND_ABOVE}, {
	atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
	atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
	atom_op_jump, ATOM_COND_NOTEQUAL}, {
	atom_op_test, ATOM_ARG_REG}, {
	atom_op_test, ATOM_ARG_PS}, {
	atom_op_test, ATOM_ARG_WS}, {
	atom_op_test, ATOM_ARG_FB}, {
	atom_op_test, ATOM_ARG_PLL}, {
	atom_op_test, ATOM_ARG_MC}, {
	atom_op_delay, ATOM_UNIT_MILLISEC}, {
	atom_op_delay, ATOM_UNIT_MICROSEC}, {
	atom_op_calltable, 0}, {
	atom_op_repeat, 0}, {
	atom_op_clear, ATOM_ARG_REG}, {
	atom_op_clear, ATOM_ARG_PS}, {
	atom_op_clear, ATOM_ARG_WS}, {
	atom_op_clear, ATOM_ARG_FB}, {
	atom_op_clear, ATOM_ARG_PLL}, {
	atom_op_clear, ATOM_ARG_MC}, {
	atom_op_nop, 0}, {
	atom_op_eot, 0}, {
	atom_op_mask, ATOM_ARG_REG}, {
	atom_op_mask, ATOM_ARG_PS}, {
	atom_op_mask, ATOM_ARG_WS}, {
	atom_op_mask, ATOM_ARG_FB}, {
	atom_op_mask, ATOM_ARG_PLL}, {
	atom_op_mask, ATOM_ARG_MC}, {
	atom_op_postcard, 0}, {
	atom_op_beep, 0}, {
	atom_op_savereg, 0}, {
	atom_op_restorereg, 0}, {
	atom_op_setdatablock, 0}, {
	atom_op_xor, ATOM_ARG_REG}, {
	atom_op_xor, ATOM_ARG_PS}, {
	atom_op_xor, ATOM_ARG_WS}, {
	atom_op_xor, ATOM_ARG_FB}, {
	atom_op_xor, ATOM_ARG_PLL}, {
	atom_op_xor, ATOM_ARG_MC}, {
	atom_op_shl, ATOM_ARG_REG}, {
	atom_op_shl, ATOM_ARG_PS}, {
	atom_op_shl, ATOM_ARG_WS}, {
	atom_op_shl, ATOM_ARG_FB}, {
	atom_op_shl, ATOM_ARG_PLL}, {
	atom_op_shl, ATOM_ARG_MC}, {
	atom_op_shr, ATOM_ARG_REG}, {
	atom_op_shr, ATOM_ARG_PS}, {
	atom_op_shr, ATOM_ARG_WS}, {
	atom_op_shr, ATOM_ARG_FB}, {
	atom_op_shr, ATOM_ARG_PLL}, {
	atom_op_shr, ATOM_ARG_MC}, {
atom_op_debug, 0},};
 
static void atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
{
	int base = CU16(ctx->cmd_table + 4 + 2 * index);
	int len, ws, ps, ptr;
	unsigned char op;
	atom_exec_context ectx;
 
	if (!base)
		return;
 
	len = CU16(base + ATOM_CT_SIZE_PTR);
	ws = CU8(base + ATOM_CT_WS_PTR);
	ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
	ptr = base + ATOM_CT_CODE_PTR;
 
	SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
 
	ectx.ctx = ctx;
	ectx.ps_shift = ps / 4;
	ectx.start = base;
	ectx.ps = params;
	if (ws)
		ectx.ws = kzalloc(4 * ws, GFP_KERNEL);
	else
		ectx.ws = NULL;
 
	debug_depth++;
	while (1) {
		op = CU8(ptr++);
		if (op < ATOM_OP_NAMES_CNT)
			SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
		else
			SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1);
 
		if (op < ATOM_OP_CNT && op > 0)
			opcode_table[op].func(&ectx, &ptr,
					      opcode_table[op].arg);
		else
			break;
 
		if (op == ATOM_OP_EOT)
			break;
	}
	debug_depth--;
	SDEBUG("<<\n");
 
	if (ws)
		kfree(ectx.ws);
}
 
void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
{
	mutex_lock(&ctx->mutex);
	/* reset reg block */
	ctx->reg_block = 0;
	/* reset fb window */
	ctx->fb_base = 0;
	/* reset io mode */
	ctx->io_mode = ATOM_IO_MM;
	atom_execute_table_locked(ctx, index, params);
	mutex_unlock(&ctx->mutex);
}
 
static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
 
static void atom_index_iio(struct atom_context *ctx, int base)
{
	ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
	while (CU8(base) == ATOM_IIO_START) {
		ctx->iio[CU8(base + 1)] = base + 2;
		base += 2;
		while (CU8(base) != ATOM_IIO_END)
			base += atom_iio_len[CU8(base)];
		base += 3;
	}
}
 
struct atom_context *atom_parse(struct card_info *card, void *bios)
{
	int base;
	struct atom_context *ctx =
	    kzalloc(sizeof(struct atom_context), GFP_KERNEL);
	char *str;
	char name[512];
	int i;
 
	ctx->card = card;
	ctx->bios = bios;
 
	if (CU16(0) != ATOM_BIOS_MAGIC) {
		printk(KERN_INFO "Invalid BIOS magic.\n");
		kfree(ctx);
		return NULL;
	}
	if (strncmp
	    (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
	     strlen(ATOM_ATI_MAGIC))) {
		printk(KERN_INFO "Invalid ATI magic.\n");
		kfree(ctx);
		return NULL;
	}
 
	base = CU16(ATOM_ROM_TABLE_PTR);
	if (strncmp
	    (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
	     strlen(ATOM_ROM_MAGIC))) {
		printk(KERN_INFO "Invalid ATOM magic.\n");
		kfree(ctx);
		return NULL;
	}
 
	ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
	ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
	atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
 
	str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
	while (*str && ((*str == '\n') || (*str == '\r')))
		str++;
	/* name string isn't always 0 terminated */
	for (i = 0; i < 511; i++) {
		name[i] = str[i];
		if (name[i] < '.' || name[i] > 'z') {
			name[i] = 0;
			break;
		}
	}
	printk(KERN_INFO "ATOM BIOS: %s\n", name);
 
	return ctx;
}
 
int atom_asic_init(struct atom_context *ctx)
{
	int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
	uint32_t ps[16];
	memset(ps, 0, 64);
 
	ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
	ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
	if (!ps[0] || !ps[1])
		return 1;
 
	if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
		return 1;
	atom_execute_table(ctx, ATOM_CMD_INIT, ps);
 
	return 0;
}
 
void atom_destroy(struct atom_context *ctx)
{
	if (ctx->iio)
		kfree(ctx->iio);
	kfree(ctx);
}
 
void atom_parse_data_header(struct atom_context *ctx, int index,
			    uint16_t * size, uint8_t * frev, uint8_t * crev,
			    uint16_t * data_start)
{
	int offset = index * 2 + 4;
	int idx = CU16(ctx->data_table + offset);
 
	if (size)
		*size = CU16(idx);
	if (frev)
		*frev = CU8(idx + 2);
	if (crev)
		*crev = CU8(idx + 3);
	*data_start = idx;
	return;
}
 
void atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
			   uint8_t * crev)
{
	int offset = index * 2 + 4;
	int idx = CU16(ctx->cmd_table + offset);
 
	if (frev)
		*frev = CU8(idx + 2);
	if (crev)
		*crev = CU8(idx + 3);
	return;
}
 
int atom_allocate_fb_scratch(struct atom_context *ctx)
{
	int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
	uint16_t data_offset;
	int usage_bytes;
	struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
 
	atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset);
 
	firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
 
	DRM_DEBUG("atom firmware requested %08x %dkb\n",
		  firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware,
		  firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb);
 
	usage_bytes = firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb * 1024;
	if (usage_bytes == 0)
		usage_bytes = 20 * 1024;
	/* allocate some scratch memory */
	ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
	if (!ctx->scratch)
		return -ENOMEM;
	return 0;
}
 
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Rev 1428	Rev 1430
1	/*	1	/*
2	* Copyright 2008 Advanced Micro Devices, Inc.	2	* Copyright 2008 Advanced Micro Devices, Inc.
3	*	3	*
4	* Permission is hereby granted, free of charge, to any person obtaining a	4	* Permission is hereby granted, free of charge, to any person obtaining a
5	* copy of this software and associated documentation files (the "Software"),	5	* copy of this software and associated documentation files (the "Software"),
6	* to deal in the Software without restriction, including without limitation	6	* to deal in the Software without restriction, including without limitation
7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8	* and/or sell copies of the Software, and to permit persons to whom the	8	* and/or sell copies of the Software, and to permit persons to whom the
9	* Software is furnished to do so, subject to the following conditions:	9	* Software is furnished to do so, subject to the following conditions:
10	*	10	*
11	* The above copyright notice and this permission notice shall be included in	11	* The above copyright notice and this permission notice shall be included in
12	* all copies or substantial portions of the Software.	12	* all copies or substantial portions of the Software.
13	*	13	*
14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20	* OTHER DEALINGS IN THE SOFTWARE.	20	* OTHER DEALINGS IN THE SOFTWARE.
21	*	21	*
22	* Author: Stanislaw Skowronek	22	* Author: Stanislaw Skowronek
23	*/	23	*/
24		24
25	#include	25	#include
26	#include	26	#include
27	#include	27	#include
28		28
29	#define ATOM_DEBUG	29	#define ATOM_DEBUG
30		30
31	#include "atom.h"	31	#include "atom.h"
32	#include "atom-names.h"	32	#include "atom-names.h"
33	#include "atom-bits.h"	33	#include "atom-bits.h"
34		34
35	#define ATOM_COND_ABOVE 0	35	#define ATOM_COND_ABOVE 0
36	#define ATOM_COND_ABOVEOREQUAL 1	36	#define ATOM_COND_ABOVEOREQUAL 1
37	#define ATOM_COND_ALWAYS 2	37	#define ATOM_COND_ALWAYS 2
38	#define ATOM_COND_BELOW 3	38	#define ATOM_COND_BELOW 3
39	#define ATOM_COND_BELOWOREQUAL 4	39	#define ATOM_COND_BELOWOREQUAL 4
40	#define ATOM_COND_EQUAL 5	40	#define ATOM_COND_EQUAL 5
41	#define ATOM_COND_NOTEQUAL 6	41	#define ATOM_COND_NOTEQUAL 6
42		42
43	#define ATOM_PORT_ATI 0	43	#define ATOM_PORT_ATI 0
44	#define ATOM_PORT_PCI 1	44	#define ATOM_PORT_PCI 1
45	#define ATOM_PORT_SYSIO 2	45	#define ATOM_PORT_SYSIO 2
46		46
47	#define ATOM_UNIT_MICROSEC 0	47	#define ATOM_UNIT_MICROSEC 0
48	#define ATOM_UNIT_MILLISEC 1	48	#define ATOM_UNIT_MILLISEC 1
49		49
50	#define PLL_INDEX 2	50	#define PLL_INDEX 2
51	#define PLL_DATA 3	51	#define PLL_DATA 3
52		52
53	typedef struct {	53	typedef struct {
54	struct atom_context *ctx;	54	struct atom_context *ctx;
55		55
56	uint32_t ps, ws;	56	uint32_t ps, ws;
57	int ps_shift;	57	int ps_shift;
58	uint16_t start;	58	uint16_t start;
59	} atom_exec_context;	59	} atom_exec_context;
60		60
61	int atom_debug = 0;	61	int atom_debug = 0;
62	static void atom_execute_table_locked(struct atom_context ctx, int index, uint32_t params);	62	static void atom_execute_table_locked(struct atom_context ctx, int index, uint32_t params);
63	void atom_execute_table(struct atom_context ctx, int index, uint32_t params);	63	void atom_execute_table(struct atom_context ctx, int index, uint32_t params);
64		64
65	static uint32_t atom_arg_mask[8] =	65	static uint32_t atom_arg_mask[8] =
66	{ 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000,	66	{ 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000,
67	0xFF000000 };	67	0xFF000000 };
68	static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };	68	static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
69		69
70	static int atom_dst_to_src[8][4] = {	70	static int atom_dst_to_src[8][4] = {
71	/* translate destination alignment field to the source alignment encoding */	71	/* translate destination alignment field to the source alignment encoding */
72	{0, 0, 0, 0},	72	{0, 0, 0, 0},
73	{1, 2, 3, 0},	73	{1, 2, 3, 0},
74	{1, 2, 3, 0},	74	{1, 2, 3, 0},
75	{1, 2, 3, 0},	75	{1, 2, 3, 0},
76	{4, 5, 6, 7},	76	{4, 5, 6, 7},
77	{4, 5, 6, 7},	77	{4, 5, 6, 7},
78	{4, 5, 6, 7},	78	{4, 5, 6, 7},
79	{4, 5, 6, 7},	79	{4, 5, 6, 7},
80	};	80	};
81	static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };	81	static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
82		82
83	static int debug_depth = 0;	83	static int debug_depth = 0;
84	#ifdef ATOM_DEBUG	84	#ifdef ATOM_DEBUG
85	static void debug_print_spaces(int n)	85	static void debug_print_spaces(int n)
86	{	86	{
87	while (n--)	87	while (n--)
88	printk(" ");	88	printk(" ");
89	}	89	}
90		90
91	#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)	91	#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
92	#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)	92	#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
93	#else	93	#else
94	#define DEBUG(...) do { } while (0)	94	#define DEBUG(...) do { } while (0)
95	#define SDEBUG(...) do { } while (0)	95	#define SDEBUG(...) do { } while (0)
96	#endif	96	#endif
97		97
98	static uint32_t atom_iio_execute(struct atom_context *ctx, int base,	98	static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
99	uint32_t index, uint32_t data)	99	uint32_t index, uint32_t data)
100	{	100	{
101	uint32_t temp = 0xCDCDCDCD;	101	uint32_t temp = 0xCDCDCDCD;
102	while (1)	102	while (1)
103	switch (CU8(base)) {	103	switch (CU8(base)) {
104	case ATOM_IIO_NOP:	104	case ATOM_IIO_NOP:
105	base++;	105	base++;
106	break;	106	break;
107	case ATOM_IIO_READ:	107	case ATOM_IIO_READ:
108	temp = ctx->card->reg_read(ctx->card, CU16(base + 1));	108	temp = ctx->card->reg_read(ctx->card, CU16(base + 1));
109	base += 3;	109	base += 3;
110	break;	110	break;
111	case ATOM_IIO_WRITE:	111	case ATOM_IIO_WRITE:
112	(void)ctx->card->reg_read(ctx->card, CU16(base + 1));	112	(void)ctx->card->reg_read(ctx->card, CU16(base + 1));
113	ctx->card->reg_write(ctx->card, CU16(base + 1), temp);	113	ctx->card->reg_write(ctx->card, CU16(base + 1), temp);
114	base += 3;	114	base += 3;
115	break;	115	break;
116	case ATOM_IIO_CLEAR:	116	case ATOM_IIO_CLEAR:
117	temp &=	117	temp &=
118	~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<	118	~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
119	CU8(base + 2));	119	CU8(base + 2));
120	base += 3;	120	base += 3;
121	break;	121	break;
122	case ATOM_IIO_SET:	122	case ATOM_IIO_SET:
123	temp \|=	123	temp \|=
124	(0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +	124	(0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
125	2);	125	2);
126	base += 3;	126	base += 3;
127	break;	127	break;
128	case ATOM_IIO_MOVE_INDEX:	128	case ATOM_IIO_MOVE_INDEX:
129	temp &=	129	temp &=
130	~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<	130	~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
131	CU8(base + 2));	131	CU8(base + 2));
132	temp \|=	132	temp \|=
133	((index >> CU8(base + 2)) &	133	((index >> CU8(base + 2)) &
134	(0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +	134	(0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
135	3);	135	3);
136	base += 4;	136	base += 4;
137	break;	137	break;
138	case ATOM_IIO_MOVE_DATA:	138	case ATOM_IIO_MOVE_DATA:
139	temp &=	139	temp &=
140	~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<	140	~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
141	CU8(base + 2));	141	CU8(base + 2));
142	temp \|=	142	temp \|=
143	((data >> CU8(base + 2)) &	143	((data >> CU8(base + 2)) &
144	(0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +	144	(0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
145	3);	145	3);
146	base += 4;	146	base += 4;
147	break;	147	break;
148	case ATOM_IIO_MOVE_ATTR:	148	case ATOM_IIO_MOVE_ATTR:
149	temp &=	149	temp &=
150	~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<	150	~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
151	CU8(base + 2));	151	CU8(base + 2));
152	temp \|=	152	temp \|=
153	((ctx->	153	((ctx->
154	io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -	154	io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
155	CU8	155	CU8
156	(base	156	(base
157	+	157	+
158	1))))	158	1))))
159	<< CU8(base + 3);	159	<< CU8(base + 3);
160	base += 4;	160	base += 4;
161	break;	161	break;
162	case ATOM_IIO_END:	162	case ATOM_IIO_END:
163	return temp;	163	return temp;
164	default:	164	default:
165	printk(KERN_INFO "Unknown IIO opcode.\n");	165	printk(KERN_INFO "Unknown IIO opcode.\n");
166	return 0;	166	return 0;
167	}	167	}
168	}	168	}
169		169
170	static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,	170	static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
171	int ptr, uint32_t saved, int print)	171	int ptr, uint32_t saved, int print)
172	{	172	{
173	uint32_t idx, val = 0xCDCDCDCD, align, arg;	173	uint32_t idx, val = 0xCDCDCDCD, align, arg;
174	struct atom_context *gctx = ctx->ctx;	174	struct atom_context *gctx = ctx->ctx;
175	arg = attr & 7;	175	arg = attr & 7;
176	align = (attr >> 3) & 7;	176	align = (attr >> 3) & 7;
177	switch (arg) {	177	switch (arg) {
178	case ATOM_ARG_REG:	178	case ATOM_ARG_REG:
179	idx = U16(*ptr);	179	idx = U16(*ptr);
180	(*ptr) += 2;	180	(*ptr) += 2;
181	if (print)	181	if (print)
182	DEBUG("REG[0x%04X]", idx);	182	DEBUG("REG[0x%04X]", idx);
183	idx += gctx->reg_block;	183	idx += gctx->reg_block;
184	switch (gctx->io_mode) {	184	switch (gctx->io_mode) {
185	case ATOM_IO_MM:	185	case ATOM_IO_MM:
186	val = gctx->card->reg_read(gctx->card, idx);	186	val = gctx->card->reg_read(gctx->card, idx);
187	break;	187	break;
188	case ATOM_IO_PCI:	188	case ATOM_IO_PCI:
189	printk(KERN_INFO	189	printk(KERN_INFO
190	"PCI registers are not implemented.\n");	190	"PCI registers are not implemented.\n");
191	return 0;	191	return 0;
192	case ATOM_IO_SYSIO:	192	case ATOM_IO_SYSIO:
193	printk(KERN_INFO	193	printk(KERN_INFO
194	"SYSIO registers are not implemented.\n");	194	"SYSIO registers are not implemented.\n");
195	return 0;	195	return 0;
196	default:	196	default:
197	if (!(gctx->io_mode & 0x80)) {	197	if (!(gctx->io_mode & 0x80)) {
198	printk(KERN_INFO "Bad IO mode.\n");	198	printk(KERN_INFO "Bad IO mode.\n");
199	return 0;	199	return 0;
200	}	200	}
201	if (!gctx->iio[gctx->io_mode & 0x7F]) {	201	if (!gctx->iio[gctx->io_mode & 0x7F]) {
202	printk(KERN_INFO	202	printk(KERN_INFO
203	"Undefined indirect IO read method %d.\n",	203	"Undefined indirect IO read method %d.\n",
204	gctx->io_mode & 0x7F);	204	gctx->io_mode & 0x7F);
205	return 0;	205	return 0;
206	}	206	}
207	val =	207	val =
208	atom_iio_execute(gctx,	208	atom_iio_execute(gctx,
209	gctx->iio[gctx->io_mode & 0x7F],	209	gctx->iio[gctx->io_mode & 0x7F],
210	idx, 0);	210	idx, 0);
211	}	211	}
212	break;	212	break;
213	case ATOM_ARG_PS:	213	case ATOM_ARG_PS:
214	idx = U8(*ptr);	214	idx = U8(*ptr);
215	(*ptr)++;	215	(*ptr)++;
216	/* get_unaligned_le32 avoids unaligned accesses from atombios	216	/* get_unaligned_le32 avoids unaligned accesses from atombios
217	* tables, noticed on a DEC Alpha. */	217	* tables, noticed on a DEC Alpha. */
218	val = get_unaligned_le32((u32 *)&ctx->ps[idx]);	218	val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
219	if (print)	219	if (print)
220	DEBUG("PS[0x%02X,0x%04X]", idx, val);	220	DEBUG("PS[0x%02X,0x%04X]", idx, val);
221	break;	221	break;
222	case ATOM_ARG_WS:	222	case ATOM_ARG_WS:
223	idx = U8(*ptr);	223	idx = U8(*ptr);
224	(*ptr)++;	224	(*ptr)++;
225	if (print)	225	if (print)
226	DEBUG("WS[0x%02X]", idx);	226	DEBUG("WS[0x%02X]", idx);
227	switch (idx) {	227	switch (idx) {
228	case ATOM_WS_QUOTIENT:	228	case ATOM_WS_QUOTIENT:
229	val = gctx->divmul[0];	229	val = gctx->divmul[0];
230	break;	230	break;
231	case ATOM_WS_REMAINDER:	231	case ATOM_WS_REMAINDER:
232	val = gctx->divmul[1];	232	val = gctx->divmul[1];
233	break;	233	break;
234	case ATOM_WS_DATAPTR:	234	case ATOM_WS_DATAPTR:
235	val = gctx->data_block;	235	val = gctx->data_block;
236	break;	236	break;
237	case ATOM_WS_SHIFT:	237	case ATOM_WS_SHIFT:
238	val = gctx->shift;	238	val = gctx->shift;
239	break;	239	break;
240	case ATOM_WS_OR_MASK:	240	case ATOM_WS_OR_MASK:
241	val = 1 << gctx->shift;	241	val = 1 << gctx->shift;
242	break;	242	break;
243	case ATOM_WS_AND_MASK:	243	case ATOM_WS_AND_MASK:
244	val = ~(1 << gctx->shift);	244	val = ~(1 << gctx->shift);
245	break;	245	break;
246	case ATOM_WS_FB_WINDOW:	246	case ATOM_WS_FB_WINDOW:
247	val = gctx->fb_base;	247	val = gctx->fb_base;
248	break;	248	break;
249	case ATOM_WS_ATTRIBUTES:	249	case ATOM_WS_ATTRIBUTES:
250	val = gctx->io_attr;	250	val = gctx->io_attr;
251	break;	251	break;
252	case ATOM_WS_REGPTR:	252	case ATOM_WS_REGPTR:
253	val = gctx->reg_block;	253	val = gctx->reg_block;
254	break;	254	break;
255	default:	255	default:
256	val = ctx->ws[idx];	256	val = ctx->ws[idx];
257	}	257	}
258	break;	258	break;
259	case ATOM_ARG_ID:	259	case ATOM_ARG_ID:
260	idx = U16(*ptr);	260	idx = U16(*ptr);
261	(*ptr) += 2;	261	(*ptr) += 2;
262	if (print) {	262	if (print) {
263	if (gctx->data_block)	263	if (gctx->data_block)
264	DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);	264	DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
265	else	265	else
266	DEBUG("ID[0x%04X]", idx);	266	DEBUG("ID[0x%04X]", idx);
267	}	267	}
268	val = U32(idx + gctx->data_block);	268	val = U32(idx + gctx->data_block);
269	break;	269	break;
270	case ATOM_ARG_FB:	270	case ATOM_ARG_FB:
271	idx = U8(*ptr);	271	idx = U8(*ptr);
272	(*ptr)++;	272	(*ptr)++;
273	val = gctx->scratch[((gctx->fb_base + idx) / 4)];	273	val = gctx->scratch[((gctx->fb_base + idx) / 4)];
274	if (print)	274	if (print)
275	DEBUG("FB[0x%02X]", idx);	275	DEBUG("FB[0x%02X]", idx);
276	break;	276	break;
277	case ATOM_ARG_IMM:	277	case ATOM_ARG_IMM:
278	switch (align) {	278	switch (align) {
279	case ATOM_SRC_DWORD:	279	case ATOM_SRC_DWORD:
280	val = U32(*ptr);	280	val = U32(*ptr);
281	(*ptr) += 4;	281	(*ptr) += 4;
282	if (print)	282	if (print)
283	DEBUG("IMM 0x%08X\n", val);	283	DEBUG("IMM 0x%08X\n", val);
284	return val;	284	return val;
285	case ATOM_SRC_WORD0:	285	case ATOM_SRC_WORD0:
286	case ATOM_SRC_WORD8:	286	case ATOM_SRC_WORD8:
287	case ATOM_SRC_WORD16:	287	case ATOM_SRC_WORD16:
288	val = U16(*ptr);	288	val = U16(*ptr);
289	(*ptr) += 2;	289	(*ptr) += 2;
290	if (print)	290	if (print)
291	DEBUG("IMM 0x%04X\n", val);	291	DEBUG("IMM 0x%04X\n", val);
292	return val;	292	return val;
293	case ATOM_SRC_BYTE0:	293	case ATOM_SRC_BYTE0:
294	case ATOM_SRC_BYTE8:	294	case ATOM_SRC_BYTE8:
295	case ATOM_SRC_BYTE16:	295	case ATOM_SRC_BYTE16:
296	case ATOM_SRC_BYTE24:	296	case ATOM_SRC_BYTE24:
297	val = U8(*ptr);	297	val = U8(*ptr);
298	(*ptr)++;	298	(*ptr)++;
299	if (print)	299	if (print)
300	DEBUG("IMM 0x%02X\n", val);	300	DEBUG("IMM 0x%02X\n", val);
301	return val;	301	return val;
302	}	302	}
303	return 0;	303	return 0;
304	case ATOM_ARG_PLL:	304	case ATOM_ARG_PLL:
305	idx = U8(*ptr);	305	idx = U8(*ptr);
306	(*ptr)++;	306	(*ptr)++;
307	if (print)	307	if (print)
308	DEBUG("PLL[0x%02X]", idx);	308	DEBUG("PLL[0x%02X]", idx);
309	val = gctx->card->pll_read(gctx->card, idx);	309	val = gctx->card->pll_read(gctx->card, idx);
310	break;	310	break;
311	case ATOM_ARG_MC:	311	case ATOM_ARG_MC:
312	idx = U8(*ptr);	312	idx = U8(*ptr);
313	(*ptr)++;	313	(*ptr)++;
314	if (print)	314	if (print)
315	DEBUG("MC[0x%02X]", idx);	315	DEBUG("MC[0x%02X]", idx);
316	val = gctx->card->mc_read(gctx->card, idx);	316	val = gctx->card->mc_read(gctx->card, idx);
317	break;	317	break;
318	}	318	}
319	if (saved)	319	if (saved)
320	*saved = val;	320	*saved = val;
321	val &= atom_arg_mask[align];	321	val &= atom_arg_mask[align];
322	val >>= atom_arg_shift[align];	322	val >>= atom_arg_shift[align];
323	if (print)	323	if (print)
324	switch (align) {	324	switch (align) {
325	case ATOM_SRC_DWORD:	325	case ATOM_SRC_DWORD:
326	DEBUG(".[31:0] -> 0x%08X\n", val);	326	DEBUG(".[31:0] -> 0x%08X\n", val);
327	break;	327	break;
328	case ATOM_SRC_WORD0:	328	case ATOM_SRC_WORD0:
329	DEBUG(".[15:0] -> 0x%04X\n", val);	329	DEBUG(".[15:0] -> 0x%04X\n", val);
330	break;	330	break;
331	case ATOM_SRC_WORD8:	331	case ATOM_SRC_WORD8:
332	DEBUG(".[23:8] -> 0x%04X\n", val);	332	DEBUG(".[23:8] -> 0x%04X\n", val);
333	break;	333	break;
334	case ATOM_SRC_WORD16:	334	case ATOM_SRC_WORD16:
335	DEBUG(".[31:16] -> 0x%04X\n", val);	335	DEBUG(".[31:16] -> 0x%04X\n", val);
336	break;	336	break;
337	case ATOM_SRC_BYTE0:	337	case ATOM_SRC_BYTE0:
338	DEBUG(".[7:0] -> 0x%02X\n", val);	338	DEBUG(".[7:0] -> 0x%02X\n", val);
339	break;	339	break;
340	case ATOM_SRC_BYTE8:	340	case ATOM_SRC_BYTE8:
341	DEBUG(".[15:8] -> 0x%02X\n", val);	341	DEBUG(".[15:8] -> 0x%02X\n", val);
342	break;	342	break;
343	case ATOM_SRC_BYTE16:	343	case ATOM_SRC_BYTE16:
344	DEBUG(".[23:16] -> 0x%02X\n", val);	344	DEBUG(".[23:16] -> 0x%02X\n", val);
345	break;	345	break;
346	case ATOM_SRC_BYTE24:	346	case ATOM_SRC_BYTE24:
347	DEBUG(".[31:24] -> 0x%02X\n", val);	347	DEBUG(".[31:24] -> 0x%02X\n", val);
348	break;	348	break;
349	}	349	}
350	return val;	350	return val;
351	}	351	}
352		352
353	static void atom_skip_src_int(atom_exec_context ctx, uint8_t attr, int ptr)	353	static void atom_skip_src_int(atom_exec_context ctx, uint8_t attr, int ptr)
354	{	354	{
355	uint32_t align = (attr >> 3) & 7, arg = attr & 7;	355	uint32_t align = (attr >> 3) & 7, arg = attr & 7;
356	switch (arg) {	356	switch (arg) {
357	case ATOM_ARG_REG:	357	case ATOM_ARG_REG:
358	case ATOM_ARG_ID:	358	case ATOM_ARG_ID:
359	(*ptr) += 2;	359	(*ptr) += 2;
360	break;	360	break;
361	case ATOM_ARG_PLL:	361	case ATOM_ARG_PLL:
362	case ATOM_ARG_MC:	362	case ATOM_ARG_MC:
363	case ATOM_ARG_PS:	363	case ATOM_ARG_PS:
364	case ATOM_ARG_WS:	364	case ATOM_ARG_WS:
365	case ATOM_ARG_FB:	365	case ATOM_ARG_FB:
366	(*ptr)++;	366	(*ptr)++;
367	break;	367	break;
368	case ATOM_ARG_IMM:	368	case ATOM_ARG_IMM:
369	switch (align) {	369	switch (align) {
370	case ATOM_SRC_DWORD:	370	case ATOM_SRC_DWORD:
371	(*ptr) += 4;	371	(*ptr) += 4;
372	return;	372	return;
373	case ATOM_SRC_WORD0:	373	case ATOM_SRC_WORD0:
374	case ATOM_SRC_WORD8:	374	case ATOM_SRC_WORD8:
375	case ATOM_SRC_WORD16:	375	case ATOM_SRC_WORD16:
376	(*ptr) += 2;	376	(*ptr) += 2;
377	return;	377	return;
378	case ATOM_SRC_BYTE0:	378	case ATOM_SRC_BYTE0:
379	case ATOM_SRC_BYTE8:	379	case ATOM_SRC_BYTE8:
380	case ATOM_SRC_BYTE16:	380	case ATOM_SRC_BYTE16:
381	case ATOM_SRC_BYTE24:	381	case ATOM_SRC_BYTE24:
382	(*ptr)++;	382	(*ptr)++;
383	return;	383	return;
384	}	384	}
385	return;	385	return;
386	}	386	}
387	}	387	}
388		388
389	static uint32_t atom_get_src(atom_exec_context ctx, uint8_t attr, int ptr)	389	static uint32_t atom_get_src(atom_exec_context ctx, uint8_t attr, int ptr)
390	{	390	{
391	return atom_get_src_int(ctx, attr, ptr, NULL, 1);	391	return atom_get_src_int(ctx, attr, ptr, NULL, 1);
392	}	392	}
393		393
394	static uint32_t atom_get_src_direct(atom_exec_context ctx, uint8_t align, int ptr)	394	static uint32_t atom_get_src_direct(atom_exec_context ctx, uint8_t align, int ptr)
395	{	395	{
396	uint32_t val = 0xCDCDCDCD;	396	uint32_t val = 0xCDCDCDCD;
397		397
398	switch (align) {	398	switch (align) {
399	case ATOM_SRC_DWORD:	399	case ATOM_SRC_DWORD:
400	val = U32(*ptr);	400	val = U32(*ptr);
401	(*ptr) += 4;	401	(*ptr) += 4;
402	break;	402	break;
403	case ATOM_SRC_WORD0:	403	case ATOM_SRC_WORD0:
404	case ATOM_SRC_WORD8:	404	case ATOM_SRC_WORD8:
405	case ATOM_SRC_WORD16:	405	case ATOM_SRC_WORD16:
406	val = U16(*ptr);	406	val = U16(*ptr);
407	(*ptr) += 2;	407	(*ptr) += 2;
408	break;	408	break;
409	case ATOM_SRC_BYTE0:	409	case ATOM_SRC_BYTE0:
410	case ATOM_SRC_BYTE8:	410	case ATOM_SRC_BYTE8:
411	case ATOM_SRC_BYTE16:	411	case ATOM_SRC_BYTE16:
412	case ATOM_SRC_BYTE24:	412	case ATOM_SRC_BYTE24:
413	val = U8(*ptr);	413	val = U8(*ptr);
414	(*ptr)++;	414	(*ptr)++;
415	break;	415	break;
416	}	416	}
417	return val;	417	return val;
418	}	418	}
419		419
420	static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,	420	static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
421	int ptr, uint32_t saved, int print)	421	int ptr, uint32_t saved, int print)
422	{	422	{
423	return atom_get_src_int(ctx,	423	return atom_get_src_int(ctx,
424	arg \| atom_dst_to_src[(attr >> 3) &	424	arg \| atom_dst_to_src[(attr >> 3) &
425	7][(attr >> 6) & 3] << 3,	425	7][(attr >> 6) & 3] << 3,
426	ptr, saved, print);	426	ptr, saved, print);
427	}	427	}
428		428
429	static void atom_skip_dst(atom_exec_context ctx, int arg, uint8_t attr, int ptr)	429	static void atom_skip_dst(atom_exec_context ctx, int arg, uint8_t attr, int ptr)
430	{	430	{
431	atom_skip_src_int(ctx,	431	atom_skip_src_int(ctx,
432	arg \| atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &	432	arg \| atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
433	3] << 3, ptr);	433	3] << 3, ptr);
434	}	434	}
435		435
436	static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,	436	static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
437	int *ptr, uint32_t val, uint32_t saved)	437	int *ptr, uint32_t val, uint32_t saved)
438	{	438	{
439	uint32_t align =	439	uint32_t align =
440	atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =	440	atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
441	val, idx;	441	val, idx;
442	struct atom_context *gctx = ctx->ctx;	442	struct atom_context *gctx = ctx->ctx;
443	old_val &= atom_arg_mask[align] >> atom_arg_shift[align];	443	old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
444	val <<= atom_arg_shift[align];	444	val <<= atom_arg_shift[align];
445	val &= atom_arg_mask[align];	445	val &= atom_arg_mask[align];
446	saved &= ~atom_arg_mask[align];	446	saved &= ~atom_arg_mask[align];
447	val \|= saved;	447	val \|= saved;
448	switch (arg) {	448	switch (arg) {
449	case ATOM_ARG_REG:	449	case ATOM_ARG_REG:
450	idx = U16(*ptr);	450	idx = U16(*ptr);
451	(*ptr) += 2;	451	(*ptr) += 2;
452	DEBUG("REG[0x%04X]", idx);	452	DEBUG("REG[0x%04X]", idx);
453	idx += gctx->reg_block;	453	idx += gctx->reg_block;
454	switch (gctx->io_mode) {	454	switch (gctx->io_mode) {
455	case ATOM_IO_MM:	455	case ATOM_IO_MM:
456	if (idx == 0)	456	if (idx == 0)
457	gctx->card->reg_write(gctx->card, idx,	457	gctx->card->reg_write(gctx->card, idx,
458	val << 2);	458	val << 2);
459	else	459	else
460	gctx->card->reg_write(gctx->card, idx, val);	460	gctx->card->reg_write(gctx->card, idx, val);
461	break;	461	break;
462	case ATOM_IO_PCI:	462	case ATOM_IO_PCI:
463	printk(KERN_INFO	463	printk(KERN_INFO
464	"PCI registers are not implemented.\n");	464	"PCI registers are not implemented.\n");
465	return;	465	return;
466	case ATOM_IO_SYSIO:	466	case ATOM_IO_SYSIO:
467	printk(KERN_INFO	467	printk(KERN_INFO
468	"SYSIO registers are not implemented.\n");	468	"SYSIO registers are not implemented.\n");
469	return;	469	return;
470	default:	470	default:
471	if (!(gctx->io_mode & 0x80)) {	471	if (!(gctx->io_mode & 0x80)) {
472	printk(KERN_INFO "Bad IO mode.\n");	472	printk(KERN_INFO "Bad IO mode.\n");
473	return;	473	return;
474	}	474	}
475	if (!gctx->iio[gctx->io_mode & 0xFF]) {	475	if (!gctx->iio[gctx->io_mode & 0xFF]) {
476	printk(KERN_INFO	476	printk(KERN_INFO
477	"Undefined indirect IO write method %d.\n",	477	"Undefined indirect IO write method %d.\n",
478	gctx->io_mode & 0x7F);	478	gctx->io_mode & 0x7F);
479	return;	479	return;
480	}	480	}
481	atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],	481	atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
482	idx, val);	482	idx, val);
483	}	483	}
484	break;	484	break;
485	case ATOM_ARG_PS:	485	case ATOM_ARG_PS:
486	idx = U8(*ptr);	486	idx = U8(*ptr);
487	(*ptr)++;	487	(*ptr)++;
488	DEBUG("PS[0x%02X]", idx);	488	DEBUG("PS[0x%02X]", idx);
489	ctx->ps[idx] = cpu_to_le32(val);	489	ctx->ps[idx] = cpu_to_le32(val);
490	break;	490	break;
491	case ATOM_ARG_WS:	491	case ATOM_ARG_WS:
492	idx = U8(*ptr);	492	idx = U8(*ptr);
493	(*ptr)++;	493	(*ptr)++;
494	DEBUG("WS[0x%02X]", idx);	494	DEBUG("WS[0x%02X]", idx);
495	switch (idx) {	495	switch (idx) {
496	case ATOM_WS_QUOTIENT:	496	case ATOM_WS_QUOTIENT:
497	gctx->divmul[0] = val;	497	gctx->divmul[0] = val;
498	break;	498	break;
499	case ATOM_WS_REMAINDER:	499	case ATOM_WS_REMAINDER:
500	gctx->divmul[1] = val;	500	gctx->divmul[1] = val;

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(root)/drivers/video/drm/radeon/atom.c – Rev 1428 → 1430