WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/main.c


#include 
#include 
#include 
#include "i915_drv.h"
//#include "intel_drv.h"
 
#include 
#include 
#include 
#include 
#include 
#include 
 
#include "bitmap.h"
 
struct pci_device {
    uint16_t    domain;
    uint8_t     bus;
    uint8_t     dev;
    uint8_t     func;
    uint16_t    vendor_id;
    uint16_t    device_id;
    uint16_t    subvendor_id;
    uint16_t    subdevice_id;
    uint32_t    device_class;
    uint8_t     revision;
};
 
struct drm_device *main_device;
struct drm_file   *drm_file_handlers[256];
videomode_t usermode;
 
void cpu_detect();
 
int _stdcall display_handler(ioctl_t *io);
int init_agp(void);
 
int srv_blit_bitmap(u32 hbitmap, int  dst_x, int dst_y,
               int src_x, int src_y, u32 w, u32 h);
 
int blit_textured(u32 hbitmap, int  dst_x, int dst_y,
               int src_x, int src_y, u32 w, u32 h);
 
int blit_tex(u32 hbitmap, int  dst_x, int dst_y,
             int src_x, int src_y, u32 w, u32 h);
 
void get_pci_info(struct pci_device *dev);
int i915_getparam(struct drm_device *dev, void *data,
             struct drm_file *file_priv);
 
int i915_mask_update(struct drm_device *dev, void *data,
            struct drm_file *file);
 
struct cmdtable cmdtable[]= {
    CMDENTRY("-pm=", i915_powersave),
    CMDENTRY("-rc6=", i915_enable_rc6),
    CMDENTRY("-fbc=", i915_enable_fbc),
    CMDENTRY("-ppgt=", i915_enable_ppgtt),
    CMDENTRY("-pc8=", i915_enable_pc8),
    {NULL, 0}
};
 
 
static char  log[256];
 
struct workqueue_struct *system_wq;
int driver_wq_state;
 
int x86_clflush_size;
unsigned int tsc_khz;
 
int i915_modeset = 1;
 
typedef union __attribute__((packed))
{
    uint32_t val;
    struct
    {
        uint8_t   state;
        uint8_t   code;
        uint16_t  ctrl_key;
    };
}oskey_t;
 
static inline oskey_t get_key(void)
{
    oskey_t val;
    asm volatile("int $0x40":"=a"(val):"a"(2));
    return val;
};
 
void i915_dpms(struct drm_device *dev, int mode);
 
void i915_driver_thread()
{
    struct drm_i915_private *dev_priv = main_device->dev_private;
    struct workqueue_struct *cwq = dev_priv->wq;
    static int dpms = 1;
    static int dpms_lock = 0;
    oskey_t   key;
    unsigned long irqflags;
    int tmp;
 
    printf("%s\n",__FUNCTION__);
 
    asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(1),"c"(1));
    asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0x46),"d"(0x330));
    asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0xC6),"d"(0x330));
 
    while(driver_wq_state != 0)
    {
        key = get_key();
 
        if( (key.val != 1) && (key.state == 0x02))
        {
            if(key.code == 0x46 && dpms_lock == 0)
            {
                dpms_lock = 1;
                if(dpms == 1)
                {
                    i915_dpms(main_device, DRM_MODE_DPMS_OFF);
                    printf("dpms off\n");
                }
                else
                {
                    i915_dpms(main_device, DRM_MODE_DPMS_ON);
                    printf("dpms on\n");
                };
                dpms ^= 1;
                }
            else if(key.code == 0xC6)
                dpms_lock = 0;
        };
 
        spin_lock_irqsave(&cwq->lock, irqflags);
 
        while (!list_empty(&cwq->worklist))
        {
            struct work_struct *work = list_entry(cwq->worklist.next,
                                        struct work_struct, entry);
            work_func_t f = work->func;
            list_del_init(cwq->worklist.next);
 
            spin_unlock_irqrestore(&cwq->lock, irqflags);
            f(work);
            spin_lock_irqsave(&cwq->lock, irqflags);
        }
 
        spin_unlock_irqrestore(&cwq->lock, irqflags);
 
        delay(1);
    };
 
    asm volatile ("int $0x40"::"a"(-1));
}
 
u32_t  __attribute__((externally_visible)) drvEntry(int action, char *cmdline)
{
    int err = 0;
 
    if(action != 1)
    {
        driver_wq_state = 0;
        return 0;
    };
 
    if( GetService("DISPLAY") != 0 )
        return 0;
 
    printf("i915 v3.12\n\nusage: i915 [options]\n"
           "-pm=<0,1>     Enable powersavings, fbc, downclocking, etc. (default: 0 - false)\n");
    printf("-rc6=<-1,0-7> Enable power-saving render C-state 6.\n"
           "              Different stages can be selected via bitmask values\n"
           "              (0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6).\n"
           "              For example, 3 would enable rc6 and deep rc6, and 7 would enable everything.\n"
           "              default: -1 (use per-chip default)\n");
    printf("-fbc=<-1,0,1> Enable frame buffer compression for power savings\n"
           "              (default: 0 - false)\n");
    printf("-ppgt=<0,1>   Enable PPGTT (default: 0 - false)\n");
    printf("-pc8=<0,1>    Enable support for low power package C states (PC8+) (default: 0 - false)\n");
    printf("-l      path to log file\n");
    printf("-m    set videomode\n");
 
    if( cmdline && *cmdline )
        parse_cmdline(cmdline, cmdtable, log, &usermode);
 
 
 
 
 
    if( *log && !dbg_open(log))
        {
            printf("Can't open %s\nExit\n", log);
            return 0;
 
    }
 
    cpu_detect();
//    dbgprintf("\ncache line size %d\n", x86_clflush_size);
 
    enum_pci_devices();
 
    err = i915_init();
    if(err)
    {
        dbgprintf("Epic Fail :(\n");
        return 0;
    };
 
    init_display_kms(main_device, &usermode);
 
    err = RegService("DISPLAY", display_handler);
 
    if( err != 0)
        dbgprintf("Set DISPLAY handler\n");
 
    driver_wq_state = 1;
 
    CreateKernelThread(i915_driver_thread);
 
    return err;
};
 
 
#define CURRENT_API     0x0200      /*      2.00     */
#define COMPATIBLE_API  0x0100      /*      1.00     */
 
#define API_VERSION     (COMPATIBLE_API << 16) | CURRENT_API
#define DISPLAY_VERSION  API_VERSION
 
 
#define SRV_GETVERSION          0
#define SRV_ENUM_MODES          1
#define SRV_SET_MODE            2
#define SRV_GET_CAPS            3
 
#define SRV_CREATE_SURFACE      10
#define SRV_DESTROY_SURFACE     11
#define SRV_LOCK_SURFACE        12
#define SRV_UNLOCK_SURFACE      13
#define SRV_RESIZE_SURFACE      14
#define SRV_BLIT_BITMAP         15
#define SRV_BLIT_TEXTURE        16
#define SRV_BLIT_VIDEO          17
 
 
#define SRV_GET_PCI_INFO            20
#define SRV_I915_GET_PARAM              21
#define SRV_I915_GEM_CREATE         22
#define SRV_DRM_GEM_CLOSE           23
#define SRV_DRM_GEM_FLINK               24
#define SRV_DRM_GEM_OPEN                25
#define SRV_I915_GEM_PIN                26
#define SRV_I915_GEM_UNPIN              27
#define SRV_I915_GEM_SET_CACHING        28
#define SRV_I915_GEM_PWRITE             29
#define SRV_I915_GEM_BUSY               30
#define SRV_I915_GEM_SET_DOMAIN         31
#define SRV_I915_GEM_MMAP               32
#define SRV_I915_GEM_SET_TILING         33
#define SRV_I915_GEM_GET_TILING         34
#define SRV_I915_GEM_GET_APERTURE       35
#define SRV_I915_GEM_MMAP_GTT           36
#define SRV_I915_GEM_THROTTLE           37
#define SRV_I915_GEM_EXECBUFFER2        38
#define SRV_I915_GEM_WAIT               39
#define SRV_I915_GEM_CONTEXT_CREATE     40
#define SRV_I915_GEM_CONTEXT_DESTROY    41
#define SRV_I915_REG_READ               42
 
#define SRV_FBINFO                      43
#define SRV_MASK_UPDATE                 44
 
 
#define check_input(size) \
    if( unlikely((inp==NULL)||(io->inp_size != (size))) )   \
        break;
 
#define check_output(size) \
    if( unlikely((outp==NULL)||(io->out_size != (size))) )   \
        break;
 
int _stdcall display_handler(ioctl_t *io)
{
    struct drm_file *file;
 
    int    retval = -1;
    u32_t *inp;
    u32_t *outp;
 
    inp = io->input;
    outp = io->output;
 
    file = drm_file_handlers[0];
 
    switch(io->io_code)
    {
        case SRV_GETVERSION:
            check_output(4);
            *outp  = DISPLAY_VERSION;
            retval = 0;
            break;
 
        case SRV_ENUM_MODES:
//            dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n",
//                       inp, io->inp_size, io->out_size );
            check_output(4);
//            check_input(*outp * sizeof(videomode_t));
            if( i915_modeset)
                retval = get_videomodes((videomode_t*)inp, outp);
            break;
 
        case SRV_SET_MODE:
//            dbgprintf("SRV_SET_MODE inp %x inp_size %x\n",
//                       inp, io->inp_size);
            check_input(sizeof(videomode_t));
            if( i915_modeset )
                retval = set_user_mode((videomode_t*)inp);
            break;
 
        case SRV_GET_CAPS:
            retval = get_driver_caps((hwcaps_t*)inp);
            break;
 
        case SRV_CREATE_SURFACE:
//            check_input(8);
//            retval = create_surface(main_device, (struct io_call_10*)inp);
            break;
 
        case SRV_LOCK_SURFACE:
//            retval = lock_surface((struct io_call_12*)inp);
            break;
 
        case SRV_RESIZE_SURFACE:
//            retval = resize_surface((struct io_call_14*)inp);
            break;
 
        case SRV_BLIT_BITMAP:
//            srv_blit_bitmap( inp[0], inp[1], inp[2],
//                        inp[3], inp[4], inp[5], inp[6]);
 
//            blit_tex( inp[0], inp[1], inp[2],
//                    inp[3], inp[4], inp[5], inp[6]);
 
            break;
 
        case SRV_GET_PCI_INFO:
            get_pci_info((struct pci_device *)inp);
            retval = 0;
            break;
 
        case SRV_I915_GET_PARAM:
            retval = i915_getparam(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_CREATE:
            retval = i915_gem_create_ioctl(main_device, inp, file);
            break;
 
        case SRV_DRM_GEM_CLOSE:
            retval = drm_gem_close_ioctl(main_device, inp, file);
            break;
 
        case SRV_DRM_GEM_FLINK:
            retval = drm_gem_flink_ioctl(main_device, inp, file);
            break;
 
        case SRV_DRM_GEM_OPEN:
            retval = drm_gem_open_ioctl(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_PIN:
            retval = i915_gem_pin_ioctl(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_UNPIN:
            retval = i915_gem_unpin_ioctl(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_SET_CACHING:
            retval = i915_gem_set_caching_ioctl(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_PWRITE:
            retval = i915_gem_pwrite_ioctl(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_BUSY:
            retval = i915_gem_busy_ioctl(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_SET_DOMAIN:
            retval = i915_gem_set_domain_ioctl(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_MMAP:
            retval = i915_gem_mmap_ioctl(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_SET_TILING:
            retval = i915_gem_set_tiling(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_GET_TILING:
            retval = i915_gem_get_tiling(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_GET_APERTURE:
//            printf("SRV_I915_GEM_GET_APERTURE ");
            retval = i915_gem_get_aperture_ioctl(main_device, inp, file);
//            printf(" retval=%d\n", retval);
            break;
 
        case SRV_I915_GEM_MMAP_GTT:
            retval = i915_gem_mmap_gtt_ioctl(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_THROTTLE:
            retval = i915_gem_throttle_ioctl(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_EXECBUFFER2:
//            printf("SRV_I915_GEM_EXECBUFFER2\n");
            retval = i915_gem_execbuffer2(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_WAIT:
            retval = i915_gem_wait_ioctl(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_CONTEXT_CREATE:
            retval = i915_gem_context_create_ioctl(main_device, inp, file);
            break;
 
        case SRV_I915_GEM_CONTEXT_DESTROY:
            retval = i915_gem_context_destroy_ioctl(main_device, inp, file);
            break;
 
        case SRV_I915_REG_READ:
            retval = i915_reg_read_ioctl(main_device, inp, file);
            break;
 
        case SRV_FBINFO:
            retval = i915_fbinfo(inp);
            break;
 
        case SRV_MASK_UPDATE:
            retval = i915_mask_update(main_device, inp, file);
            break;
    };
 
    return retval;
}
 
 
#define PCI_CLASS_REVISION      0x08
#define PCI_CLASS_DISPLAY_VGA   0x0300
#define PCI_CLASS_BRIDGE_HOST   0x0600
#define PCI_CLASS_BRIDGE_ISA    0x0601
 
int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn)
{
    u16_t vendor, device;
    u32_t class;
    int   ret = 0;
 
    vendor   = id & 0xffff;
    device   = (id >> 16) & 0xffff;
 
    if(vendor == 0x8086)
    {
        class = PciRead32(busnr, devfn, PCI_CLASS_REVISION);
        class >>= 16;
 
        if( (class == PCI_CLASS_DISPLAY_VGA) ||
            (class == PCI_CLASS_BRIDGE_HOST) ||
            (class == PCI_CLASS_BRIDGE_ISA))
            ret = 1;
    }
    return ret;
};
 
 
 
 
static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
                unsigned int *ecx, unsigned int *edx)
{
    /* ecx is often an input as well as an output. */
    asm volatile("cpuid"
        : "=a" (*eax),
          "=b" (*ebx),
          "=c" (*ecx),
          "=d" (*edx)
        : "0" (*eax), "2" (*ecx)
        : "memory");
}
 
 
 
static inline void cpuid(unsigned int op,
                         unsigned int *eax, unsigned int *ebx,
                         unsigned int *ecx, unsigned int *edx)
{
        *eax = op;
        *ecx = 0;
        __cpuid(eax, ebx, ecx, edx);
}
 
void cpu_detect()
{
    u32 junk, tfms, cap0, misc;
 
    cpuid(0x00000001, &tfms, &misc, &junk, &cap0);
 
    if (cap0 & (1<<19))
    {
        x86_clflush_size = ((misc >> 8) & 0xff) * 8;
    }
 
    tsc_khz = (unsigned int)(GetCpuFreq()/1000);
}
 
 
int get_driver_caps(hwcaps_t *caps)
{
    int ret = 0;
 
    switch(caps->idx)
    {
        case 0:
            caps->opt[0] = 0;
            caps->opt[1] = 0;
            break;
 
        case 1:
            caps->cap1.max_tex_width  = 4096;
            caps->cap1.max_tex_height = 4096;
            break;
        default:
            ret = 1;
    };
    caps->idx = 1;
    return ret;
}
 
 
void get_pci_info(struct pci_device *dev)
{
    struct pci_dev *pdev = main_device->pdev;
 
    memset(dev, sizeof(*dev), 0);
 
    dev->domain     = 0;
    dev->bus        = pdev->busnr;
    dev->dev        = pdev->devfn >> 3;
    dev->func       = pdev->devfn & 7;
    dev->vendor_id  = pdev->vendor;
    dev->device_id  = pdev->device;
    dev->revision   = pdev->revision;
};
 
 
 
char *strstr(const char *cs, const char *ct);
 
static int my_atoi(char **cmd)
{
    char* p = *cmd;
    int val = 0;
    int sign = 1;
 
    if(*p == '-')
    {
        sign = -1;
        p++;
    };
 
    for (;; *p++) {
        switch (*p) {
        case '0' ... '9':
            val = 10*val+(*p-'0');
            break;
        default:
            *cmd = p;
            return val*sign;
        }
    }
}
 
char* parse_mode(char *p, videomode_t *mode)
{
    char c;
 
    while( (c = *p++) == ' ');
 
    if( c )
    {
        p--;
 
        mode->width = my_atoi(&p);
        if(*p == 'x') p++;
 
        mode->height = my_atoi(&p);
        if(*p == 'x') p++;
 
        mode->bpp = 32;
 
        mode->freq = my_atoi(&p);
 
        if( mode->freq == 0 )
            mode->freq = 60;
    }
 
    return p;
};
 
 
static char* parse_path(char *p, char *log)
{
    char  c;
 
    while( (c = *p++) == ' ');
        p--;
    while((c = *p++) && (c != ' '))
        *log++ = c;
 
    *log = 0;
 
    return p;
};
 
void parse_cmdline(char *cmdline, struct cmdtable *table, char *log, videomode_t *mode)
{
    char *p = cmdline;
    char *p1;
    int val;
    char c = *p++;
 
    if( table )
    {
        while(table->key)
        {
            if(p1 = strstr(cmdline, table->key))
            {
                p1+= table->size;
                *table->val = my_atoi(&p1);
 
            }
            table++;
        }
    }
 
    while( c )
    {
        if( c == '-')
        {
            switch(*p++)
            {
                case 'l':
                    p = parse_path(p, log);
                    break;
 
                case 'm':
                    p = parse_mode(p, mode);
                    break;
            };
        };
        c = *p++;
    };
};
 
char *strstr(const char *cs, const char *ct)
{
int d0, d1;
register char *__res;
__asm__ __volatile__(
    "movl %6,%%edi\n\t"
    "repne\n\t"
    "scasb\n\t"
    "notl %%ecx\n\t"
    "decl %%ecx\n\t"    /* NOTE! This also sets Z if searchstring='' */
    "movl %%ecx,%%edx\n"
    "1:\tmovl %6,%%edi\n\t"
    "movl %%esi,%%eax\n\t"
    "movl %%edx,%%ecx\n\t"
    "repe\n\t"
    "cmpsb\n\t"
    "je 2f\n\t"     /* also works for empty string, see above */
    "xchgl %%eax,%%esi\n\t"
    "incl %%esi\n\t"
    "cmpb $0,-1(%%eax)\n\t"
    "jne 1b\n\t"
    "xorl %%eax,%%eax\n\t"
    "2:"
    : "=a" (__res), "=&c" (d0), "=&S" (d1)
    : "0" (0), "1" (0xffffffff), "2" (cs), "g" (ct)
    : "dx", "di");
return __res;
}
>
>
 
 

Rev 4280	Rev 4293
1	#include	1	#include
2	#include	2	#include
3	#include	3	#include
4	#include "i915_drv.h"	4	#include "i915_drv.h"
5	//#include "intel_drv.h"	5	//#include "intel_drv.h"
6		6
7	#include	7	#include
8	#include	8	#include
9	#include	9	#include
10	#include	10	#include
11	#include	11	#include
12	#include	12	#include
13		13
14	#include "bitmap.h"	14	#include "bitmap.h"
15		15
16	struct pci_device {	16	struct pci_device {
17	uint16_t domain;	17	uint16_t domain;
18	uint8_t bus;	18	uint8_t bus;
19	uint8_t dev;	19	uint8_t dev;
20	uint8_t func;	20	uint8_t func;
21	uint16_t vendor_id;	21	uint16_t vendor_id;
22	uint16_t device_id;	22	uint16_t device_id;
23	uint16_t subvendor_id;	23	uint16_t subvendor_id;
24	uint16_t subdevice_id;	24	uint16_t subdevice_id;
25	uint32_t device_class;	25	uint32_t device_class;
26	uint8_t revision;	26	uint8_t revision;
27	};	27	};
28		28
29	struct drm_device *main_device;	29	struct drm_device *main_device;
30	struct drm_file *drm_file_handlers[256];	30	struct drm_file *drm_file_handlers[256];
31	videomode_t usermode;	31	videomode_t usermode;
32		32
33	void cpu_detect();	33	void cpu_detect();
34		34
35	int _stdcall display_handler(ioctl_t *io);	35	int _stdcall display_handler(ioctl_t *io);
36	int init_agp(void);	36	int init_agp(void);
37		37
38	int srv_blit_bitmap(u32 hbitmap, int dst_x, int dst_y,	38	int srv_blit_bitmap(u32 hbitmap, int dst_x, int dst_y,
39	int src_x, int src_y, u32 w, u32 h);	39	int src_x, int src_y, u32 w, u32 h);
40		40
41	int blit_textured(u32 hbitmap, int dst_x, int dst_y,	41	int blit_textured(u32 hbitmap, int dst_x, int dst_y,
42	int src_x, int src_y, u32 w, u32 h);	42	int src_x, int src_y, u32 w, u32 h);
43		43
44	int blit_tex(u32 hbitmap, int dst_x, int dst_y,	44	int blit_tex(u32 hbitmap, int dst_x, int dst_y,
45	int src_x, int src_y, u32 w, u32 h);	45	int src_x, int src_y, u32 w, u32 h);
46		46
47	void get_pci_info(struct pci_device *dev);	47	void get_pci_info(struct pci_device *dev);
48	int i915_getparam(struct drm_device dev, void data,	48	int i915_getparam(struct drm_device dev, void data,
49	struct drm_file *file_priv);	49	struct drm_file *file_priv);
50		50
51	int i915_mask_update(struct drm_device dev, void data,	51	int i915_mask_update(struct drm_device dev, void data,
52	struct drm_file *file);	52	struct drm_file *file);
53		53
54	struct cmdtable cmdtable[]= {	54	struct cmdtable cmdtable[]= {
55	CMDENTRY("-pm=", i915_powersave),	55	CMDENTRY("-pm=", i915_powersave),
56	CMDENTRY("-rc6=", i915_enable_rc6),	56	CMDENTRY("-rc6=", i915_enable_rc6),
57	CMDENTRY("-fbc=", i915_enable_fbc),	57	CMDENTRY("-fbc=", i915_enable_fbc),
58	CMDENTRY("-ppgt=", i915_enable_ppgtt),	58	CMDENTRY("-ppgt=", i915_enable_ppgtt),
59	CMDENTRY("-pc8=", i915_enable_pc8),	59	CMDENTRY("-pc8=", i915_enable_pc8),
60	{NULL, 0}	60	{NULL, 0}
61	};	61	};
62		62
63		63
64	static char log[256];	64	static char log[256];
65		65
66	struct workqueue_struct *system_wq;	66	struct workqueue_struct *system_wq;
67	int driver_wq_state;	67	int driver_wq_state;
68		68
69	int x86_clflush_size;	69	int x86_clflush_size;
70	unsigned int tsc_khz;	70	unsigned int tsc_khz;
71		71
72	int i915_modeset = 1;	72	int i915_modeset = 1;
73		73
74	typedef union __attribute__((packed))	74	typedef union __attribute__((packed))
75	{	75	{
76	uint32_t val;	76	uint32_t val;
77	struct	77	struct
78	{	78	{
79	uint8_t state;	79	uint8_t state;
80	uint8_t code;	80	uint8_t code;
81	uint16_t ctrl_key;	81	uint16_t ctrl_key;
82	};	82	};
83	}oskey_t;	83	}oskey_t;
84		84
85	static inline oskey_t get_key(void)	85	static inline oskey_t get_key(void)
86	{	86	{
87	oskey_t val;	87	oskey_t val;
88	asm volatile("int $0x40":"=a"(val):"a"(2));	88	asm volatile("int $0x40":"=a"(val):"a"(2));
89	return val;	89	return val;
90	};	90	};
91		91
92	void i915_dpms(struct drm_device *dev, int mode);	92	void i915_dpms(struct drm_device *dev, int mode);
93		93
94	void i915_driver_thread()	94	void i915_driver_thread()
95	{	95	{
96	struct drm_i915_private *dev_priv = main_device->dev_private;	96	struct drm_i915_private *dev_priv = main_device->dev_private;
97	struct workqueue_struct *cwq = dev_priv->wq;	97	struct workqueue_struct *cwq = dev_priv->wq;
98	static int dpms = 1;	98	static int dpms = 1;
99	static int dpms_lock = 0;	99	static int dpms_lock = 0;
100	oskey_t key;	100	oskey_t key;
101	unsigned long irqflags;	101	unsigned long irqflags;
102	int tmp;	102	int tmp;
103		103
104	printf("%s\n",__FUNCTION__);	104	printf("%s\n",__FUNCTION__);
105		105
106	asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(1),"c"(1));	106	asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(1),"c"(1));
107	asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0x46),"d"(0x330));	107	asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0x46),"d"(0x330));
108	asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0xC6),"d"(0x330));	108	asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0xC6),"d"(0x330));
109		109
110	while(driver_wq_state != 0)	110	while(driver_wq_state != 0)
111	{	111	{
112	key = get_key();	112	key = get_key();
113		113
114	if( (key.val != 1) && (key.state == 0x02))	114	if( (key.val != 1) && (key.state == 0x02))
115	{	115	{
116	if(key.code == 0x46 && dpms_lock == 0)	116	if(key.code == 0x46 && dpms_lock == 0)
117	{	117	{
118	dpms_lock = 1;	118	dpms_lock = 1;
119	if(dpms == 1)	119	if(dpms == 1)
120	{	120	{
121	i915_dpms(main_device, DRM_MODE_DPMS_OFF);	121	i915_dpms(main_device, DRM_MODE_DPMS_OFF);
122	printf("dpms off\n");	122	printf("dpms off\n");
123	}	123	}
124	else	124	else
125	{	125	{
126	i915_dpms(main_device, DRM_MODE_DPMS_ON);	126	i915_dpms(main_device, DRM_MODE_DPMS_ON);
127	printf("dpms on\n");	127	printf("dpms on\n");
128	};	128	};
129	dpms ^= 1;	129	dpms ^= 1;
130	}	130	}
131	else if(key.code == 0xC6)	131	else if(key.code == 0xC6)
132	dpms_lock = 0;	132	dpms_lock = 0;
133	};	133	};
134		134
135	spin_lock_irqsave(&cwq->lock, irqflags);	135	spin_lock_irqsave(&cwq->lock, irqflags);
136		136
137	while (!list_empty(&cwq->worklist))	137	while (!list_empty(&cwq->worklist))
138	{	138	{
139	struct work_struct *work = list_entry(cwq->worklist.next,	139	struct work_struct *work = list_entry(cwq->worklist.next,
140	struct work_struct, entry);	140	struct work_struct, entry);
141	work_func_t f = work->func;	141	work_func_t f = work->func;
142	list_del_init(cwq->worklist.next);	142	list_del_init(cwq->worklist.next);
143		143
144	spin_unlock_irqrestore(&cwq->lock, irqflags);	144	spin_unlock_irqrestore(&cwq->lock, irqflags);
145	f(work);	145	f(work);
146	spin_lock_irqsave(&cwq->lock, irqflags);	146	spin_lock_irqsave(&cwq->lock, irqflags);
147	}	147	}
148		148
149	spin_unlock_irqrestore(&cwq->lock, irqflags);	149	spin_unlock_irqrestore(&cwq->lock, irqflags);
150		150
151	delay(1);	151	delay(1);
152	};	152	};
153		153
154	asm volatile ("int $0x40"::"a"(-1));	154	asm volatile ("int $0x40"::"a"(-1));
155	}	155	}
156		156
157	u32_t __attribute__((externally_visible)) drvEntry(int action, char *cmdline)	157	u32_t __attribute__((externally_visible)) drvEntry(int action, char *cmdline)
158	{	158	{
159	int err = 0;	159	int err = 0;
160		160
161	if(action != 1)	161	if(action != 1)
162	{	162	{
163	driver_wq_state = 0;	163	driver_wq_state = 0;
164	return 0;	164	return 0;
165	};	165	};
166		166
167	if( GetService("DISPLAY") != 0 )	167	if( GetService("DISPLAY") != 0 )
168	return 0;	168	return 0;
169		169
170	printf("i915 v3.12\n\nusage: i915 [options]\n"	170	printf("i915 v3.12\n\nusage: i915 [options]\n"
171	"-pm=<0,1> Enable powersavings, fbc, downclocking, etc. (default: 0 - false)\n");	171	"-pm=<0,1> Enable powersavings, fbc, downclocking, etc. (default: 0 - false)\n");
172	printf("-rc6=<-1,0-7> Enable power-saving render C-state 6.\n"	172	printf("-rc6=<-1,0-7> Enable power-saving render C-state 6.\n"
173	" Different stages can be selected via bitmask values\n"	173	" Different stages can be selected via bitmask values\n"
174	" (0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6).\n"	174	" (0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6).\n"
175	" For example, 3 would enable rc6 and deep rc6, and 7 would enable everything.\n"	175	" For example, 3 would enable rc6 and deep rc6, and 7 would enable everything.\n"
176	" default: -1 (use per-chip default)\n");	176	" default: -1 (use per-chip default)\n");
177	printf("-fbc=<-1,0,1> Enable frame buffer compression for power savings\n"	177	printf("-fbc=<-1,0,1> Enable frame buffer compression for power savings\n"
178	" (default: 0 - false)\n");	178	" (default: 0 - false)\n");
179	printf("-ppgt=<0,1> Enable PPGTT (default: 0 - false)\n");	179	printf("-ppgt=<0,1> Enable PPGTT (default: 0 - false)\n");
180	printf("-pc8=<0,1> Enable support for low power package C states (PC8+) (default: 0 - false)\n");	180	printf("-pc8=<0,1> Enable support for low power package C states (PC8+) (default: 0 - false)\n");
181	printf("-l path to log file\n");	181	printf("-l path to log file\n");
182	printf("-m set videomode\n");	182	printf("-m set videomode\n");
183		183
184	if( cmdline && *cmdline )	184	if( cmdline && *cmdline )
185	parse_cmdline(cmdline, cmdtable, log, &usermode);	185	parse_cmdline(cmdline, cmdtable, log, &usermode);
186		186
187	if(!dbg_open(log))	-
188	{	-
189	strcpy(log, "/tmp1/1/i915.log");	-
190		-
191	if(!dbg_open(log))	187	if( *log && !dbg_open(log))
192	{	188	{
193	printf("Can't open %s\nExit\n", log);	189	printf("Can't open %s\nExit\n", log);
194	return 0;	190	return 0;
195	};	-
196	}	191	}
197		192
198	cpu_detect();	193	cpu_detect();
199	// dbgprintf("\ncache line size %d\n", x86_clflush_size);	194	// dbgprintf("\ncache line size %d\n", x86_clflush_size);
200		195
201	enum_pci_devices();	196	enum_pci_devices();
202		197
203	err = i915_init();	198	err = i915_init();
204	if(err)	199	if(err)
205	{	200	{
206	dbgprintf("Epic Fail :(\n");	201	dbgprintf("Epic Fail :(\n");
207	return 0;	202	return 0;
208	};	203	};
209		204
210	init_display_kms(main_device, &usermode);	205	init_display_kms(main_device, &usermode);
211		206
212	err = RegService("DISPLAY", display_handler);	207	err = RegService("DISPLAY", display_handler);
213		208
214	if( err != 0)	209	if( err != 0)
215	dbgprintf("Set DISPLAY handler\n");	210	dbgprintf("Set DISPLAY handler\n");
216		211
217	driver_wq_state = 1;	212	driver_wq_state = 1;
218		213
219	CreateKernelThread(i915_driver_thread);	214	CreateKernelThread(i915_driver_thread);
220		215
221	return err;	216	return err;
222	};	217	};
223		218
224		219
225	#define CURRENT_API 0x0200 /* 2.00 */	220	#define CURRENT_API 0x0200 /* 2.00 */
226	#define COMPATIBLE_API 0x0100 /* 1.00 */	221	#define COMPATIBLE_API 0x0100 /* 1.00 */
227		222
228	#define API_VERSION (COMPATIBLE_API << 16) \| CURRENT_API	223	#define API_VERSION (COMPATIBLE_API << 16) \| CURRENT_API
229	#define DISPLAY_VERSION API_VERSION	224	#define DISPLAY_VERSION API_VERSION
230		225
231		226
232	#define SRV_GETVERSION 0	227	#define SRV_GETVERSION 0
233	#define SRV_ENUM_MODES 1	228	#define SRV_ENUM_MODES 1
234	#define SRV_SET_MODE 2	229	#define SRV_SET_MODE 2
235	#define SRV_GET_CAPS 3	230	#define SRV_GET_CAPS 3
236		231
237	#define SRV_CREATE_SURFACE 10	232	#define SRV_CREATE_SURFACE 10
238	#define SRV_DESTROY_SURFACE 11	233	#define SRV_DESTROY_SURFACE 11
239	#define SRV_LOCK_SURFACE 12	234	#define SRV_LOCK_SURFACE 12
240	#define SRV_UNLOCK_SURFACE 13	235	#define SRV_UNLOCK_SURFACE 13
241	#define SRV_RESIZE_SURFACE 14	236	#define SRV_RESIZE_SURFACE 14
242	#define SRV_BLIT_BITMAP 15	237	#define SRV_BLIT_BITMAP 15
243	#define SRV_BLIT_TEXTURE 16	238	#define SRV_BLIT_TEXTURE 16
244	#define SRV_BLIT_VIDEO 17	239	#define SRV_BLIT_VIDEO 17
245		240
246		241
247	#define SRV_GET_PCI_INFO 20	242	#define SRV_GET_PCI_INFO 20
248	#define SRV_I915_GET_PARAM 21	243	#define SRV_I915_GET_PARAM 21
249	#define SRV_I915_GEM_CREATE 22	244	#define SRV_I915_GEM_CREATE 22
250	#define SRV_DRM_GEM_CLOSE 23	245	#define SRV_DRM_GEM_CLOSE 23
251	#define SRV_DRM_GEM_FLINK 24	246	#define SRV_DRM_GEM_FLINK 24
252	#define SRV_DRM_GEM_OPEN 25	247	#define SRV_DRM_GEM_OPEN 25
253	#define SRV_I915_GEM_PIN 26	248	#define SRV_I915_GEM_PIN 26
254	#define SRV_I915_GEM_UNPIN 27	249	#define SRV_I915_GEM_UNPIN 27
255	#define SRV_I915_GEM_SET_CACHING 28	250	#define SRV_I915_GEM_SET_CACHING 28
256	#define SRV_I915_GEM_PWRITE 29	251	#define SRV_I915_GEM_PWRITE 29
257	#define SRV_I915_GEM_BUSY 30	252	#define SRV_I915_GEM_BUSY 30
258	#define SRV_I915_GEM_SET_DOMAIN 31	253	#define SRV_I915_GEM_SET_DOMAIN 31
259	#define SRV_I915_GEM_MMAP 32	254	#define SRV_I915_GEM_MMAP 32
260	#define SRV_I915_GEM_SET_TILING 33	255	#define SRV_I915_GEM_SET_TILING 33
261	#define SRV_I915_GEM_GET_TILING 34	256	#define SRV_I915_GEM_GET_TILING 34
262	#define SRV_I915_GEM_GET_APERTURE 35	257	#define SRV_I915_GEM_GET_APERTURE 35
263	#define SRV_I915_GEM_MMAP_GTT 36	258	#define SRV_I915_GEM_MMAP_GTT 36
264	#define SRV_I915_GEM_THROTTLE 37	259	#define SRV_I915_GEM_THROTTLE 37
265	#define SRV_I915_GEM_EXECBUFFER2 38	260	#define SRV_I915_GEM_EXECBUFFER2 38
266	#define SRV_I915_GEM_WAIT 39	261	#define SRV_I915_GEM_WAIT 39
267	#define SRV_I915_GEM_CONTEXT_CREATE 40	262	#define SRV_I915_GEM_CONTEXT_CREATE 40
268	#define SRV_I915_GEM_CONTEXT_DESTROY 41	263	#define SRV_I915_GEM_CONTEXT_DESTROY 41
269	#define SRV_I915_REG_READ 42	264	#define SRV_I915_REG_READ 42
270		265
271	#define SRV_FBINFO 43	266	#define SRV_FBINFO 43
272	#define SRV_MASK_UPDATE 44	267	#define SRV_MASK_UPDATE 44
273		268
274		269
275	#define check_input(size) \	270	#define check_input(size) \
276	if( unlikely((inp==NULL)\|\|(io->inp_size != (size))) ) \	271	if( unlikely((inp==NULL)\|\|(io->inp_size != (size))) ) \
277	break;	272	break;
278		273
279	#define check_output(size) \	274	#define check_output(size) \
280	if( unlikely((outp==NULL)\|\|(io->out_size != (size))) ) \	275	if( unlikely((outp==NULL)\|\|(io->out_size != (size))) ) \
281	break;	276	break;
282		277
283	int _stdcall display_handler(ioctl_t *io)	278	int _stdcall display_handler(ioctl_t *io)
284	{	279	{
285	struct drm_file *file;	280	struct drm_file *file;
286		281
287	int retval = -1;	282	int retval = -1;
288	u32_t *inp;	283	u32_t *inp;
289	u32_t *outp;	284	u32_t *outp;
290		285
291	inp = io->input;	286	inp = io->input;
292	outp = io->output;	287	outp = io->output;
293		288
294	file = drm_file_handlers[0];	289	file = drm_file_handlers[0];
295		290
296	switch(io->io_code)	291	switch(io->io_code)
297	{	292	{
298	case SRV_GETVERSION:	293	case SRV_GETVERSION:
299	check_output(4);	294	check_output(4);
300	*outp = DISPLAY_VERSION;	295	*outp = DISPLAY_VERSION;
301	retval = 0;	296	retval = 0;
302	break;	297	break;
303		298
304	case SRV_ENUM_MODES:	299	case SRV_ENUM_MODES:
305	// dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n",	300	// dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n",
306	// inp, io->inp_size, io->out_size );	301	// inp, io->inp_size, io->out_size );
307	check_output(4);	302	check_output(4);
308	// check_input(outp sizeof(videomode_t));	303	// check_input(outp sizeof(videomode_t));
309	if( i915_modeset)	304	if( i915_modeset)
310	retval = get_videomodes((videomode_t*)inp, outp);	305	retval = get_videomodes((videomode_t*)inp, outp);
311	break;	306	break;
312		307
313	case SRV_SET_MODE:	308	case SRV_SET_MODE:
314	// dbgprintf("SRV_SET_MODE inp %x inp_size %x\n",	309	// dbgprintf("SRV_SET_MODE inp %x inp_size %x\n",
315	// inp, io->inp_size);	310	// inp, io->inp_size);
316	check_input(sizeof(videomode_t));	311	check_input(sizeof(videomode_t));
317	if( i915_modeset )	312	if( i915_modeset )
318	retval = set_user_mode((videomode_t*)inp);	313	retval = set_user_mode((videomode_t*)inp);
319	break;	314	break;
320		315
321	case SRV_GET_CAPS:	316	case SRV_GET_CAPS:
322	retval = get_driver_caps((hwcaps_t*)inp);	317	retval = get_driver_caps((hwcaps_t*)inp);
323	break;	318	break;
324		319
325	case SRV_CREATE_SURFACE:	320	case SRV_CREATE_SURFACE:
326	// check_input(8);	321	// check_input(8);
327	// retval = create_surface(main_device, (struct io_call_10*)inp);	322	// retval = create_surface(main_device, (struct io_call_10*)inp);
328	break;	323	break;
329		324
330	case SRV_LOCK_SURFACE:	325	case SRV_LOCK_SURFACE:
331	// retval = lock_surface((struct io_call_12*)inp);	326	// retval = lock_surface((struct io_call_12*)inp);
332	break;	327	break;
333		328
334	case SRV_RESIZE_SURFACE:	329	case SRV_RESIZE_SURFACE:
335	// retval = resize_surface((struct io_call_14*)inp);	330	// retval = resize_surface((struct io_call_14*)inp);
336	break;	331	break;
337		332
338	case SRV_BLIT_BITMAP:	333	case SRV_BLIT_BITMAP:
339	// srv_blit_bitmap( inp[0], inp[1], inp[2],	334	// srv_blit_bitmap( inp[0], inp[1], inp[2],
340	// inp[3], inp[4], inp[5], inp[6]);	335	// inp[3], inp[4], inp[5], inp[6]);
341		336
342	// blit_tex( inp[0], inp[1], inp[2],	337	// blit_tex( inp[0], inp[1], inp[2],
343	// inp[3], inp[4], inp[5], inp[6]);	338	// inp[3], inp[4], inp[5], inp[6]);
344		339
345	break;	340	break;
346		341
347	case SRV_GET_PCI_INFO:	342	case SRV_GET_PCI_INFO:
348	get_pci_info((struct pci_device *)inp);	343	get_pci_info((struct pci_device *)inp);
349	retval = 0;	344	retval = 0;
350	break;	345	break;
351		346
352	case SRV_I915_GET_PARAM:	347	case SRV_I915_GET_PARAM:
353	retval = i915_getparam(main_device, inp, file);	348	retval = i915_getparam(main_device, inp, file);
354	break;	349	break;
355		350
356	case SRV_I915_GEM_CREATE:	351	case SRV_I915_GEM_CREATE:
357	retval = i915_gem_create_ioctl(main_device, inp, file);	352	retval = i915_gem_create_ioctl(main_device, inp, file);
358	break;	353	break;
359		354
360	case SRV_DRM_GEM_CLOSE:	355	case SRV_DRM_GEM_CLOSE:
361	retval = drm_gem_close_ioctl(main_device, inp, file);	356	retval = drm_gem_close_ioctl(main_device, inp, file);
362	break;	357	break;
363		358
364	case SRV_DRM_GEM_FLINK:	359	case SRV_DRM_GEM_FLINK:
365	retval = drm_gem_flink_ioctl(main_device, inp, file);	360	retval = drm_gem_flink_ioctl(main_device, inp, file);
366	break;	361	break;
367		362
368	case SRV_DRM_GEM_OPEN:	363	case SRV_DRM_GEM_OPEN:
369	retval = drm_gem_open_ioctl(main_device, inp, file);	364	retval = drm_gem_open_ioctl(main_device, inp, file);
370	break;	365	break;
371		366
372	case SRV_I915_GEM_PIN:	367	case SRV_I915_GEM_PIN:
373	retval = i915_gem_pin_ioctl(main_device, inp, file);	368	retval = i915_gem_pin_ioctl(main_device, inp, file);
374	break;	369	break;
375		370
376	case SRV_I915_GEM_UNPIN:	371	case SRV_I915_GEM_UNPIN:
377	retval = i915_gem_unpin_ioctl(main_device, inp, file);	372	retval = i915_gem_unpin_ioctl(main_device, inp, file);
378	break;	373	break;
379		374
380	case SRV_I915_GEM_SET_CACHING:	375	case SRV_I915_GEM_SET_CACHING:
381	retval = i915_gem_set_caching_ioctl(main_device, inp, file);	376	retval = i915_gem_set_caching_ioctl(main_device, inp, file);
382	break;	377	break;
383		378
384	case SRV_I915_GEM_PWRITE:	379	case SRV_I915_GEM_PWRITE:
385	retval = i915_gem_pwrite_ioctl(main_device, inp, file);	380	retval = i915_gem_pwrite_ioctl(main_device, inp, file);
386	break;	381	break;
387		382
388	case SRV_I915_GEM_BUSY:	383	case SRV_I915_GEM_BUSY:
389	retval = i915_gem_busy_ioctl(main_device, inp, file);	384	retval = i915_gem_busy_ioctl(main_device, inp, file);
390	break;	385	break;
391		386
392	case SRV_I915_GEM_SET_DOMAIN:	387	case SRV_I915_GEM_SET_DOMAIN:
393	retval = i915_gem_set_domain_ioctl(main_device, inp, file);	388	retval = i915_gem_set_domain_ioctl(main_device, inp, file);
394	break;	389	break;
395		390
396	case SRV_I915_GEM_MMAP:	391	case SRV_I915_GEM_MMAP:
397	retval = i915_gem_mmap_ioctl(main_device, inp, file);	392	retval = i915_gem_mmap_ioctl(main_device, inp, file);
398	break;	393	break;
399		394
400	case SRV_I915_GEM_SET_TILING:	395	case SRV_I915_GEM_SET_TILING:
401	retval = i915_gem_set_tiling(main_device, inp, file);	396	retval = i915_gem_set_tiling(main_device, inp, file);
402	break;	397	break;
403		398
404	case SRV_I915_GEM_GET_TILING:	399	case SRV_I915_GEM_GET_TILING:
405	retval = i915_gem_get_tiling(main_device, inp, file);	400	retval = i915_gem_get_tiling(main_device, inp, file);
406	break;	401	break;
407		402
408	case SRV_I915_GEM_GET_APERTURE:	403	case SRV_I915_GEM_GET_APERTURE:
409	// printf("SRV_I915_GEM_GET_APERTURE ");	404	// printf("SRV_I915_GEM_GET_APERTURE ");
410	retval = i915_gem_get_aperture_ioctl(main_device, inp, file);	405	retval = i915_gem_get_aperture_ioctl(main_device, inp, file);
411	// printf(" retval=%d\n", retval);	406	// printf(" retval=%d\n", retval);
412	break;	407	break;
413		408
414	case SRV_I915_GEM_MMAP_GTT:	409	case SRV_I915_GEM_MMAP_GTT:
415	retval = i915_gem_mmap_gtt_ioctl(main_device, inp, file);	410	retval = i915_gem_mmap_gtt_ioctl(main_device, inp, file);
416	break;	411	break;
417		412
418	case SRV_I915_GEM_THROTTLE:	413	case SRV_I915_GEM_THROTTLE:
419	retval = i915_gem_throttle_ioctl(main_device, inp, file);	414	retval = i915_gem_throttle_ioctl(main_device, inp, file);
420	break;	415	break;
421		416
422	case SRV_I915_GEM_EXECBUFFER2:	417	case SRV_I915_GEM_EXECBUFFER2:
423	// printf("SRV_I915_GEM_EXECBUFFER2\n");	418	// printf("SRV_I915_GEM_EXECBUFFER2\n");
424	retval = i915_gem_execbuffer2(main_device, inp, file);	419	retval = i915_gem_execbuffer2(main_device, inp, file);
425	break;	420	break;
426		421
427	case SRV_I915_GEM_WAIT:	422	case SRV_I915_GEM_WAIT:
428	retval = i915_gem_wait_ioctl(main_device, inp, file);	423	retval = i915_gem_wait_ioctl(main_device, inp, file);
429	break;	424	break;
430		425
431	case SRV_I915_GEM_CONTEXT_CREATE:	426	case SRV_I915_GEM_CONTEXT_CREATE:
432	retval = i915_gem_context_create_ioctl(main_device, inp, file);	427	retval = i915_gem_context_create_ioctl(main_device, inp, file);
433	break;	428	break;
434		429
435	case SRV_I915_GEM_CONTEXT_DESTROY:	430	case SRV_I915_GEM_CONTEXT_DESTROY:
436	retval = i915_gem_context_destroy_ioctl(main_device, inp, file);	431	retval = i915_gem_context_destroy_ioctl(main_device, inp, file);
437	break;	432	break;
438		433
439	case SRV_I915_REG_READ:	434	case SRV_I915_REG_READ:
440	retval = i915_reg_read_ioctl(main_device, inp, file);	435	retval = i915_reg_read_ioctl(main_device, inp, file);
441	break;	436	break;
442		437
443	case SRV_FBINFO:	438	case SRV_FBINFO:
444	retval = i915_fbinfo(inp);	439	retval = i915_fbinfo(inp);
445	break;	440	break;
446		441
447	case SRV_MASK_UPDATE:	442	case SRV_MASK_UPDATE:
448	retval = i915_mask_update(main_device, inp, file);	443	retval = i915_mask_update(main_device, inp, file);
449	break;	444	break;
450	};	445	};
451		446
452	return retval;	447	return retval;
453	}	448	}
454		449
455		450
456	#define PCI_CLASS_REVISION 0x08	451	#define PCI_CLASS_REVISION 0x08
457	#define PCI_CLASS_DISPLAY_VGA 0x0300	452	#define PCI_CLASS_DISPLAY_VGA 0x0300
458	#define PCI_CLASS_BRIDGE_HOST 0x0600	453	#define PCI_CLASS_BRIDGE_HOST 0x0600
459	#define PCI_CLASS_BRIDGE_ISA 0x0601	454	#define PCI_CLASS_BRIDGE_ISA 0x0601
460		455
461	int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn)	456	int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn)
462	{	457	{
463	u16_t vendor, device;	458	u16_t vendor, device;
464	u32_t class;	459	u32_t class;
465	int ret = 0;	460	int ret = 0;
466		461
467	vendor = id & 0xffff;	462	vendor = id & 0xffff;
468	device = (id >> 16) & 0xffff;	463	device = (id >> 16) & 0xffff;
469		464
470	if(vendor == 0x8086)	465	if(vendor == 0x8086)
471	{	466	{
472	class = PciRead32(busnr, devfn, PCI_CLASS_REVISION);	467	class = PciRead32(busnr, devfn, PCI_CLASS_REVISION);
473	class >>= 16;	468	class >>= 16;
474		469
475	if( (class == PCI_CLASS_DISPLAY_VGA) \|\|	470	if( (class == PCI_CLASS_DISPLAY_VGA) \|\|
476	(class == PCI_CLASS_BRIDGE_HOST) \|\|	471	(class == PCI_CLASS_BRIDGE_HOST) \|\|
477	(class == PCI_CLASS_BRIDGE_ISA))	472	(class == PCI_CLASS_BRIDGE_ISA))
478	ret = 1;	473	ret = 1;
479	}	474	}
480	return ret;	475	return ret;
481	};	476	};
482		477
483		478
484		479
485		480
486	static inline void __cpuid(unsigned int eax, unsigned int ebx,	481	static inline void __cpuid(unsigned int eax, unsigned int ebx,
487	unsigned int ecx, unsigned int edx)	482	unsigned int ecx, unsigned int edx)
488	{	483	{
489	/* ecx is often an input as well as an output. */	484	/* ecx is often an input as well as an output. */
490	asm volatile("cpuid"	485	asm volatile("cpuid"
491	: "=a" (*eax),	486	: "=a" (*eax),
492	"=b" (*ebx),	487	"=b" (*ebx),
493	"=c" (*ecx),	488	"=c" (*ecx),
494	"=d" (*edx)	489	"=d" (*edx)
495	: "0" (eax), "2" (ecx)	490	: "0" (eax), "2" (ecx)
496	: "memory");	491	: "memory");
497	}	492	}
498		493
499		494
500		495

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/main.c – Rev 4280 → 4293