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1 | #include |
1 | #include |
2 | #include |
2 | #include |
3 | #include |
3 | #include |
4 | #include "i915_drv.h" |
4 | #include "i915_drv.h" |
5 | //#include "intel_drv.h" |
5 | //#include "intel_drv.h" |
6 | 6 | ||
7 | #include |
7 | #include |
8 | #include |
8 | #include |
9 | #include |
9 | #include |
10 | #include |
10 | #include |
11 | #include |
11 | #include |
12 | #include |
12 | #include |
13 | 13 | ||
14 | #include "bitmap.h" |
14 | #include "bitmap.h" |
15 | 15 | ||
16 | extern struct drm_device *main_device; |
16 | extern struct drm_device *main_device; |
17 | 17 | ||
18 | void cpu_detect(); |
18 | void cpu_detect(); |
19 | 19 | ||
20 | void parse_cmdline(char *cmdline, char *log); |
20 | void parse_cmdline(char *cmdline, char *log); |
21 | int _stdcall display_handler(ioctl_t *io); |
21 | int _stdcall display_handler(ioctl_t *io); |
22 | int init_agp(void); |
22 | int init_agp(void); |
23 | 23 | ||
24 | int blit_video(u32 hbitmap, int dst_x, int dst_y, |
24 | int srv_blit_bitmap(u32 hbitmap, int dst_x, int dst_y, |
25 | int src_x, int src_y, u32 w, u32 h); |
25 | int src_x, int src_y, u32 w, u32 h); |
26 | 26 | ||
27 | int blit_textured(u32 hbitmap, int dst_x, int dst_y, |
27 | int blit_textured(u32 hbitmap, int dst_x, int dst_y, |
28 | int src_x, int src_y, u32 w, u32 h); |
28 | int src_x, int src_y, u32 w, u32 h); |
29 | 29 | ||
30 | int blit_tex(u32 hbitmap, int dst_x, int dst_y, |
30 | int blit_tex(u32 hbitmap, int dst_x, int dst_y, |
31 | int src_x, int src_y, u32 w, u32 h); |
31 | int src_x, int src_y, u32 w, u32 h); |
32 | 32 | ||
33 | static char log[256]; |
33 | static char log[256]; |
34 | 34 | ||
35 | int x86_clflush_size; |
35 | int x86_clflush_size; |
36 | 36 | ||
37 | int i915_modeset = 1; |
37 | int i915_modeset = 1; |
38 | 38 | ||
39 | u32_t drvEntry(int action, char *cmdline) |
39 | u32_t drvEntry(int action, char *cmdline) |
40 | { |
40 | { |
41 | struct pci_device_id *ent; |
41 | struct pci_device_id *ent; |
42 | 42 | ||
43 | int err = 0; |
43 | int err = 0; |
44 | 44 | ||
45 | if(action != 1) |
45 | if(action != 1) |
46 | return 0; |
46 | return 0; |
47 | 47 | ||
48 | if( GetService("DISPLAY") != 0 ) |
48 | if( GetService("DISPLAY") != 0 ) |
49 | return 0; |
49 | return 0; |
50 | 50 | ||
51 | if( cmdline && *cmdline ) |
51 | if( cmdline && *cmdline ) |
52 | parse_cmdline(cmdline, log); |
52 | parse_cmdline(cmdline, log); |
53 | 53 | ||
54 | if(!dbg_open(log)) |
54 | if(!dbg_open(log)) |
55 | { |
55 | { |
56 | strcpy(log, "/RD/1/DRIVERS/i915.log"); |
56 | strcpy(log, "/RD/1/DRIVERS/i915.log"); |
57 | // strcpy(log, "/BD1/2/i915.log"); |
57 | // strcpy(log, "/BD1/2/i915.log"); |
58 | 58 | ||
59 | if(!dbg_open(log)) |
59 | if(!dbg_open(log)) |
60 | { |
60 | { |
61 | printf("Can't open %s\nExit\n", log); |
61 | printf("Can't open %s\nExit\n", log); |
62 | return 0; |
62 | return 0; |
63 | }; |
63 | }; |
64 | } |
64 | } |
65 | dbgprintf("i915 preview #08\n cmdline: %s\n", cmdline); |
65 | dbgprintf("i915 preview #08\n cmdline: %s\n", cmdline); |
66 | 66 | ||
67 | cpu_detect(); |
67 | cpu_detect(); |
68 | dbgprintf("\ncache line size %d\n", x86_clflush_size); |
68 | dbgprintf("\ncache line size %d\n", x86_clflush_size); |
69 | 69 | ||
70 | enum_pci_devices(); |
70 | enum_pci_devices(); |
71 | 71 | ||
72 | err = i915_init(); |
72 | err = i915_init(); |
73 | 73 | ||
74 | if(err) |
74 | if(err) |
75 | { |
75 | { |
76 | dbgprintf("Epic Fail :(/n"); |
76 | dbgprintf("Epic Fail :(/n"); |
77 | }; |
77 | }; |
78 | 78 | ||
79 | err = RegService("DISPLAY", display_handler); |
79 | err = RegService("DISPLAY", display_handler); |
80 | 80 | ||
81 | if( err != 0) |
81 | if( err != 0) |
82 | dbgprintf("Set DISPLAY handler\n"); |
82 | dbgprintf("Set DISPLAY handler\n"); |
83 | 83 | ||
84 | return err; |
84 | return err; |
85 | }; |
85 | }; |
86 | 86 | ||
87 | #define CURRENT_API 0x0200 /* 2.00 */ |
87 | #define CURRENT_API 0x0200 /* 2.00 */ |
88 | #define COMPATIBLE_API 0x0100 /* 1.00 */ |
88 | #define COMPATIBLE_API 0x0100 /* 1.00 */ |
89 | 89 | ||
90 | #define API_VERSION (COMPATIBLE_API << 16) | CURRENT_API |
90 | #define API_VERSION (COMPATIBLE_API << 16) | CURRENT_API |
91 | #define DISPLAY_VERSION API_VERSION |
91 | #define DISPLAY_VERSION API_VERSION |
92 | 92 | ||
93 | 93 | ||
94 | #define SRV_GETVERSION 0 |
94 | #define SRV_GETVERSION 0 |
95 | #define SRV_ENUM_MODES 1 |
95 | #define SRV_ENUM_MODES 1 |
96 | #define SRV_SET_MODE 2 |
96 | #define SRV_SET_MODE 2 |
97 | #define SRV_GET_CAPS 3 |
97 | #define SRV_GET_CAPS 3 |
98 | 98 | ||
99 | #define SRV_CREATE_SURFACE 10 |
99 | #define SRV_CREATE_SURFACE 10 |
100 | #define SRV_DESTROY_SURFACE 11 |
100 | #define SRV_DESTROY_SURFACE 11 |
101 | #define SRV_LOCK_SURFACE 12 |
101 | #define SRV_LOCK_SURFACE 12 |
102 | #define SRV_UNLOCK_SURFACE 13 |
102 | #define SRV_UNLOCK_SURFACE 13 |
103 | #define SRV_RESIZE_SURFACE 14 |
103 | #define SRV_RESIZE_SURFACE 14 |
104 | - | ||
105 | - | ||
- | 104 | #define SRV_BLIT_BITMAP 15 |
|
- | 105 | #define SRV_BLIT_TEXTURE 16 |
|
106 | #define SRV_BLIT_VIDEO 20 |
106 | #define SRV_BLIT_VIDEO 17 |
107 | 107 | ||
108 | #define check_input(size) \ |
108 | #define check_input(size) \ |
109 | if( unlikely((inp==NULL)||(io->inp_size != (size))) ) \ |
109 | if( unlikely((inp==NULL)||(io->inp_size != (size))) ) \ |
110 | break; |
110 | break; |
111 | 111 | ||
112 | #define check_output(size) \ |
112 | #define check_output(size) \ |
113 | if( unlikely((outp==NULL)||(io->out_size != (size))) ) \ |
113 | if( unlikely((outp==NULL)||(io->out_size != (size))) ) \ |
114 | break; |
114 | break; |
115 | 115 | ||
116 | int _stdcall display_handler(ioctl_t *io) |
116 | int _stdcall display_handler(ioctl_t *io) |
117 | { |
117 | { |
118 | int retval = -1; |
118 | int retval = -1; |
119 | u32_t *inp; |
119 | u32_t *inp; |
120 | u32_t *outp; |
120 | u32_t *outp; |
121 | 121 | ||
122 | inp = io->input; |
122 | inp = io->input; |
123 | outp = io->output; |
123 | outp = io->output; |
124 | 124 | ||
125 | switch(io->io_code) |
125 | switch(io->io_code) |
126 | { |
126 | { |
127 | case SRV_GETVERSION: |
127 | case SRV_GETVERSION: |
128 | check_output(4); |
128 | check_output(4); |
129 | *outp = DISPLAY_VERSION; |
129 | *outp = DISPLAY_VERSION; |
130 | retval = 0; |
130 | retval = 0; |
131 | break; |
131 | break; |
132 | 132 | ||
133 | case SRV_ENUM_MODES: |
133 | case SRV_ENUM_MODES: |
134 | // dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n", |
134 | // dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n", |
135 | // inp, io->inp_size, io->out_size ); |
135 | // inp, io->inp_size, io->out_size ); |
136 | check_output(4); |
136 | check_output(4); |
137 | // check_input(*outp * sizeof(videomode_t)); |
137 | // check_input(*outp * sizeof(videomode_t)); |
138 | if( i915_modeset) |
138 | if( i915_modeset) |
139 | retval = get_videomodes((videomode_t*)inp, outp); |
139 | retval = get_videomodes((videomode_t*)inp, outp); |
140 | break; |
140 | break; |
141 | 141 | ||
142 | case SRV_SET_MODE: |
142 | case SRV_SET_MODE: |
143 | // dbgprintf("SRV_SET_MODE inp %x inp_size %x\n", |
143 | // dbgprintf("SRV_SET_MODE inp %x inp_size %x\n", |
144 | // inp, io->inp_size); |
144 | // inp, io->inp_size); |
145 | check_input(sizeof(videomode_t)); |
145 | check_input(sizeof(videomode_t)); |
146 | if( i915_modeset ) |
146 | if( i915_modeset ) |
147 | retval = set_user_mode((videomode_t*)inp); |
147 | retval = set_user_mode((videomode_t*)inp); |
148 | break; |
148 | break; |
149 | 149 | ||
150 | case SRV_GET_CAPS: |
150 | case SRV_GET_CAPS: |
151 | retval = get_driver_caps((hwcaps_t*)inp); |
151 | retval = get_driver_caps((hwcaps_t*)inp); |
152 | break; |
152 | break; |
153 | 153 | ||
154 | case SRV_CREATE_SURFACE: |
154 | case SRV_CREATE_SURFACE: |
155 | // check_input(8); |
155 | // check_input(8); |
156 | retval = create_surface(main_device, (struct io_call_10*)inp); |
156 | retval = create_surface(main_device, (struct io_call_10*)inp); |
157 | break; |
157 | break; |
158 | 158 | ||
159 | case SRV_LOCK_SURFACE: |
159 | case SRV_LOCK_SURFACE: |
160 | retval = lock_surface((struct io_call_12*)inp); |
160 | retval = lock_surface((struct io_call_12*)inp); |
161 | break; |
161 | break; |
162 | 162 | ||
163 | case SRV_RESIZE_SURFACE: |
163 | case SRV_RESIZE_SURFACE: |
164 | retval = resize_surface((struct io_call_14*)inp); |
164 | retval = resize_surface((struct io_call_14*)inp); |
165 | break; |
165 | break; |
166 | 166 | ||
167 | case SRV_BLIT_VIDEO: |
167 | case SRV_BLIT_BITMAP: |
168 | blit_video( inp[0], inp[1], inp[2], |
168 | srv_blit_bitmap( inp[0], inp[1], inp[2], |
169 | inp[3], inp[4], inp[5], inp[6]); |
169 | inp[3], inp[4], inp[5], inp[6]); |
170 | 170 | ||
171 | // blit_tex( inp[0], inp[1], inp[2], |
171 | // blit_tex( inp[0], inp[1], inp[2], |
172 | // inp[3], inp[4], inp[5], inp[6]); |
172 | // inp[3], inp[4], inp[5], inp[6]); |
173 | 173 | ||
174 | 174 | ||
175 | retval = 0; |
175 | retval = 0; |
176 | break; |
176 | break; |
177 | 177 | ||
178 | }; |
178 | }; |
179 | 179 | ||
180 | return retval; |
180 | return retval; |
181 | } |
181 | } |
182 | 182 | ||
183 | 183 | ||
184 | #define PCI_CLASS_REVISION 0x08 |
184 | #define PCI_CLASS_REVISION 0x08 |
185 | #define PCI_CLASS_DISPLAY_VGA 0x0300 |
185 | #define PCI_CLASS_DISPLAY_VGA 0x0300 |
186 | #define PCI_CLASS_BRIDGE_HOST 0x0600 |
186 | #define PCI_CLASS_BRIDGE_HOST 0x0600 |
187 | #define PCI_CLASS_BRIDGE_ISA 0x0601 |
187 | #define PCI_CLASS_BRIDGE_ISA 0x0601 |
188 | 188 | ||
189 | int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn) |
189 | int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn) |
190 | { |
190 | { |
191 | u16_t vendor, device; |
191 | u16_t vendor, device; |
192 | u32_t class; |
192 | u32_t class; |
193 | int ret = 0; |
193 | int ret = 0; |
194 | 194 | ||
195 | vendor = id & 0xffff; |
195 | vendor = id & 0xffff; |
196 | device = (id >> 16) & 0xffff; |
196 | device = (id >> 16) & 0xffff; |
197 | 197 | ||
198 | if(vendor == 0x8086) |
198 | if(vendor == 0x8086) |
199 | { |
199 | { |
200 | class = PciRead32(busnr, devfn, PCI_CLASS_REVISION); |
200 | class = PciRead32(busnr, devfn, PCI_CLASS_REVISION); |
201 | class >>= 16; |
201 | class >>= 16; |
202 | 202 | ||
203 | if( (class == PCI_CLASS_DISPLAY_VGA) || |
203 | if( (class == PCI_CLASS_DISPLAY_VGA) || |
204 | (class == PCI_CLASS_BRIDGE_HOST) || |
204 | (class == PCI_CLASS_BRIDGE_HOST) || |
205 | (class == PCI_CLASS_BRIDGE_ISA)) |
205 | (class == PCI_CLASS_BRIDGE_ISA)) |
206 | ret = 1; |
206 | ret = 1; |
207 | } |
207 | } |
208 | return ret; |
208 | return ret; |
209 | }; |
209 | }; |
210 | 210 | ||
211 | 211 | ||
212 | static char* parse_path(char *p, char *log) |
212 | static char* parse_path(char *p, char *log) |
213 | { |
213 | { |
214 | char c; |
214 | char c; |
215 | 215 | ||
216 | while( (c = *p++) == ' '); |
216 | while( (c = *p++) == ' '); |
217 | p--; |
217 | p--; |
218 | while( (c = *log++ = *p++) && (c != ' ')); |
218 | while( (c = *log++ = *p++) && (c != ' ')); |
219 | *log = 0; |
219 | *log = 0; |
220 | 220 | ||
221 | return p; |
221 | return p; |
222 | }; |
222 | }; |
223 | 223 | ||
224 | void parse_cmdline(char *cmdline, char *log) |
224 | void parse_cmdline(char *cmdline, char *log) |
225 | { |
225 | { |
226 | char *p = cmdline; |
226 | char *p = cmdline; |
227 | 227 | ||
228 | char c = *p++; |
228 | char c = *p++; |
229 | 229 | ||
230 | while( c ) |
230 | while( c ) |
231 | { |
231 | { |
232 | if( c == '-') |
232 | if( c == '-') |
233 | { |
233 | { |
234 | switch(*p++) |
234 | switch(*p++) |
235 | { |
235 | { |
236 | case 'l': |
236 | case 'l': |
237 | p = parse_path(p, log); |
237 | p = parse_path(p, log); |
238 | break; |
238 | break; |
239 | }; |
239 | }; |
240 | }; |
240 | }; |
241 | c = *p++; |
241 | c = *p++; |
242 | }; |
242 | }; |
243 | }; |
243 | }; |
244 | 244 | ||
245 | 245 | ||
246 | static inline void __cpuid(unsigned int *eax, unsigned int *ebx, |
246 | static inline void __cpuid(unsigned int *eax, unsigned int *ebx, |
247 | unsigned int *ecx, unsigned int *edx) |
247 | unsigned int *ecx, unsigned int *edx) |
248 | { |
248 | { |
249 | /* ecx is often an input as well as an output. */ |
249 | /* ecx is often an input as well as an output. */ |
250 | asm volatile("cpuid" |
250 | asm volatile("cpuid" |
251 | : "=a" (*eax), |
251 | : "=a" (*eax), |
252 | "=b" (*ebx), |
252 | "=b" (*ebx), |
253 | "=c" (*ecx), |
253 | "=c" (*ecx), |
254 | "=d" (*edx) |
254 | "=d" (*edx) |
255 | : "0" (*eax), "2" (*ecx) |
255 | : "0" (*eax), "2" (*ecx) |
256 | : "memory"); |
256 | : "memory"); |
257 | } |
257 | } |
258 | 258 | ||
259 | 259 | ||
260 | 260 | ||
261 | static inline void cpuid(unsigned int op, |
261 | static inline void cpuid(unsigned int op, |
262 | unsigned int *eax, unsigned int *ebx, |
262 | unsigned int *eax, unsigned int *ebx, |
263 | unsigned int *ecx, unsigned int *edx) |
263 | unsigned int *ecx, unsigned int *edx) |
264 | { |
264 | { |
265 | *eax = op; |
265 | *eax = op; |
266 | *ecx = 0; |
266 | *ecx = 0; |
267 | __cpuid(eax, ebx, ecx, edx); |
267 | __cpuid(eax, ebx, ecx, edx); |
268 | } |
268 | } |
269 | 269 | ||
270 | void cpu_detect() |
270 | void cpu_detect() |
271 | { |
271 | { |
272 | u32 junk, tfms, cap0, misc; |
272 | u32 junk, tfms, cap0, misc; |
273 | 273 | ||
274 | cpuid(0x00000001, &tfms, &misc, &junk, &cap0); |
274 | cpuid(0x00000001, &tfms, &misc, &junk, &cap0); |
275 | 275 | ||
276 | if (cap0 & (1<<19)) |
276 | if (cap0 & (1<<19)) |
277 | { |
277 | { |
278 | x86_clflush_size = ((misc >> 8) & 0xff) * 8; |
278 | x86_clflush_size = ((misc >> 8) & 0xff) * 8; |
279 | } |
279 | } |
280 | }19)) |
280 | }19)) |
281 | ><19)) |
281 | ><19)) |
282 | >><> |
282 | >><> |