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1 | #define iowrite32(v, addr) writel((v), (addr)) |
1 | #define iowrite32(v, addr) writel((v), (addr)) |
2 | 2 | ||
3 | #include "drmP.h" |
3 | #include "drmP.h" |
4 | #include "drm.h" |
4 | #include "drm.h" |
5 | #include "i915_drm.h" |
5 | #include "i915_drm.h" |
6 | #include "i915_drv.h" |
6 | #include "i915_drv.h" |
7 | #include "intel_drv.h" |
7 | #include "intel_drv.h" |
8 | 8 | ||
9 | #include |
9 | #include |
10 | #include |
10 | #include |
11 | #include |
11 | #include |
12 | #include |
12 | #include |
13 | #include |
13 | #include |
14 | 14 | ||
15 | #include |
15 | #include |
16 | 16 | ||
17 | #include "bitmap.h" |
17 | #include "bitmap.h" |
18 | 18 | ||
- | 19 | extern struct drm_device *main_device; |
|
- | 20 | ||
19 | 21 | ||
20 | typedef struct |
22 | typedef struct |
21 | { |
23 | { |
22 | kobj_t header; |
24 | kobj_t header; |
23 | 25 | ||
24 | uint32_t *data; |
26 | uint32_t *data; |
25 | uint32_t hot_x; |
27 | uint32_t hot_x; |
26 | uint32_t hot_y; |
28 | uint32_t hot_y; |
27 | 29 | ||
28 | struct list_head list; |
30 | struct list_head list; |
29 | struct drm_i915_gem_object *cobj; |
31 | struct drm_i915_gem_object *cobj; |
30 | }cursor_t; |
32 | }cursor_t; |
31 | 33 | ||
32 | #define CURSOR_WIDTH 64 |
34 | #define CURSOR_WIDTH 64 |
33 | #define CURSOR_HEIGHT 64 |
35 | #define CURSOR_HEIGHT 64 |
34 | 36 | ||
35 | 37 | ||
36 | struct tag_display |
38 | struct tag_display |
37 | { |
39 | { |
38 | int x; |
40 | int x; |
39 | int y; |
41 | int y; |
40 | int width; |
42 | int width; |
41 | int height; |
43 | int height; |
42 | int bpp; |
44 | int bpp; |
43 | int vrefresh; |
45 | int vrefresh; |
44 | int pitch; |
46 | int pitch; |
45 | int lfb; |
47 | int lfb; |
46 | 48 | ||
47 | int supported_modes; |
49 | int supported_modes; |
48 | struct drm_device *ddev; |
50 | struct drm_device *ddev; |
49 | struct drm_connector *connector; |
51 | struct drm_connector *connector; |
50 | struct drm_crtc *crtc; |
52 | struct drm_crtc *crtc; |
51 | 53 | ||
52 | struct list_head cursors; |
54 | struct list_head cursors; |
53 | 55 | ||
54 | cursor_t *cursor; |
56 | cursor_t *cursor; |
55 | int (*init_cursor)(cursor_t*); |
57 | int (*init_cursor)(cursor_t*); |
56 | cursor_t* (__stdcall *select_cursor)(cursor_t*); |
58 | cursor_t* (__stdcall *select_cursor)(cursor_t*); |
57 | void (*show_cursor)(int show); |
59 | void (*show_cursor)(int show); |
58 | void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y); |
60 | void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y); |
59 | void (__stdcall *restore_cursor)(int x, int y); |
61 | void (__stdcall *restore_cursor)(int x, int y); |
60 | void (*disable_mouse)(void); |
62 | void (*disable_mouse)(void); |
61 | }; |
63 | }; |
62 | 64 | ||
63 | 65 | ||
64 | static display_t *os_display; |
66 | static display_t *os_display; |
65 | 67 | ||
66 | u32_t cmd_buffer; |
68 | u32_t cmd_buffer; |
67 | u32_t cmd_offset; |
69 | u32_t cmd_offset; |
68 | 70 | ||
- | 71 | void init_render(); |
|
- | 72 | int sna_init(); |
|
- | 73 | ||
69 | int init_cursor(cursor_t *cursor); |
74 | int init_cursor(cursor_t *cursor); |
70 | static cursor_t* __stdcall select_cursor_kms(cursor_t *cursor); |
75 | static cursor_t* __stdcall select_cursor_kms(cursor_t *cursor); |
71 | static void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y); |
76 | static void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y); |
72 | 77 | ||
73 | void __stdcall restore_cursor(int x, int y) |
78 | void __stdcall restore_cursor(int x, int y) |
74 | {}; |
79 | {}; |
75 | 80 | ||
76 | void disable_mouse(void) |
81 | void disable_mouse(void) |
77 | {}; |
82 | {}; |
78 | 83 | ||
79 | static int count_connector_modes(struct drm_connector* connector) |
84 | static int count_connector_modes(struct drm_connector* connector) |
80 | { |
85 | { |
81 | struct drm_display_mode *mode; |
86 | struct drm_display_mode *mode; |
82 | int count = 0; |
87 | int count = 0; |
83 | 88 | ||
84 | list_for_each_entry(mode, &connector->modes, head) |
89 | list_for_each_entry(mode, &connector->modes, head) |
85 | { |
90 | { |
86 | count++; |
91 | count++; |
87 | }; |
92 | }; |
88 | return count; |
93 | return count; |
89 | }; |
94 | }; |
90 | 95 | ||
91 | int init_display_kms(struct drm_device *dev) |
96 | int init_display_kms(struct drm_device *dev) |
92 | { |
97 | { |
93 | struct drm_connector *connector; |
98 | struct drm_connector *connector; |
94 | struct drm_connector_helper_funcs *connector_funcs; |
99 | struct drm_connector_helper_funcs *connector_funcs; |
95 | struct drm_encoder *encoder; |
100 | struct drm_encoder *encoder; |
96 | struct drm_crtc *crtc = NULL; |
101 | struct drm_crtc *crtc = NULL; |
97 | struct drm_framebuffer *fb; |
102 | struct drm_framebuffer *fb; |
98 | 103 | ||
99 | cursor_t *cursor; |
104 | cursor_t *cursor; |
100 | u32_t ifl; |
105 | u32_t ifl; |
101 | 106 | ||
102 | ENTER(); |
107 | ENTER(); |
103 | 108 | ||
104 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) |
109 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) |
105 | { |
110 | { |
106 | if( connector->status != connector_status_connected) |
111 | if( connector->status != connector_status_connected) |
107 | continue; |
112 | continue; |
108 | 113 | ||
109 | connector_funcs = connector->helper_private; |
114 | connector_funcs = connector->helper_private; |
110 | encoder = connector_funcs->best_encoder(connector); |
115 | encoder = connector_funcs->best_encoder(connector); |
111 | if( encoder == NULL) |
116 | if( encoder == NULL) |
112 | { |
117 | { |
113 | dbgprintf("CONNECTOR %x ID: %d no active encoders\n", |
118 | dbgprintf("CONNECTOR %x ID: %d no active encoders\n", |
114 | connector, connector->base.id); |
119 | connector, connector->base.id); |
115 | continue; |
120 | continue; |
116 | } |
121 | } |
117 | connector->encoder = encoder; |
122 | connector->encoder = encoder; |
118 | 123 | ||
119 | dbgprintf("CONNECTOR %x ID: %d status %d encoder %x\n crtc %x\n", |
124 | dbgprintf("CONNECTOR %x ID: %d status %d encoder %x\n crtc %x\n", |
120 | connector, connector->base.id, |
125 | connector, connector->base.id, |
121 | connector->status, connector->encoder, |
126 | connector->status, connector->encoder, |
122 | encoder->crtc); |
127 | encoder->crtc); |
123 | 128 | ||
124 | crtc = encoder->crtc; |
129 | crtc = encoder->crtc; |
125 | break; |
130 | break; |
126 | }; |
131 | }; |
127 | 132 | ||
128 | if(connector == NULL) |
133 | if(connector == NULL) |
129 | { |
134 | { |
130 | dbgprintf("No active connectors!\n"); |
135 | dbgprintf("No active connectors!\n"); |
131 | return -1; |
136 | return -1; |
132 | }; |
137 | }; |
133 | 138 | ||
134 | if(crtc == NULL) |
139 | if(crtc == NULL) |
135 | { |
140 | { |
136 | struct drm_crtc *tmp_crtc; |
141 | struct drm_crtc *tmp_crtc; |
137 | int crtc_mask = 1; |
142 | int crtc_mask = 1; |
138 | 143 | ||
139 | list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) |
144 | list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) |
140 | { |
145 | { |
141 | if (encoder->possible_crtcs & crtc_mask) |
146 | if (encoder->possible_crtcs & crtc_mask) |
142 | { |
147 | { |
143 | crtc = tmp_crtc; |
148 | crtc = tmp_crtc; |
144 | encoder->crtc = crtc; |
149 | encoder->crtc = crtc; |
145 | break; |
150 | break; |
146 | }; |
151 | }; |
147 | crtc_mask <<= 1; |
152 | crtc_mask <<= 1; |
148 | }; |
153 | }; |
149 | }; |
154 | }; |
150 | 155 | ||
151 | if(crtc == NULL) |
156 | if(crtc == NULL) |
152 | { |
157 | { |
153 | dbgprintf("No CRTC for encoder %d\n", encoder->base.id); |
158 | dbgprintf("No CRTC for encoder %d\n", encoder->base.id); |
154 | return -1; |
159 | return -1; |
155 | }; |
160 | }; |
156 | 161 | ||
157 | 162 | ||
158 | DRM_DEBUG_KMS("[Select CRTC:%d]\n", crtc->base.id); |
163 | DRM_DEBUG_KMS("[Select CRTC:%d]\n", crtc->base.id); |
159 | 164 | ||
160 | os_display = GetDisplay(); |
165 | os_display = GetDisplay(); |
161 | 166 | ||
162 | os_display->ddev = dev; |
167 | os_display->ddev = dev; |
163 | os_display->connector = connector; |
168 | os_display->connector = connector; |
164 | os_display->crtc = crtc; |
169 | os_display->crtc = crtc; |
165 | 170 | ||
166 | os_display->supported_modes = count_connector_modes(connector); |
171 | os_display->supported_modes = count_connector_modes(connector); |
167 | 172 | ||
168 | 173 | ||
169 | ifl = safe_cli(); |
174 | ifl = safe_cli(); |
170 | { |
175 | { |
171 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
176 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
172 | 177 | ||
173 | list_for_each_entry(cursor, &os_display->cursors, list) |
178 | list_for_each_entry(cursor, &os_display->cursors, list) |
174 | { |
179 | { |
175 | init_cursor(cursor); |
180 | init_cursor(cursor); |
176 | }; |
181 | }; |
177 | 182 | ||
178 | os_display->restore_cursor(0,0); |
183 | os_display->restore_cursor(0,0); |
179 | os_display->init_cursor = init_cursor; |
184 | os_display->init_cursor = init_cursor; |
180 | os_display->select_cursor = select_cursor_kms; |
185 | os_display->select_cursor = select_cursor_kms; |
181 | os_display->show_cursor = NULL; |
186 | os_display->show_cursor = NULL; |
182 | os_display->move_cursor = move_cursor_kms; |
187 | os_display->move_cursor = move_cursor_kms; |
183 | os_display->restore_cursor = restore_cursor; |
188 | os_display->restore_cursor = restore_cursor; |
184 | os_display->disable_mouse = disable_mouse; |
189 | os_display->disable_mouse = disable_mouse; |
185 | 190 | ||
186 | intel_crtc->cursor_x = os_display->width/2; |
191 | intel_crtc->cursor_x = os_display->width/2; |
187 | intel_crtc->cursor_y = os_display->height/2; |
192 | intel_crtc->cursor_y = os_display->height/2; |
188 | 193 | ||
189 | select_cursor_kms(os_display->cursor); |
194 | select_cursor_kms(os_display->cursor); |
190 | }; |
195 | }; |
191 | safe_sti(ifl); |
196 | safe_sti(ifl); |
192 | 197 | ||
193 | #define XY_COLOR_BLT ((2<<29)|(0x50<<22)|(0x4)) |
198 | #define XY_COLOR_BLT ((2<<29)|(0x50<<22)|(0x4)) |
194 | #define BLT_WRITE_ALPHA (1<<21) |
199 | #define BLT_WRITE_ALPHA (1<<21) |
195 | #define BLT_WRITE_RGB (1<<20) |
200 | #define BLT_WRITE_RGB (1<<20) |
196 | 201 | ||
197 | #if 1 |
202 | #if 1 |
198 | { |
203 | { |
199 | 204 | ||
200 | drm_i915_private_t *dev_priv = dev->dev_private; |
205 | drm_i915_private_t *dev_priv = dev->dev_private; |
201 | struct drm_i915_gem_object *obj; |
206 | struct drm_i915_gem_object *obj; |
202 | struct intel_ring_buffer *ring; |
207 | struct intel_ring_buffer *ring; |
203 | 208 | ||
204 | obj = i915_gem_alloc_object(dev, 4096); |
209 | obj = i915_gem_alloc_object(dev, 4096); |
205 | i915_gem_object_pin(obj, 4096, true); |
210 | i915_gem_object_pin(obj, 4096, true); |
206 | 211 | ||
207 | cmd_buffer = MapIoMem(obj->pages[0], 4096, PG_SW|PG_NOCACHE); |
212 | cmd_buffer = MapIoMem(obj->pages[0], 4096, PG_SW|PG_NOCACHE); |
208 | cmd_offset = obj->gtt_offset; |
213 | cmd_offset = obj->gtt_offset; |
209 | }; |
214 | }; |
210 | #endif |
215 | #endif |
211 | 216 | ||
- | 217 | main_device = dev; |
|
- | 218 | ||
212 | int err; |
219 | int err; |
213 | 220 | ||
214 | err = init_bitmaps(); |
221 | err = init_bitmaps(); |
215 | if( !err ) |
222 | if( !err ) |
216 | { |
223 | { |
217 | printf("Initialize bitmap manager\n"); |
224 | printf("Initialize bitmap manager\n"); |
218 | }; |
225 | }; |
219 | 226 | ||
- | 227 | sna_init(); |
|
- | 228 | ||
220 | LEAVE(); |
229 | LEAVE(); |
221 | 230 | ||
222 | return 0; |
231 | return 0; |
223 | }; |
232 | }; |
224 | 233 | ||
225 | 234 | ||
226 | bool set_mode(struct drm_device *dev, struct drm_connector *connector, |
235 | bool set_mode(struct drm_device *dev, struct drm_connector *connector, |
227 | videomode_t *reqmode, bool strict) |
236 | videomode_t *reqmode, bool strict) |
228 | { |
237 | { |
229 | struct drm_display_mode *mode = NULL, *tmpmode; |
238 | struct drm_display_mode *mode = NULL, *tmpmode; |
230 | drm_i915_private_t *dev_priv = dev->dev_private; |
239 | drm_i915_private_t *dev_priv = dev->dev_private; |
231 | struct drm_fb_helper *fb_helper = &dev_priv->fbdev->helper; |
240 | struct drm_fb_helper *fb_helper = &dev_priv->fbdev->helper; |
232 | 241 | ||
233 | bool ret = false; |
242 | bool ret = false; |
234 | 243 | ||
235 | ENTER(); |
244 | ENTER(); |
236 | 245 | ||
237 | dbgprintf("width %d height %d vrefresh %d\n", |
246 | dbgprintf("width %d height %d vrefresh %d\n", |
238 | reqmode->width, reqmode->height, reqmode->freq); |
247 | reqmode->width, reqmode->height, reqmode->freq); |
239 | 248 | ||
240 | list_for_each_entry(tmpmode, &connector->modes, head) |
249 | list_for_each_entry(tmpmode, &connector->modes, head) |
241 | { |
250 | { |
242 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
251 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
243 | (drm_mode_height(tmpmode) == reqmode->height) && |
252 | (drm_mode_height(tmpmode) == reqmode->height) && |
244 | (drm_mode_vrefresh(tmpmode) == reqmode->freq) ) |
253 | (drm_mode_vrefresh(tmpmode) == reqmode->freq) ) |
245 | { |
254 | { |
246 | mode = tmpmode; |
255 | mode = tmpmode; |
247 | goto do_set; |
256 | goto do_set; |
248 | } |
257 | } |
249 | }; |
258 | }; |
250 | 259 | ||
251 | if( (mode == NULL) && (strict == false) ) |
260 | if( (mode == NULL) && (strict == false) ) |
252 | { |
261 | { |
253 | list_for_each_entry(tmpmode, &connector->modes, head) |
262 | list_for_each_entry(tmpmode, &connector->modes, head) |
254 | { |
263 | { |
255 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
264 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
256 | (drm_mode_height(tmpmode) == reqmode->height) ) |
265 | (drm_mode_height(tmpmode) == reqmode->height) ) |
257 | { |
266 | { |
258 | mode = tmpmode; |
267 | mode = tmpmode; |
259 | goto do_set; |
268 | goto do_set; |
260 | } |
269 | } |
261 | }; |
270 | }; |
262 | }; |
271 | }; |
263 | 272 | ||
264 | do_set: |
273 | do_set: |
265 | 274 | ||
266 | if( mode != NULL ) |
275 | if( mode != NULL ) |
267 | { |
276 | { |
268 | struct drm_framebuffer *fb; |
277 | struct drm_framebuffer *fb; |
269 | struct drm_encoder *encoder; |
278 | struct drm_encoder *encoder; |
270 | struct drm_crtc *crtc; |
279 | struct drm_crtc *crtc; |
271 | 280 | ||
272 | char *con_name; |
281 | char *con_name; |
273 | char *enc_name; |
282 | char *enc_name; |
274 | 283 | ||
275 | encoder = connector->encoder; |
284 | encoder = connector->encoder; |
276 | crtc = encoder->crtc; |
285 | crtc = encoder->crtc; |
277 | 286 | ||
278 | con_name = drm_get_connector_name(connector); |
287 | con_name = drm_get_connector_name(connector); |
279 | enc_name = drm_get_encoder_name(encoder); |
288 | enc_name = drm_get_encoder_name(encoder); |
280 | 289 | ||
281 | dbgprintf("set mode %d %d connector %s encoder %s\n", |
290 | dbgprintf("set mode %d %d connector %s encoder %s\n", |
282 | reqmode->width, reqmode->height, con_name, enc_name); |
291 | reqmode->width, reqmode->height, con_name, enc_name); |
283 | 292 | ||
284 | fb = fb_helper->fb; |
293 | fb = fb_helper->fb; |
285 | 294 | ||
286 | fb->width = reqmode->width; |
295 | fb->width = reqmode->width; |
287 | fb->height = reqmode->height; |
296 | fb->height = reqmode->height; |
288 | fb->pitches[0] = ALIGN(reqmode->width * 4, 64); |
297 | fb->pitches[0] = ALIGN(reqmode->width * 4, 64); |
289 | fb->pitches[1] = ALIGN(reqmode->width * 4, 64); |
298 | fb->pitches[1] = ALIGN(reqmode->width * 4, 64); |
290 | fb->pitches[2] = ALIGN(reqmode->width * 4, 64); |
299 | fb->pitches[2] = ALIGN(reqmode->width * 4, 64); |
291 | fb->pitches[3] = ALIGN(reqmode->width * 4, 64); |
300 | fb->pitches[3] = ALIGN(reqmode->width * 4, 64); |
292 | 301 | ||
293 | fb->bits_per_pixel = 32; |
302 | fb->bits_per_pixel = 32; |
294 | fb->depth == 24; |
303 | fb->depth == 24; |
295 | 304 | ||
296 | crtc->fb = fb; |
305 | crtc->fb = fb; |
297 | crtc->enabled = true; |
306 | crtc->enabled = true; |
298 | os_display->crtc = crtc; |
307 | os_display->crtc = crtc; |
299 | 308 | ||
300 | ret = drm_crtc_helper_set_mode(crtc, mode, 0, 0, fb); |
309 | ret = drm_crtc_helper_set_mode(crtc, mode, 0, 0, fb); |
301 | 310 | ||
302 | // select_cursor_kms(rdisplay->cursor); |
311 | // select_cursor_kms(rdisplay->cursor); |
303 | // radeon_show_cursor_kms(crtc); |
312 | // radeon_show_cursor_kms(crtc); |
304 | 313 | ||
305 | if (ret == true) |
314 | if (ret == true) |
306 | { |
315 | { |
307 | os_display->width = fb->width; |
316 | os_display->width = fb->width; |
308 | os_display->height = fb->height; |
317 | os_display->height = fb->height; |
309 | os_display->pitch = fb->pitches[0]; |
318 | os_display->pitch = fb->pitches[0]; |
310 | os_display->vrefresh = drm_mode_vrefresh(mode); |
319 | os_display->vrefresh = drm_mode_vrefresh(mode); |
311 | 320 | ||
312 | sysSetScreen(fb->width, fb->height, fb->pitches[0]); |
321 | sysSetScreen(fb->width, fb->height, fb->pitches[0]); |
313 | 322 | ||
314 | dbgprintf("new mode %d x %d pitch %d\n", |
323 | dbgprintf("new mode %d x %d pitch %d\n", |
315 | fb->width, fb->height, fb->pitches[0]); |
324 | fb->width, fb->height, fb->pitches[0]); |
316 | } |
325 | } |
317 | else |
326 | else |
318 | DRM_ERROR("failed to set mode %d_%d on crtc %p\n", |
327 | DRM_ERROR("failed to set mode %d_%d on crtc %p\n", |
319 | fb->width, fb->height, crtc); |
328 | fb->width, fb->height, crtc); |
320 | } |
329 | } |
321 | 330 | ||
322 | LEAVE(); |
331 | LEAVE(); |
323 | return ret; |
332 | return ret; |
324 | }; |
333 | }; |
325 | 334 | ||
326 | 335 | ||
327 | 336 | ||
328 | int get_videomodes(videomode_t *mode, int *count) |
337 | int get_videomodes(videomode_t *mode, int *count) |
329 | { |
338 | { |
330 | int err = -1; |
339 | int err = -1; |
331 | 340 | ||
332 | ENTER(); |
341 | ENTER(); |
333 | 342 | ||
334 | dbgprintf("mode %x count %d\n", mode, *count); |
343 | dbgprintf("mode %x count %d\n", mode, *count); |
335 | 344 | ||
336 | if( *count == 0 ) |
345 | if( *count == 0 ) |
337 | { |
346 | { |
338 | *count = os_display->supported_modes; |
347 | *count = os_display->supported_modes; |
339 | err = 0; |
348 | err = 0; |
340 | } |
349 | } |
341 | else if( mode != NULL ) |
350 | else if( mode != NULL ) |
342 | { |
351 | { |
343 | struct drm_display_mode *drmmode; |
352 | struct drm_display_mode *drmmode; |
344 | int i = 0; |
353 | int i = 0; |
345 | 354 | ||
346 | if( *count > os_display->supported_modes) |
355 | if( *count > os_display->supported_modes) |
347 | *count = os_display->supported_modes; |
356 | *count = os_display->supported_modes; |
348 | 357 | ||
349 | list_for_each_entry(drmmode, &os_display->connector->modes, head) |
358 | list_for_each_entry(drmmode, &os_display->connector->modes, head) |
350 | { |
359 | { |
351 | if( i < *count) |
360 | if( i < *count) |
352 | { |
361 | { |
353 | mode->width = drm_mode_width(drmmode); |
362 | mode->width = drm_mode_width(drmmode); |
354 | mode->height = drm_mode_height(drmmode); |
363 | mode->height = drm_mode_height(drmmode); |
355 | mode->bpp = 32; |
364 | mode->bpp = 32; |
356 | mode->freq = drm_mode_vrefresh(drmmode); |
365 | mode->freq = drm_mode_vrefresh(drmmode); |
357 | i++; |
366 | i++; |
358 | mode++; |
367 | mode++; |
359 | } |
368 | } |
360 | else break; |
369 | else break; |
361 | }; |
370 | }; |
362 | *count = i; |
371 | *count = i; |
363 | err = 0; |
372 | err = 0; |
364 | }; |
373 | }; |
365 | LEAVE(); |
374 | LEAVE(); |
366 | return err; |
375 | return err; |
367 | }; |
376 | }; |
368 | 377 | ||
369 | int set_user_mode(videomode_t *mode) |
378 | int set_user_mode(videomode_t *mode) |
370 | { |
379 | { |
371 | int err = -1; |
380 | int err = -1; |
372 | 381 | ||
373 | ENTER(); |
382 | ENTER(); |
374 | 383 | ||
375 | dbgprintf("width %d height %d vrefresh %d\n", |
384 | dbgprintf("width %d height %d vrefresh %d\n", |
376 | mode->width, mode->height, mode->freq); |
385 | mode->width, mode->height, mode->freq); |
377 | 386 | ||
378 | if( (mode->width != 0) && |
387 | if( (mode->width != 0) && |
379 | (mode->height != 0) && |
388 | (mode->height != 0) && |
380 | (mode->freq != 0 ) && |
389 | (mode->freq != 0 ) && |
381 | ( (mode->width != os_display->width) || |
390 | ( (mode->width != os_display->width) || |
382 | (mode->height != os_display->height) || |
391 | (mode->height != os_display->height) || |
383 | (mode->freq != os_display->vrefresh) ) ) |
392 | (mode->freq != os_display->vrefresh) ) ) |
384 | { |
393 | { |
385 | if( set_mode(os_display->ddev, os_display->connector, mode, true) ) |
394 | if( set_mode(os_display->ddev, os_display->connector, mode, true) ) |
386 | err = 0; |
395 | err = 0; |
387 | }; |
396 | }; |
388 | 397 | ||
389 | LEAVE(); |
398 | LEAVE(); |
390 | return err; |
399 | return err; |
391 | }; |
400 | }; |
392 | 401 | ||
393 | void __attribute__((regparm(1))) destroy_cursor(cursor_t *cursor) |
402 | void __attribute__((regparm(1))) destroy_cursor(cursor_t *cursor) |
394 | { |
403 | { |
395 | /* FIXME synchronization */ |
404 | /* FIXME synchronization */ |
396 | 405 | ||
397 | list_del(&cursor->list); |
406 | list_del(&cursor->list); |
398 | // radeon_bo_unpin(cursor->robj); |
407 | // radeon_bo_unpin(cursor->robj); |
399 | // KernelFree(cursor->data); |
408 | // KernelFree(cursor->data); |
400 | __DestroyObject(cursor); |
409 | __DestroyObject(cursor); |
401 | }; |
410 | }; |
402 | 411 | ||
403 | int init_cursor(cursor_t *cursor) |
412 | int init_cursor(cursor_t *cursor) |
404 | { |
413 | { |
405 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
414 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
406 | struct drm_i915_gem_object *obj; |
415 | struct drm_i915_gem_object *obj; |
407 | uint32_t *bits; |
416 | uint32_t *bits; |
408 | uint32_t *src; |
417 | uint32_t *src; |
409 | 418 | ||
410 | int i,j; |
419 | int i,j; |
411 | int ret; |
420 | int ret; |
412 | 421 | ||
413 | ENTER(); |
422 | ENTER(); |
414 | 423 | ||
415 | if (dev_priv->info->cursor_needs_physical) |
424 | if (dev_priv->info->cursor_needs_physical) |
416 | { |
425 | { |
417 | bits = (uint32_t*)KernelAlloc(CURSOR_WIDTH*CURSOR_HEIGHT*4); |
426 | bits = (uint32_t*)KernelAlloc(CURSOR_WIDTH*CURSOR_HEIGHT*4); |
418 | if (unlikely(bits == NULL)) |
427 | if (unlikely(bits == NULL)) |
419 | return ENOMEM; |
428 | return ENOMEM; |
420 | cursor->cobj = (struct drm_i915_gem_object *)GetPgAddr(bits); |
429 | cursor->cobj = (struct drm_i915_gem_object *)GetPgAddr(bits); |
421 | } |
430 | } |
422 | else |
431 | else |
423 | { |
432 | { |
424 | obj = i915_gem_alloc_object(os_display->ddev, CURSOR_WIDTH*CURSOR_HEIGHT*4); |
433 | obj = i915_gem_alloc_object(os_display->ddev, CURSOR_WIDTH*CURSOR_HEIGHT*4); |
425 | if (unlikely(obj == NULL)) |
434 | if (unlikely(obj == NULL)) |
426 | return -ENOMEM; |
435 | return -ENOMEM; |
427 | 436 | ||
428 | ret = i915_gem_object_pin(obj, CURSOR_WIDTH*CURSOR_HEIGHT*4, true); |
437 | ret = i915_gem_object_pin(obj, CURSOR_WIDTH*CURSOR_HEIGHT*4, true); |
429 | if (ret) { |
438 | if (ret) { |
430 | drm_gem_object_unreference(&obj->base); |
439 | drm_gem_object_unreference(&obj->base); |
431 | return ret; |
440 | return ret; |
432 | } |
441 | } |
433 | 442 | ||
434 | /* You don't need to worry about fragmentation issues. |
443 | /* You don't need to worry about fragmentation issues. |
435 | * GTT space is continuous. I guarantee it. */ |
444 | * GTT space is continuous. I guarantee it. */ |
436 | 445 | ||
437 | bits = (u32*)MapIoMem(get_bus_addr() + obj->gtt_offset, |
446 | bits = (u32*)MapIoMem(get_bus_addr() + obj->gtt_offset, |
438 | CURSOR_WIDTH*CURSOR_HEIGHT*4, PG_SW); |
447 | CURSOR_WIDTH*CURSOR_HEIGHT*4, PG_SW); |
439 | 448 | ||
440 | if (unlikely(bits == NULL)) |
449 | if (unlikely(bits == NULL)) |
441 | { |
450 | { |
442 | i915_gem_object_unpin(obj); |
451 | i915_gem_object_unpin(obj); |
443 | drm_gem_object_unreference(&obj->base); |
452 | drm_gem_object_unreference(&obj->base); |
444 | return -ENOMEM; |
453 | return -ENOMEM; |
445 | }; |
454 | }; |
446 | cursor->cobj = obj; |
455 | cursor->cobj = obj; |
447 | }; |
456 | }; |
448 | 457 | ||
449 | src = cursor->data; |
458 | src = cursor->data; |
450 | 459 | ||
451 | for(i = 0; i < 32; i++) |
460 | for(i = 0; i < 32; i++) |
452 | { |
461 | { |
453 | for(j = 0; j < 32; j++) |
462 | for(j = 0; j < 32; j++) |
454 | *bits++ = *src++; |
463 | *bits++ = *src++; |
455 | for(j = 32; j < CURSOR_WIDTH; j++) |
464 | for(j = 32; j < CURSOR_WIDTH; j++) |
456 | *bits++ = 0; |
465 | *bits++ = 0; |
457 | } |
466 | } |
458 | for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++) |
467 | for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++) |
459 | *bits++ = 0; |
468 | *bits++ = 0; |
460 | 469 | ||
461 | // release old cursor |
470 | // release old cursor |
462 | 471 | ||
463 | KernelFree(cursor->data); |
472 | KernelFree(cursor->data); |
464 | 473 | ||
465 | cursor->data = bits; |
474 | cursor->data = bits; |
466 | 475 | ||
467 | cursor->header.destroy = destroy_cursor; |
476 | cursor->header.destroy = destroy_cursor; |
468 | LEAVE(); |
477 | LEAVE(); |
469 | 478 | ||
470 | return 0; |
479 | return 0; |
471 | } |
480 | } |
472 | 481 | ||
473 | 482 | ||
474 | static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base) |
483 | static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base) |
475 | { |
484 | { |
476 | struct drm_device *dev = crtc->dev; |
485 | struct drm_device *dev = crtc->dev; |
477 | struct drm_i915_private *dev_priv = dev->dev_private; |
486 | struct drm_i915_private *dev_priv = dev->dev_private; |
478 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
487 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
479 | int pipe = intel_crtc->pipe; |
488 | int pipe = intel_crtc->pipe; |
480 | bool visible = base != 0; |
489 | bool visible = base != 0; |
481 | 490 | ||
482 | if (intel_crtc->cursor_visible != visible) { |
491 | if (intel_crtc->cursor_visible != visible) { |
483 | uint32_t cntl = I915_READ(CURCNTR(pipe)); |
492 | uint32_t cntl = I915_READ(CURCNTR(pipe)); |
484 | if (base) { |
493 | if (base) { |
485 | cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT); |
494 | cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT); |
486 | cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; |
495 | cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; |
487 | cntl |= pipe << 28; /* Connect to correct pipe */ |
496 | cntl |= pipe << 28; /* Connect to correct pipe */ |
488 | } else { |
497 | } else { |
489 | cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE); |
498 | cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE); |
490 | cntl |= CURSOR_MODE_DISABLE; |
499 | cntl |= CURSOR_MODE_DISABLE; |
491 | } |
500 | } |
492 | I915_WRITE(CURCNTR(pipe), cntl); |
501 | I915_WRITE(CURCNTR(pipe), cntl); |
493 | 502 | ||
494 | intel_crtc->cursor_visible = visible; |
503 | intel_crtc->cursor_visible = visible; |
495 | } |
504 | } |
496 | /* and commit changes on next vblank */ |
505 | /* and commit changes on next vblank */ |
497 | I915_WRITE(CURBASE(pipe), base); |
506 | I915_WRITE(CURBASE(pipe), base); |
498 | } |
507 | } |
499 | 508 | ||
500 | void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y) |
509 | void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y) |
501 | { |
510 | { |
502 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
511 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
503 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
512 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
504 | u32 base, pos; |
513 | u32 base, pos; |
505 | bool visible; |
514 | bool visible; |
506 | 515 | ||
507 | int pipe = intel_crtc->pipe; |
516 | int pipe = intel_crtc->pipe; |
508 | 517 | ||
509 | intel_crtc->cursor_x = x; |
518 | intel_crtc->cursor_x = x; |
510 | intel_crtc->cursor_y = y; |
519 | intel_crtc->cursor_y = y; |
511 | 520 | ||
512 | x = x - cursor->hot_x; |
521 | x = x - cursor->hot_x; |
513 | y = y - cursor->hot_y; |
522 | y = y - cursor->hot_y; |
514 | 523 | ||
515 | 524 | ||
516 | pos = 0; |
525 | pos = 0; |
517 | 526 | ||
518 | base = intel_crtc->cursor_addr; |
527 | base = intel_crtc->cursor_addr; |
519 | if (x >= os_display->width) |
528 | if (x >= os_display->width) |
520 | base = 0; |
529 | base = 0; |
521 | 530 | ||
522 | if (y >= os_display->height) |
531 | if (y >= os_display->height) |
523 | base = 0; |
532 | base = 0; |
524 | 533 | ||
525 | if (x < 0) |
534 | if (x < 0) |
526 | { |
535 | { |
527 | if (x + intel_crtc->cursor_width < 0) |
536 | if (x + intel_crtc->cursor_width < 0) |
528 | base = 0; |
537 | base = 0; |
529 | 538 | ||
530 | pos |= CURSOR_POS_SIGN << CURSOR_X_SHIFT; |
539 | pos |= CURSOR_POS_SIGN << CURSOR_X_SHIFT; |
531 | x = -x; |
540 | x = -x; |
532 | } |
541 | } |
533 | pos |= x << CURSOR_X_SHIFT; |
542 | pos |= x << CURSOR_X_SHIFT; |
534 | 543 | ||
535 | if (y < 0) |
544 | if (y < 0) |
536 | { |
545 | { |
537 | if (y + intel_crtc->cursor_height < 0) |
546 | if (y + intel_crtc->cursor_height < 0) |
538 | base = 0; |
547 | base = 0; |
539 | 548 | ||
540 | pos |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT; |
549 | pos |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT; |
541 | y = -y; |
550 | y = -y; |
542 | } |
551 | } |
543 | pos |= y << CURSOR_Y_SHIFT; |
552 | pos |= y << CURSOR_Y_SHIFT; |
544 | 553 | ||
545 | visible = base != 0; |
554 | visible = base != 0; |
546 | if (!visible && !intel_crtc->cursor_visible) |
555 | if (!visible && !intel_crtc->cursor_visible) |
547 | return; |
556 | return; |
548 | 557 | ||
549 | I915_WRITE(CURPOS(pipe), pos); |
558 | I915_WRITE(CURPOS(pipe), pos); |
550 | // if (IS_845G(dev) || IS_I865G(dev)) |
559 | // if (IS_845G(dev) || IS_I865G(dev)) |
551 | // i845_update_cursor(crtc, base); |
560 | // i845_update_cursor(crtc, base); |
552 | // else |
561 | // else |
553 | i9xx_update_cursor(os_display->crtc, base); |
562 | i9xx_update_cursor(os_display->crtc, base); |
554 | 563 | ||
555 | }; |
564 | }; |
556 | 565 | ||
557 | 566 | ||
558 | cursor_t* __stdcall select_cursor_kms(cursor_t *cursor) |
567 | cursor_t* __stdcall select_cursor_kms(cursor_t *cursor) |
559 | { |
568 | { |
560 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
569 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
561 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
570 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
562 | cursor_t *old; |
571 | cursor_t *old; |
563 | 572 | ||
564 | old = os_display->cursor; |
573 | old = os_display->cursor; |
565 | os_display->cursor = cursor; |
574 | os_display->cursor = cursor; |
566 | 575 | ||
567 | if (!dev_priv->info->cursor_needs_physical) |
576 | if (!dev_priv->info->cursor_needs_physical) |
568 | intel_crtc->cursor_addr = cursor->cobj->gtt_offset; |
577 | intel_crtc->cursor_addr = cursor->cobj->gtt_offset; |
569 | else |
578 | else |
570 | intel_crtc->cursor_addr = cursor->cobj; |
579 | intel_crtc->cursor_addr = cursor->cobj; |
571 | 580 | ||
572 | intel_crtc->cursor_width = 32; |
581 | intel_crtc->cursor_width = 32; |
573 | intel_crtc->cursor_height = 32; |
582 | intel_crtc->cursor_height = 32; |
574 | 583 | ||
575 | move_cursor_kms(cursor, intel_crtc->cursor_x, intel_crtc->cursor_y); |
584 | move_cursor_kms(cursor, intel_crtc->cursor_x, intel_crtc->cursor_y); |
576 | return old; |
585 | return old; |
577 | }; |
586 | }; |
578 | 587 | ||
579 | extern struct drm_device *main_device; |
- | |
580 | 588 | ||
581 | #define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) |
589 | #define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) |
582 | 590 | ||
583 | 591 | ||
584 | typedef struct |
592 | typedef struct |
585 | { |
593 | { |
586 | int left; |
594 | int left; |
587 | int top; |
595 | int top; |
588 | int right; |
596 | int right; |
589 | int bottom; |
597 | int bottom; |
590 | }rect_t; |
598 | }rect_t; |
591 | 599 | ||
592 | 600 | ||
593 | #include "clip.inc" |
601 | #include "clip.inc" |
594 | 602 | ||
595 | void FASTCALL GetWindowRect(rect_t *rc)__asm__("GetWindowRect"); |
603 | void FASTCALL GetWindowRect(rect_t *rc)__asm__("GetWindowRect"); |
596 | 604 | ||
597 | #define CURRENT_TASK (0x80003000) |
605 | #define CURRENT_TASK (0x80003000) |
598 | 606 | ||
599 | static u32_t get_display_map() |
607 | static u32_t get_display_map() |
600 | { |
608 | { |
601 | u32_t addr; |
609 | u32_t addr; |
602 | 610 | ||
603 | addr = (u32_t)os_display; |
611 | addr = (u32_t)os_display; |
604 | addr+= sizeof(display_t); /* shoot me */ |
612 | addr+= sizeof(display_t); /* shoot me */ |
605 | return *(u32_t*)addr; |
613 | return *(u32_t*)addr; |
606 | } |
614 | } |
607 | 615 | ||
608 | #define XY_SRC_COPY_CHROMA_CMD ((2<<29)|(0x73<<22)|8) |
616 | #define XY_SRC_COPY_CHROMA_CMD ((2<<29)|(0x73<<22)|8) |
609 | #define ROP_COPY_SRC 0xCC |
617 | #define ROP_COPY_SRC 0xCC |
610 | #define FORMAT8888 3 |
618 | #define FORMAT8888 3 |
611 | 619 | ||
612 | typedef int v4si __attribute__ ((vector_size (16))); |
620 | typedef int v4si __attribute__ ((vector_size (16))); |
613 | 621 | ||
614 | 622 | ||
615 | int blit_video(u32 hbitmap, int dst_x, int dst_y, |
623 | int blit_video(u32 hbitmap, int dst_x, int dst_y, |
616 | int src_x, int src_y, u32 w, u32 h) |
624 | int src_x, int src_y, u32 w, u32 h) |
617 | { |
625 | { |
618 | drm_i915_private_t *dev_priv = main_device->dev_private; |
626 | drm_i915_private_t *dev_priv = main_device->dev_private; |
619 | struct intel_ring_buffer *ring; |
627 | struct intel_ring_buffer *ring; |
620 | 628 | ||
621 | bitmap_t *bitmap; |
629 | bitmap_t *bitmap; |
622 | rect_t winrc; |
630 | rect_t winrc; |
623 | clip_t dst_clip; |
631 | clip_t dst_clip; |
624 | clip_t src_clip; |
632 | clip_t src_clip; |
625 | u32_t width; |
633 | u32_t width; |
626 | u32_t height; |
634 | u32_t height; |
627 | 635 | ||
628 | u32_t br13, cmd, slot_mask, *b; |
636 | u32_t br13, cmd, slot_mask, *b; |
629 | u32_t offset; |
637 | u32_t offset; |
630 | u8 slot; |
638 | u8 slot; |
631 | int n=0; |
639 | int n=0; |
632 | 640 | ||
633 | if(unlikely(hbitmap==0)) |
641 | if(unlikely(hbitmap==0)) |
634 | return -1; |
642 | return -1; |
635 | 643 | ||
636 | bitmap = (bitmap_t*)hman_get_data(&bm_man, hbitmap); |
644 | bitmap = (bitmap_t*)hman_get_data(&bm_man, hbitmap); |
637 | 645 | ||
638 | if(unlikely(bitmap==NULL)) |
646 | if(unlikely(bitmap==NULL)) |
639 | return -1; |
647 | return -1; |
640 | 648 | ||
641 | 649 | ||
642 | GetWindowRect(&winrc); |
650 | GetWindowRect(&winrc); |
643 | 651 | ||
644 | dst_clip.xmin = 0; |
652 | dst_clip.xmin = 0; |
645 | dst_clip.ymin = 0; |
653 | dst_clip.ymin = 0; |
646 | dst_clip.xmax = winrc.right-winrc.left-1; |
654 | dst_clip.xmax = winrc.right-winrc.left-1; |
647 | dst_clip.ymax = winrc.bottom -winrc.top -1; |
655 | dst_clip.ymax = winrc.bottom -winrc.top -1; |
648 | 656 | ||
649 | src_clip.xmin = 0; |
657 | src_clip.xmin = 0; |
650 | src_clip.ymin = 0; |
658 | src_clip.ymin = 0; |
651 | src_clip.xmax = bitmap->width - 1; |
659 | src_clip.xmax = bitmap->width - 1; |
652 | src_clip.ymax = bitmap->height - 1; |
660 | src_clip.ymax = bitmap->height - 1; |
653 | 661 | ||
654 | width = w; |
662 | width = w; |
655 | height = h; |
663 | height = h; |
656 | 664 | ||
657 | if( blit_clip(&dst_clip, &dst_x, &dst_y, |
665 | if( blit_clip(&dst_clip, &dst_x, &dst_y, |
658 | &src_clip, &src_x, &src_y, |
666 | &src_clip, &src_x, &src_y, |
659 | &width, &height) ) |
667 | &width, &height) ) |
660 | return 0; |
668 | return 0; |
661 | 669 | ||
662 | dst_x+= winrc.left; |
670 | dst_x+= winrc.left; |
663 | dst_y+= winrc.top; |
671 | dst_y+= winrc.top; |
664 | 672 | ||
665 | slot = *((u8*)CURRENT_TASK); |
673 | slot = *((u8*)CURRENT_TASK); |
666 | 674 | ||
667 | slot_mask = (u32_t)slot<<24; |
675 | slot_mask = (u32_t)slot<<24; |
668 | 676 | ||
669 | { |
677 | { |
670 | #if 0 |
678 | #if 0 |
671 | static v4si write_mask = {0xFF000000, 0xFF000000, |
679 | static v4si write_mask = {0xFF000000, 0xFF000000, |
672 | 0xFF000000, 0xFF000000}; |
680 | 0xFF000000, 0xFF000000}; |
673 | 681 | ||
674 | u8* src_offset; |
682 | u8* src_offset; |
675 | u8* dst_offset; |
683 | u8* dst_offset; |
676 | 684 | ||
677 | src_offset = (u8*)(src_y*bitmap->pitch + src_x*4); |
685 | src_offset = (u8*)(src_y*bitmap->pitch + src_x*4); |
678 | src_offset += (u32)bitmap->uaddr; |
686 | src_offset += (u32)bitmap->uaddr; |
679 | 687 | ||
680 | dst_offset = (u8*)(dst_y*os_display->width + dst_x); |
688 | dst_offset = (u8*)(dst_y*os_display->width + dst_x); |
681 | dst_offset+= get_display_map(); |
689 | dst_offset+= get_display_map(); |
682 | 690 | ||
683 | u32_t tmp_h = height; |
691 | u32_t tmp_h = height; |
684 | 692 | ||
685 | __asm__ __volatile__ ( |
693 | __asm__ __volatile__ ( |
686 | "movdqa %[write_mask], %%xmm7 \n" |
694 | "movdqa %[write_mask], %%xmm7 \n" |
687 | "movd %[slot_mask], %%xmm6 \n" |
695 | "movd %[slot_mask], %%xmm6 \n" |
688 | "punpckldq %%xmm6, %%xmm6 \n" |
696 | "punpckldq %%xmm6, %%xmm6 \n" |
689 | "punpcklqdq %%xmm6, %%xmm6 \n" |
697 | "punpcklqdq %%xmm6, %%xmm6 \n" |
690 | :: [write_mask] "m" (write_mask), |
698 | :: [write_mask] "m" (write_mask), |
691 | [slot_mask] "g" (slot_mask) |
699 | [slot_mask] "g" (slot_mask) |
692 | :"xmm7", "xmm6"); |
700 | :"xmm7", "xmm6"); |
693 | 701 | ||
694 | while( tmp_h--) |
702 | while( tmp_h--) |
695 | { |
703 | { |
696 | u32_t tmp_w = width; |
704 | u32_t tmp_w = width; |
697 | 705 | ||
698 | u8* tmp_src = src_offset; |
706 | u8* tmp_src = src_offset; |
699 | u8* tmp_dst = dst_offset; |
707 | u8* tmp_dst = dst_offset; |
700 | 708 | ||
701 | src_offset+= bitmap->pitch; |
709 | src_offset+= bitmap->pitch; |
702 | dst_offset+= os_display->width; |
710 | dst_offset+= os_display->width; |
703 | 711 | ||
704 | while( tmp_w >= 8 ) |
712 | while( tmp_w >= 8 ) |
705 | { |
713 | { |
706 | __asm__ __volatile__ ( |
714 | __asm__ __volatile__ ( |
707 | "movq (%0), %%xmm0 \n" |
715 | "movq (%0), %%xmm0 \n" |
708 | "punpcklbw %%xmm0, %%xmm0 \n" |
716 | "punpcklbw %%xmm0, %%xmm0 \n" |
709 | "movdqa %%xmm0, %%xmm1 \n" |
717 | "movdqa %%xmm0, %%xmm1 \n" |
710 | "punpcklwd %%xmm0, %%xmm0 \n" |
718 | "punpcklwd %%xmm0, %%xmm0 \n" |
711 | "punpckhwd %%xmm1, %%xmm1 \n" |
719 | "punpckhwd %%xmm1, %%xmm1 \n" |
712 | "pcmpeqb %%xmm6, %%xmm0 \n" |
720 | "pcmpeqb %%xmm6, %%xmm0 \n" |
713 | "pcmpeqb %%xmm6, %%xmm1 \n" |
721 | "pcmpeqb %%xmm6, %%xmm1 \n" |
714 | "maskmovdqu %%xmm7, %%xmm0 \n" |
722 | "maskmovdqu %%xmm7, %%xmm0 \n" |
715 | "addl $16, %%edi \n" |
723 | "addl $16, %%edi \n" |
716 | "maskmovdqu %%xmm7, %%xmm1 \n" |
724 | "maskmovdqu %%xmm7, %%xmm1 \n" |
717 | :: "r" (tmp_dst), "D" (tmp_src) |
725 | :: "r" (tmp_dst), "D" (tmp_src) |
718 | :"xmm0", "xmm1"); |
726 | :"xmm0", "xmm1"); |
719 | __asm__ __volatile__ ("":::"edi"); |
727 | __asm__ __volatile__ ("":::"edi"); |
720 | tmp_w -= 8; |
728 | tmp_w -= 8; |
721 | tmp_src += 32; |
729 | tmp_src += 32; |
722 | tmp_dst += 8; |
730 | tmp_dst += 8; |
723 | }; |
731 | }; |
724 | 732 | ||
725 | if( tmp_w >= 4 ) |
733 | if( tmp_w >= 4 ) |
726 | { |
734 | { |
727 | __asm__ __volatile__ ( |
735 | __asm__ __volatile__ ( |
728 | "movd (%0), %%xmm0 \n" |
736 | "movd (%0), %%xmm0 \n" |
729 | "punpcklbw %%xmm0, %%xmm0 \n" |
737 | "punpcklbw %%xmm0, %%xmm0 \n" |
730 | "punpcklwd %%xmm0, %%xmm0 \n" |
738 | "punpcklwd %%xmm0, %%xmm0 \n" |
731 | "pcmpeqb %%xmm6, %%xmm0 \n" |
739 | "pcmpeqb %%xmm6, %%xmm0 \n" |
732 | "maskmovdqu %%xmm7, %%xmm0 \n" |
740 | "maskmovdqu %%xmm7, %%xmm0 \n" |
733 | :: "r" (tmp_dst), "D" (tmp_src) |
741 | :: "r" (tmp_dst), "D" (tmp_src) |
734 | :"xmm0"); |
742 | :"xmm0"); |
735 | tmp_w -= 4; |
743 | tmp_w -= 4; |
736 | tmp_src += 16; |
744 | tmp_src += 16; |
737 | tmp_dst += 4; |
745 | tmp_dst += 4; |
738 | }; |
746 | }; |
739 | 747 | ||
740 | while( tmp_w--) |
748 | while( tmp_w--) |
741 | { |
749 | { |
742 | *(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00; |
750 | *(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00; |
743 | tmp_src+=4; |
751 | tmp_src+=4; |
744 | tmp_dst++; |
752 | tmp_dst++; |
745 | }; |
753 | }; |
746 | }; |
754 | }; |
747 | #else |
755 | #else |
748 | u8* src_offset; |
756 | u8* src_offset; |
749 | u8* dst_offset; |
757 | u8* dst_offset; |
750 | 758 | u32 ifl; |
|
- | 759 | ||
751 | src_offset = (u8*)(src_y*bitmap->pitch + src_x*4); |
760 | src_offset = (u8*)(src_y*bitmap->pitch + src_x*4); |
752 | src_offset += (u32)bitmap->uaddr; |
761 | src_offset += (u32)bitmap->uaddr; |
753 | 762 | ||
754 | dst_offset = (u8*)(dst_y*os_display->width + dst_x); |
763 | dst_offset = (u8*)(dst_y*os_display->width + dst_x); |
755 | dst_offset+= get_display_map(); |
764 | dst_offset+= get_display_map(); |
756 | 765 | ||
757 | u32_t tmp_h = height; |
766 | u32_t tmp_h = height; |
758 | 767 | ||
- | 768 | ifl = safe_cli(); |
|
759 | while( tmp_h--) |
769 | while( tmp_h--) |
760 | { |
770 | { |
761 | u32_t tmp_w = width; |
771 | u32_t tmp_w = width; |
762 | 772 | ||
763 | u8* tmp_src = src_offset; |
773 | u8* tmp_src = src_offset; |
764 | u8* tmp_dst = dst_offset; |
774 | u8* tmp_dst = dst_offset; |
765 | 775 | ||
766 | src_offset+= bitmap->pitch; |
776 | src_offset+= bitmap->pitch; |
767 | dst_offset+= os_display->width; |
777 | dst_offset+= os_display->width; |
768 | 778 | ||
769 | while( tmp_w--) |
779 | while( tmp_w--) |
770 | { |
780 | { |
771 | *(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00; |
781 | *(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00; |
772 | tmp_src+=4; |
782 | tmp_src+=4; |
773 | tmp_dst++; |
783 | tmp_dst++; |
774 | }; |
784 | }; |
775 | }; |
785 | }; |
776 | } |
786 | safe_sti(ifl); |
- | 787 | } |
|
777 | #endif |
788 | #endif |
778 | 789 | ||
779 | if((cmd_buffer & 0xFC0)==0xFC0) |
790 | if((cmd_buffer & 0xFC0)==0xFC0) |
780 | cmd_buffer&= 0xFFFFF000; |
791 | cmd_buffer&= 0xFFFFF000; |
781 | 792 | ||
782 | b = (u32_t*)ALIGN(cmd_buffer,16); |
793 | b = (u32_t*)ALIGN(cmd_buffer,16); |
783 | 794 | ||
784 | offset = cmd_offset + ((u32_t)b & 0xFFF); |
795 | offset = cmd_offset + ((u32_t)b & 0xFFF); |
785 | 796 | ||
786 | cmd = XY_SRC_COPY_CHROMA_CMD | BLT_WRITE_RGB | BLT_WRITE_ALPHA; |
797 | cmd = XY_SRC_COPY_CHROMA_CMD | BLT_WRITE_RGB | BLT_WRITE_ALPHA; |
787 | cmd |= 3 << 17; |
798 | cmd |= 3 << 17; |
788 | 799 | ||
789 | br13 = os_display->pitch; |
800 | br13 = os_display->pitch; |
790 | br13|= ROP_COPY_SRC << 16; |
801 | br13|= ROP_COPY_SRC << 16; |
791 | br13|= FORMAT8888 << 24; |
802 | br13|= FORMAT8888 << 24; |
792 | 803 | ||
793 | b[n++] = cmd; |
804 | b[n++] = cmd; |
794 | b[n++] = br13; |
805 | b[n++] = br13; |
795 | b[n++] = (dst_y << 16) | dst_x; // left, top |
806 | b[n++] = (dst_y << 16) | dst_x; // left, top |
796 | b[n++] = ((dst_y+height-1)<< 16)|(dst_x+width-1); // bottom, right |
807 | b[n++] = ((dst_y+height-1)<< 16)|(dst_x+width-1); // bottom, right |
797 | b[n++] = 0; // destination |
808 | b[n++] = 0; // destination |
798 | b[n++] = (src_y << 16) | src_x; // source left & top |
809 | b[n++] = (src_y << 16) | src_x; // source left & top |
799 | b[n++] = bitmap->pitch; // source pitch |
810 | b[n++] = bitmap->pitch; // source pitch |
800 | b[n++] = bitmap->gaddr; // source |
811 | b[n++] = bitmap->gaddr; // source |
801 | 812 | ||
802 | b[n++] = 0; // Transparency Color Low |
813 | b[n++] = 0; // Transparency Color Low |
803 | b[n++] = 0x00FFFFFF; // Transparency Color High |
814 | b[n++] = 0x00FFFFFF; // Transparency Color High |
804 | 815 | ||
805 | b[n++] = MI_BATCH_BUFFER_END; |
816 | b[n++] = MI_BATCH_BUFFER_END; |
806 | if( n & 1) |
817 | if( n & 1) |
807 | b[n++] = MI_NOOP; |
818 | b[n++] = MI_NOOP; |
808 | 819 | ||
809 | i915_gem_object_set_to_gtt_domain(bitmap->obj, false); |
820 | i915_gem_object_set_to_gtt_domain(bitmap->obj, false); |
810 | 821 | ||
811 | if (HAS_BLT(main_device)) |
822 | if (HAS_BLT(main_device)) |
812 | ring = &dev_priv->ring[BCS]; |
823 | { |
813 | else |
- | |
814 | ring = &dev_priv->ring[RCS]; |
824 | int ret; |
815 | 825 | ||
- | 826 | ring = &dev_priv->ring[BCS]; |
|
816 | ring->dispatch_execbuffer(ring, cmd_offset, n*4); |
827 | ring->dispatch_execbuffer(ring, cmd_offset, n*4); |
817 | - | ||
818 | int ret; |
- | |
819 | 828 | ||
820 | ret = intel_ring_begin(ring, 4); |
829 | ret = intel_ring_begin(ring, 4); |
821 | if (ret) |
830 | if (ret) |
822 | return ret; |
831 | return ret; |
823 | 832 | ||
824 | intel_ring_emit(ring, MI_FLUSH_DW); |
833 | intel_ring_emit(ring, MI_FLUSH_DW); |
825 | intel_ring_emit(ring, 0); |
834 | intel_ring_emit(ring, 0); |
826 | intel_ring_emit(ring, 0); |
835 | intel_ring_emit(ring, 0); |
827 | intel_ring_emit(ring, MI_NOOP); |
836 | intel_ring_emit(ring, MI_NOOP); |
828 | intel_ring_advance(ring); |
837 | intel_ring_advance(ring); |
829 | 838 | } |
|
- | 839 | else |
|
- | 840 | { |
|
- | 841 | ring = &dev_priv->ring[RCS]; |
|
- | 842 | ring->dispatch_execbuffer(ring, cmd_offset, n*4); |
|
- | 843 | ring->flush(ring, 0, I915_GEM_DOMAIN_RENDER); |
|
- | 844 | }; |
|
- | 845 | ||
- | 846 | bitmap->obj->base.read_domains = I915_GEM_DOMAIN_CPU; |
|
- | 847 | bitmap->obj->base.write_domain = I915_GEM_DOMAIN_CPU; |
|
- | 848 | ||
830 | return 0; |
849 | return 0; |
831 | fail: |
850 | fail: |
832 | return -1; |
851 | return -1; |
833 | };><>><>><>><>><>><>24; |
852 | }; |
834 | 853 | ||
- | 854 | ||
- | 855 | /* For display hotplug interrupt */ |
|
- | 856 | static void |
|
- | 857 | ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask) |
|
- | 858 | { |
|
- | 859 | if ((dev_priv->irq_mask & mask) != 0) { |
|
- | 860 | dev_priv->irq_mask &= ~mask; |
|
- | 861 | I915_WRITE(DEIMR, dev_priv->irq_mask); |
|
- | 862 | POSTING_READ(DEIMR); |
|
- | 863 | } |
|
- | 864 | } |
|
- | 865 | ||
- | 866 | static int ironlake_enable_vblank(struct drm_device *dev, int pipe) |
|
- | 867 | { |
|
- | 868 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
|
- | 869 | unsigned long irqflags; |
|
- | 870 | ||
- | 871 | // if (!i915_pipe_enabled(dev, pipe)) |
|
- | 872 | // return -EINVAL; |
|
- | 873 | ||
- | 874 | spin_lock_irqsave(&dev_priv->irq_lock, irqflags); |
|
- | 875 | ironlake_enable_display_irq(dev_priv, (pipe == 0) ? |
|
- | 876 | DE_PIPEA_VBLANK : DE_PIPEB_VBLANK); |
|
- | 877 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); |
|
- | 878 | ||
- | 879 | return 0; |
|
- | 880 | } |
|
- | 881 | ||
- | 882 | ||
- | 883 | ||
- | 884 | static int i915_interrupt_info(struct drm_device *dev) |
|
- | 885 | { |
|
- | 886 | drm_i915_private_t *dev_priv = dev->dev_private; |
|
- | 887 | int ret, i, pipe; |
|
- | 888 | ||
- | 889 | if (!HAS_PCH_SPLIT(dev)) { |
|
- | 890 | dbgprintf("Interrupt enable: %08x\n", |
|
- | 891 | I915_READ(IER)); |
|
- | 892 | dbgprintf("Interrupt identity: %08x\n", |
|
- | 893 | I915_READ(IIR)); |
|
- | 894 | dbgprintf("Interrupt mask: %08x\n", |
|
- | 895 | I915_READ(IMR)); |
|
- | 896 | for_each_pipe(pipe) |
|
- | 897 | dbgprintf("Pipe %c stat: %08x\n", |
|
- | 898 | pipe_name(pipe), |
|
- | 899 | I915_READ(PIPESTAT(pipe))); |
|
- | 900 | } else { |
|
- | 901 | dbgprintf("North Display Interrupt enable: %08x\n", |
|
- | 902 | I915_READ(DEIER)); |
|
- | 903 | dbgprintf("North Display Interrupt identity: %08x\n", |
|
- | 904 | I915_READ(DEIIR)); |
|
- | 905 | dbgprintf("North Display Interrupt mask: %08x\n", |
|
- | 906 | I915_READ(DEIMR)); |
|
- | 907 | dbgprintf("South Display Interrupt enable: %08x\n", |
|
- | 908 | I915_READ(SDEIER)); |
|
- | 909 | dbgprintf("South Display Interrupt identity: %08x\n", |
|
- | 910 | I915_READ(SDEIIR)); |
|
- | 911 | dbgprintf("South Display Interrupt mask: %08x\n", |
|
- | 912 | I915_READ(SDEIMR)); |
|
- | 913 | dbgprintf("Graphics Interrupt enable: %08x\n", |
|
- | 914 | I915_READ(GTIER)); |
|
- | 915 | dbgprintf("Graphics Interrupt identity: %08x\n", |
|
- | 916 | I915_READ(GTIIR)); |
|
- | 917 | dbgprintf("Graphics Interrupt mask: %08x\n", |
|
- | 918 | I915_READ(GTIMR)); |
|
- | 919 | } |
|
- | 920 | dbgprintf("Interrupts received: %d\n", |
|
- | 921 | atomic_read(&dev_priv->irq_received)); |
|
- | 922 | for (i = 0; i < I915_NUM_RINGS; i++) { |
|
- | 923 | if (IS_GEN6(dev) || IS_GEN7(dev)) { |
|
- | 924 | printf("Graphics Interrupt mask (%s): %08x\n", |
|
- | 925 | dev_priv->ring[i].name, |
|
- | 926 | I915_READ_IMR(&dev_priv->ring[i])); |
|
- | 927 | } |
|
- | 928 | // i915_ring_seqno_info(m, &dev_priv->ring[i]); |
|
- | 929 | } |
|
- | 930 | ||
- | 931 | return 0; |
|
- | 932 | } |
|
- | 933 | ||
- | 934 | void execute_buffer (struct drm_i915_gem_object *buffer, uint32_t offset, |
|
- | 935 | int size) |
|
- | 936 | { |
|
- | 937 | struct intel_ring_buffer *ring; |
|
- | 938 | drm_i915_private_t *dev_priv = main_device->dev_private; |
|
- | 939 | u32 invalidate; |
|
- | 940 | u32 seqno = 2; |
|
- | 941 | ||
- | 942 | offset += buffer->gtt_offset; |
|
- | 943 | // dbgprintf("execute %x size %d\n", offset, size); |
|
- | 944 | ||
- | 945 | // asm volatile( |
|
- | 946 | // "mfence \n" |
|
- | 947 | // "wbinvd \n" |
|
- | 948 | // "mfence \n" |
|
- | 949 | // :::"memory"); |
|
- | 950 | ||
- | 951 | ring = &dev_priv->ring[RCS]; |
|
- | 952 | ring->dispatch_execbuffer(ring, offset, size); |
|
- | 953 | ||
- | 954 | invalidate = I915_GEM_DOMAIN_COMMAND; |
|
- | 955 | if (INTEL_INFO(main_device)->gen >= 4) |
|
- | 956 | invalidate |= I915_GEM_DOMAIN_SAMPLER; |
|
- | 957 | if (ring->flush(ring, invalidate, 0)) |
|
- | 958 | i915_gem_next_request_seqno(ring); |
|
- | 959 | ||
- | 960 | ring->irq_get(ring); |
|
- | 961 | ||
- | 962 | ring->add_request(ring, &seqno); |
|
- | 963 | ||
- | 964 | // i915_interrupt_info(main_device); |
|
- | 965 | ||
- | 966 | // ironlake_enable_vblank(main_device, 0); |
|
- | 967 | }; |
|
- | 968 | ||
- | 969 | ||
- | 970 | int blit_textured(u32 hbitmap, int dst_x, int dst_y, |
|
- | 971 | int src_x, int src_y, u32 w, u32 h) |
|
- | 972 | { |
|
- | 973 | drm_i915_private_t *dev_priv = main_device->dev_private; |
|
- | 974 | ||
- | 975 | bitmap_t *src_bitmap, *dst_bitmap; |
|
- | 976 | bitmap_t screen; |
|
- | 977 | ||
- | 978 | rect_t winrc; |
|
- | 979 | ||
- | 980 | // dbgprintf(" handle: %d dx %d dy %d sx %d sy %d w %d h %d\n", |
|
- | 981 | // hbitmap, dst_x, dst_y, src_x, src_y, w, h); |
|
- | 982 | ||
- | 983 | if(unlikely(hbitmap==0)) |
|
- | 984 | return -1; |
|
- | 985 | ||
- | 986 | src_bitmap = (bitmap_t*)hman_get_data(&bm_man, hbitmap); |
|
- | 987 | // dbgprintf("bitmap %x\n", src_bitmap); |
|
- | 988 | ||
- | 989 | if(unlikely(src_bitmap==NULL)) |
|
- | 990 | return -1; |
|
- | 991 | ||
- | 992 | GetWindowRect(&winrc); |
|
- | 993 | ||
- | 994 | screen.pitch = os_display->pitch; |
|
- | 995 | screen.gaddr = 0; |
|
- | 996 | screen.width = os_display->width; |
|
- | 997 | screen.height = os_display->height; |
|
- | 998 | screen.obj = (void*)-1; |
|
- | 999 | ||
- | 1000 | dst_bitmap = &screen; |
|
- | 1001 | ||
- | 1002 | dst_x+= winrc.left; |
|
- | 1003 | dst_y+= winrc.top; |
|
- | 1004 | ||
- | 1005 | i915_gem_object_set_to_gtt_domain(src_bitmap->obj, false); |
|
- | 1006 | ||
- | 1007 | sna_blit_copy(dst_bitmap, dst_x, dst_y, w, h, src_bitmap, src_x, src_y); |
|
- | 1008 | ||
- | 1009 | src_bitmap->obj->base.read_domains = I915_GEM_DOMAIN_CPU; |
|
- | 1010 | src_bitmap->obj->base.write_domain = I915_GEM_DOMAIN_CPU; |
|
- | 1011 | ||
- | 1012 | };>><>><>><>><>><>><>24; |
|
- | 1013 | ||
- | 1014 | ><24; |
|
835 | ><24; |
1015 | |
836 | 1016 | >22)|8) |
|
837 | >22)|8) |
1017 | #define><22)|8) |
838 | #define><22)|8) |
1018 | #define>29)|(0x73<<22)|8) |
839 | #define>29)|(0x73<<22)|8) |
1019 | #define><29)|(0x73<<22)|8) |
840 | #define><29)|(0x73<<22)|8) |
1020 | #define>22)|6) |
841 | #define>22)|6) |
1021 | |
842 | 1022 | ||
843 | 1023 | typedef><22)|6) |
|
844 | typedef><22)|6) |
1024 | |
845 | 1025 | ||
846 | 1026 | typedef>29)|(0x53<<22)|6) |
|
847 | typedef>29)|(0x53<<22)|6) |
1027 | |
848 | 1028 | ||
849 | 1029 | typedef><29)|(0x53<<22)|6) |
|
850 | typedef><29)|(0x53<<22)|6) |
1030 | |
851 | 1031 | ||
852 | 1032 | typedef>><>><>>>><>><>>>><>>>>>>20) |
|
853 | typedef>><>><>>>><>><>>>><>>>>>>20) |
1033 | |
854 | 1034 | #if><20) |
|
855 | #if><20) |
1035 | |
856 | 1036 | #if>21) |
|
857 | #if>21) |
1037 | #define><21) |
858 | #define><21) |
1038 | #define>22)|(0x4)) |
859 | #define>22)|(0x4)) |
1039 | #define><22)|(0x4)) |
860 | #define><22)|(0x4)) |
1040 | #define>29)|(0x50<<22)|(0x4)) |
861 | #define>29)|(0x50<<22)|(0x4)) |
1041 | #define><29)|(0x50<<22)|(0x4)) |
862 | #define><29)|(0x50<<22)|(0x4)) |
1042 | #define>=><=> |
863 | #define>=><=> |
- |