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Rev 6937 Rev 7144
Line 181... Line 181...
181
			  crtc->debug.scanline_start, scanline_end);
181
			  crtc->debug.scanline_start, scanline_end);
182
	}
182
	}
183
}
183
}
Line 184... Line 184...
184
 
184
 
185
static void
185
static void
186
skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc,
-
 
187
		 struct drm_framebuffer *fb,
-
 
188
		 int crtc_x, int crtc_y,
186
skl_update_plane(struct drm_plane *drm_plane,
189
		 unsigned int crtc_w, unsigned int crtc_h,
-
 
190
		 uint32_t x, uint32_t y,
187
		 const struct intel_crtc_state *crtc_state,
191
		 uint32_t src_w, uint32_t src_h)
188
		 const struct intel_plane_state *plane_state)
192
{
189
{
193
	struct drm_device *dev = drm_plane->dev;
190
	struct drm_device *dev = drm_plane->dev;
194
	struct drm_i915_private *dev_priv = dev->dev_private;
191
	struct drm_i915_private *dev_priv = dev->dev_private;
-
 
192
	struct intel_plane *intel_plane = to_intel_plane(drm_plane);
195
	struct intel_plane *intel_plane = to_intel_plane(drm_plane);
193
	struct drm_framebuffer *fb = plane_state->base.fb;
196
	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
194
	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
197
	const int pipe = intel_plane->pipe;
195
	const int pipe = intel_plane->pipe;
198
	const int plane = intel_plane->plane + 1;
196
	const int plane = intel_plane->plane + 1;
199
	u32 plane_ctl, stride_div, stride;
197
	u32 plane_ctl, stride_div, stride;
200
	const struct drm_intel_sprite_colorkey *key =
-
 
201
		&to_intel_plane_state(drm_plane->state)->ckey;
198
	const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
202
	u32 surf_addr;
199
	u32 surf_addr;
203
	u32 tile_height, plane_offset, plane_size;
200
	u32 tile_height, plane_offset, plane_size;
204
	unsigned int rotation;
201
	unsigned int rotation;
-
 
202
	int x_offset, y_offset;
-
 
203
	int crtc_x = plane_state->dst.x1;
-
 
204
	int crtc_y = plane_state->dst.y1;
205
	int x_offset, y_offset;
205
	uint32_t crtc_w = drm_rect_width(&plane_state->dst);
-
 
206
	uint32_t crtc_h = drm_rect_height(&plane_state->dst);
-
 
207
	uint32_t x = plane_state->src.x1 >> 16;
-
 
208
	uint32_t y = plane_state->src.y1 >> 16;
-
 
209
	uint32_t src_w = drm_rect_width(&plane_state->src) >> 16;
206
	struct intel_crtc_state *crtc_state = to_intel_crtc(crtc)->config;
210
	uint32_t src_h = drm_rect_height(&plane_state->src) >> 16;
-
 
211
	const struct intel_scaler *scaler =
Line 207... Line 212...
207
	int scaler_id;
212
		&crtc_state->scaler_state.scalers[plane_state->scaler_id];
208
 
213
 
209
	plane_ctl = PLANE_CTL_ENABLE |
214
	plane_ctl = PLANE_CTL_ENABLE |
Line 210... Line 215...
210
		PLANE_CTL_PIPE_GAMMA_ENABLE |
215
		PLANE_CTL_PIPE_GAMMA_ENABLE |
211
		PLANE_CTL_PIPE_CSC_ENABLE;
216
		PLANE_CTL_PIPE_CSC_ENABLE;
Line 212... Line 217...
212
 
217
 
213
	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
218
	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
Line 214... Line 219...
214
	plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
219
	plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
215
 
220
 
Line 216... Line -...
216
	rotation = drm_plane->state->rotation;
-
 
217
	plane_ctl |= skl_plane_ctl_rotation(rotation);
-
 
218
 
221
	rotation = plane_state->base.rotation;
219
	stride_div = intel_fb_stride_alignment(dev, fb->modifier[0],
222
	plane_ctl |= skl_plane_ctl_rotation(rotation);
220
					       fb->pixel_format);
223
 
221
 
224
	stride_div = intel_fb_stride_alignment(dev_priv, fb->modifier[0],
222
	scaler_id = to_intel_plane_state(drm_plane->state)->scaler_id;
225
					       fb->pixel_format);
Line 239... Line 242...
239
		plane_ctl |= PLANE_CTL_KEY_ENABLE_SOURCE;
242
		plane_ctl |= PLANE_CTL_KEY_ENABLE_SOURCE;
Line 240... Line 243...
240
 
243
 
Line 241... Line 244...
241
	surf_addr = intel_plane_obj_offset(intel_plane, obj, 0);
244
	surf_addr = intel_plane_obj_offset(intel_plane, obj, 0);
-
 
245
 
-
 
246
	if (intel_rotation_90_or_270(rotation)) {
242
 
247
		int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
243
	if (intel_rotation_90_or_270(rotation)) {
248
 
244
		/* stride: Surface height in tiles */
-
 
245
		tile_height = intel_tile_height(dev, fb->pixel_format,
249
		/* stride: Surface height in tiles */
246
						fb->modifier[0], 0);
250
		tile_height = intel_tile_height(dev_priv, fb->modifier[0], cpp);
247
		stride = DIV_ROUND_UP(fb->height, tile_height);
251
		stride = DIV_ROUND_UP(fb->height, tile_height);
248
		plane_size = (src_w << 16) | src_h;
252
		plane_size = (src_w << 16) | src_h;
249
		x_offset = stride * tile_height - y - (src_h + 1);
253
		x_offset = stride * tile_height - y - (src_h + 1);
Line 259... Line 263...
259
	I915_WRITE(PLANE_OFFSET(pipe, plane), plane_offset);
263
	I915_WRITE(PLANE_OFFSET(pipe, plane), plane_offset);
260
	I915_WRITE(PLANE_STRIDE(pipe, plane), stride);
264
	I915_WRITE(PLANE_STRIDE(pipe, plane), stride);
261
	I915_WRITE(PLANE_SIZE(pipe, plane), plane_size);
265
	I915_WRITE(PLANE_SIZE(pipe, plane), plane_size);
Line 262... Line 266...
262
 
266
 
263
	/* program plane scaler */
267
	/* program plane scaler */
264
	if (scaler_id >= 0) {
268
	if (plane_state->scaler_id >= 0) {
-
 
269
		uint32_t ps_ctrl = 0;
Line 265... Line 270...
265
		uint32_t ps_ctrl = 0;
270
		int scaler_id = plane_state->scaler_id;
266
 
271
 
267
		DRM_DEBUG_KMS("plane = %d PS_PLANE_SEL(plane) = 0x%x\n", plane,
272
		DRM_DEBUG_KMS("plane = %d PS_PLANE_SEL(plane) = 0x%x\n", plane,
268
			PS_PLANE_SEL(plane));
-
 
269
		ps_ctrl = PS_SCALER_EN | PS_PLANE_SEL(plane) |
273
			PS_PLANE_SEL(plane));
270
			crtc_state->scaler_state.scalers[scaler_id].mode;
274
		ps_ctrl = PS_SCALER_EN | PS_PLANE_SEL(plane) | scaler->mode;
271
		I915_WRITE(SKL_PS_CTRL(pipe, scaler_id), ps_ctrl);
275
		I915_WRITE(SKL_PS_CTRL(pipe, scaler_id), ps_ctrl);
272
		I915_WRITE(SKL_PS_PWR_GATE(pipe, scaler_id), 0);
276
		I915_WRITE(SKL_PS_PWR_GATE(pipe, scaler_id), 0);
273
		I915_WRITE(SKL_PS_WIN_POS(pipe, scaler_id), (crtc_x << 16) | crtc_y);
277
		I915_WRITE(SKL_PS_WIN_POS(pipe, scaler_id), (crtc_x << 16) | crtc_y);
Line 337... Line 341...
337
	I915_WRITE(SPCSCCBOCLAMP(plane), SPCSC_OMAX(1023) | SPCSC_OMIN(0));
341
	I915_WRITE(SPCSCCBOCLAMP(plane), SPCSC_OMAX(1023) | SPCSC_OMIN(0));
338
	I915_WRITE(SPCSCCROCLAMP(plane), SPCSC_OMAX(1023) | SPCSC_OMIN(0));
342
	I915_WRITE(SPCSCCROCLAMP(plane), SPCSC_OMAX(1023) | SPCSC_OMIN(0));
339
}
343
}
Line 340... Line 344...
340
 
344
 
341
static void
345
static void
342
vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
-
 
343
		 struct drm_framebuffer *fb,
-
 
344
		 int crtc_x, int crtc_y,
346
vlv_update_plane(struct drm_plane *dplane,
345
		 unsigned int crtc_w, unsigned int crtc_h,
-
 
346
		 uint32_t x, uint32_t y,
347
		 const struct intel_crtc_state *crtc_state,
347
		 uint32_t src_w, uint32_t src_h)
348
		 const struct intel_plane_state *plane_state)
348
{
349
{
349
	struct drm_device *dev = dplane->dev;
350
	struct drm_device *dev = dplane->dev;
350
	struct drm_i915_private *dev_priv = dev->dev_private;
351
	struct drm_i915_private *dev_priv = dev->dev_private;
-
 
352
	struct intel_plane *intel_plane = to_intel_plane(dplane);
351
	struct intel_plane *intel_plane = to_intel_plane(dplane);
353
	struct drm_framebuffer *fb = plane_state->base.fb;
352
	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
354
	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
353
	int pipe = intel_plane->pipe;
355
	int pipe = intel_plane->pipe;
354
	int plane = intel_plane->plane;
356
	int plane = intel_plane->plane;
355
	u32 sprctl;
357
	u32 sprctl;
356
	unsigned long sprsurf_offset, linear_offset;
358
	u32 sprsurf_offset, linear_offset;
357
	int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
359
	int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
-
 
360
	const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
-
 
361
	int crtc_x = plane_state->dst.x1;
-
 
362
	int crtc_y = plane_state->dst.y1;
-
 
363
	uint32_t crtc_w = drm_rect_width(&plane_state->dst);
-
 
364
	uint32_t crtc_h = drm_rect_height(&plane_state->dst);
358
	const struct drm_intel_sprite_colorkey *key =
365
	uint32_t x = plane_state->src.x1 >> 16;
-
 
366
	uint32_t y = plane_state->src.y1 >> 16;
-
 
367
	uint32_t src_w = drm_rect_width(&plane_state->src) >> 16;
Line 359... Line 368...
359
		&to_intel_plane_state(dplane->state)->ckey;
368
	uint32_t src_h = drm_rect_height(&plane_state->src) >> 16;
Line 360... Line 369...
360
 
369
 
361
	sprctl = SP_ENABLE;
370
	sprctl = SP_ENABLE;
Line 416... Line 425...
416
	src_w--;
425
	src_w--;
417
	src_h--;
426
	src_h--;
418
	crtc_w--;
427
	crtc_w--;
419
	crtc_h--;
428
	crtc_h--;
Line 420... Line 429...
420
 
429
 
421
	linear_offset = y * fb->pitches[0] + x * pixel_size;
430
	linear_offset = y * fb->pitches[0] + x * cpp;
422
	sprsurf_offset = intel_gen4_compute_page_offset(dev_priv,
-
 
423
							&x, &y,
431
	sprsurf_offset = intel_compute_tile_offset(dev_priv, &x, &y,
424
							obj->tiling_mode,
-
 
425
							pixel_size,
432
						   fb->modifier[0], cpp,
426
							fb->pitches[0]);
433
						   fb->pitches[0]);
Line 427... Line 434...
427
	linear_offset -= sprsurf_offset;
434
	linear_offset -= sprsurf_offset;
428
 
435
 
Line 429... Line 436...
429
	if (dplane->state->rotation == BIT(DRM_ROTATE_180)) {
436
	if (plane_state->base.rotation == BIT(DRM_ROTATE_180)) {
430
		sprctl |= SP_ROTATE_180;
437
		sprctl |= SP_ROTATE_180;
431
 
438
 
432
		x += src_w;
439
		x += src_w;
Line 433... Line 440...
433
		y += src_h;
440
		y += src_h;
434
		linear_offset += src_h * fb->pitches[0] + src_w * pixel_size;
441
		linear_offset += src_h * fb->pitches[0] + src_w * cpp;
435
	}
442
	}
Line 477... Line 484...
477
	I915_WRITE(SPSURF(pipe, plane), 0);
484
	I915_WRITE(SPSURF(pipe, plane), 0);
478
	POSTING_READ(SPSURF(pipe, plane));
485
	POSTING_READ(SPSURF(pipe, plane));
479
}
486
}
Line 480... Line 487...
480
 
487
 
481
static void
488
static void
482
ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
-
 
483
		 struct drm_framebuffer *fb,
-
 
484
		 int crtc_x, int crtc_y,
489
ivb_update_plane(struct drm_plane *plane,
485
		 unsigned int crtc_w, unsigned int crtc_h,
-
 
486
		 uint32_t x, uint32_t y,
490
		 const struct intel_crtc_state *crtc_state,
487
		 uint32_t src_w, uint32_t src_h)
491
		 const struct intel_plane_state *plane_state)
488
{
492
{
489
	struct drm_device *dev = plane->dev;
493
	struct drm_device *dev = plane->dev;
490
	struct drm_i915_private *dev_priv = dev->dev_private;
494
	struct drm_i915_private *dev_priv = dev->dev_private;
-
 
495
	struct intel_plane *intel_plane = to_intel_plane(plane);
491
	struct intel_plane *intel_plane = to_intel_plane(plane);
496
	struct drm_framebuffer *fb = plane_state->base.fb;
492
	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
497
	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
493
	enum pipe pipe = intel_plane->pipe;
498
	enum pipe pipe = intel_plane->pipe;
494
	u32 sprctl, sprscale = 0;
499
	u32 sprctl, sprscale = 0;
495
	unsigned long sprsurf_offset, linear_offset;
500
	u32 sprsurf_offset, linear_offset;
496
	int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
501
	int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
-
 
502
	const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
-
 
503
	int crtc_x = plane_state->dst.x1;
-
 
504
	int crtc_y = plane_state->dst.y1;
-
 
505
	uint32_t crtc_w = drm_rect_width(&plane_state->dst);
497
	const struct drm_intel_sprite_colorkey *key =
506
	uint32_t crtc_h = drm_rect_height(&plane_state->dst);
-
 
507
	uint32_t x = plane_state->src.x1 >> 16;
-
 
508
	uint32_t y = plane_state->src.y1 >> 16;
-
 
509
	uint32_t src_w = drm_rect_width(&plane_state->src) >> 16;
Line 498... Line 510...
498
		&to_intel_plane_state(plane->state)->ckey;
510
	uint32_t src_h = drm_rect_height(&plane_state->src) >> 16;
Line 499... Line 511...
499
 
511
 
500
	sprctl = SPRITE_ENABLE;
512
	sprctl = SPRITE_ENABLE;
Line 546... Line 558...
546
	crtc_h--;
558
	crtc_h--;
Line 547... Line 559...
547
 
559
 
548
	if (crtc_w != src_w || crtc_h != src_h)
560
	if (crtc_w != src_w || crtc_h != src_h)
Line 549... Line 561...
549
		sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h;
561
		sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h;
550
 
-
 
551
	linear_offset = y * fb->pitches[0] + x * pixel_size;
562
 
552
	sprsurf_offset =
563
	linear_offset = y * fb->pitches[0] + x * cpp;
553
		intel_gen4_compute_page_offset(dev_priv,
564
	sprsurf_offset = intel_compute_tile_offset(dev_priv, &x, &y,
554
					       &x, &y, obj->tiling_mode,
565
						   fb->modifier[0], cpp,
Line 555... Line 566...
555
					       pixel_size, fb->pitches[0]);
566
						   fb->pitches[0]);
556
	linear_offset -= sprsurf_offset;
567
	linear_offset -= sprsurf_offset;
Line 557... Line 568...
557
 
568
 
558
	if (plane->state->rotation == BIT(DRM_ROTATE_180)) {
569
	if (plane_state->base.rotation == BIT(DRM_ROTATE_180)) {
559
		sprctl |= SPRITE_ROTATE_180;
570
		sprctl |= SPRITE_ROTATE_180;
560
 
571
 
561
		/* HSW and BDW does this automagically in hardware */
572
		/* HSW and BDW does this automagically in hardware */
562
		if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) {
-
 
563
			x += src_w;
573
		if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) {
564
			y += src_h;
574
			x += src_w;
Line 565... Line 575...
565
			linear_offset += src_h * fb->pitches[0] +
575
			y += src_h;
566
				src_w * pixel_size;
576
			linear_offset += src_h * fb->pitches[0] + src_w * cpp;
Line 615... Line 625...
615
	I915_WRITE(SPRSURF(pipe), 0);
625
	I915_WRITE(SPRSURF(pipe), 0);
616
	POSTING_READ(SPRSURF(pipe));
626
	POSTING_READ(SPRSURF(pipe));
617
}
627
}
Line 618... Line 628...
618
 
628
 
619
static void
629
static void
620
ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
-
 
621
		 struct drm_framebuffer *fb,
-
 
622
		 int crtc_x, int crtc_y,
630
ilk_update_plane(struct drm_plane *plane,
623
		 unsigned int crtc_w, unsigned int crtc_h,
-
 
624
		 uint32_t x, uint32_t y,
631
		 const struct intel_crtc_state *crtc_state,
625
		 uint32_t src_w, uint32_t src_h)
632
		 const struct intel_plane_state *plane_state)
626
{
633
{
627
	struct drm_device *dev = plane->dev;
634
	struct drm_device *dev = plane->dev;
628
	struct drm_i915_private *dev_priv = dev->dev_private;
635
	struct drm_i915_private *dev_priv = dev->dev_private;
-
 
636
	struct intel_plane *intel_plane = to_intel_plane(plane);
629
	struct intel_plane *intel_plane = to_intel_plane(plane);
637
	struct drm_framebuffer *fb = plane_state->base.fb;
630
	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
638
	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
631
	int pipe = intel_plane->pipe;
-
 
632
	unsigned long dvssurf_offset, linear_offset;
639
	int pipe = intel_plane->pipe;
-
 
640
	u32 dvscntr, dvsscale;
633
	u32 dvscntr, dvsscale;
641
	u32 dvssurf_offset, linear_offset;
634
	int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
642
	int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
-
 
643
	const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
-
 
644
	int crtc_x = plane_state->dst.x1;
-
 
645
	int crtc_y = plane_state->dst.y1;
-
 
646
	uint32_t crtc_w = drm_rect_width(&plane_state->dst);
635
	const struct drm_intel_sprite_colorkey *key =
647
	uint32_t crtc_h = drm_rect_height(&plane_state->dst);
-
 
648
	uint32_t x = plane_state->src.x1 >> 16;
-
 
649
	uint32_t y = plane_state->src.y1 >> 16;
-
 
650
	uint32_t src_w = drm_rect_width(&plane_state->src) >> 16;
Line 636... Line 651...
636
		&to_intel_plane_state(plane->state)->ckey;
651
	uint32_t src_h = drm_rect_height(&plane_state->src) >> 16;
Line 637... Line 652...
637
 
652
 
638
	dvscntr = DVS_ENABLE;
653
	dvscntr = DVS_ENABLE;
Line 680... Line 695...
680
 
695
 
681
	dvsscale = 0;
696
	dvsscale = 0;
682
	if (crtc_w != src_w || crtc_h != src_h)
697
	if (crtc_w != src_w || crtc_h != src_h)
Line 683... Line 698...
683
		dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h;
698
		dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h;
684
 
-
 
685
	linear_offset = y * fb->pitches[0] + x * pixel_size;
699
 
686
	dvssurf_offset =
700
	linear_offset = y * fb->pitches[0] + x * cpp;
687
		intel_gen4_compute_page_offset(dev_priv,
701
	dvssurf_offset = intel_compute_tile_offset(dev_priv, &x, &y,
688
					       &x, &y, obj->tiling_mode,
702
						   fb->modifier[0], cpp,
Line 689... Line 703...
689
					       pixel_size, fb->pitches[0]);
703
						   fb->pitches[0]);
690
	linear_offset -= dvssurf_offset;
704
	linear_offset -= dvssurf_offset;
Line 691... Line 705...
691
 
705
 
692
	if (plane->state->rotation == BIT(DRM_ROTATE_180)) {
706
	if (plane_state->base.rotation == BIT(DRM_ROTATE_180)) {
693
		dvscntr |= DVS_ROTATE_180;
707
		dvscntr |= DVS_ROTATE_180;
694
 
708
 
Line 695... Line 709...
695
		x += src_w;
709
		x += src_w;
696
		y += src_h;
710
		y += src_h;
697
		linear_offset += src_h * fb->pitches[0] + src_w * pixel_size;
711
		linear_offset += src_h * fb->pitches[0] + src_w * cpp;
Line 757... Line 771...
757
	struct drm_rect *dst = &state->dst;
771
	struct drm_rect *dst = &state->dst;
758
	const struct drm_rect *clip = &state->clip;
772
	const struct drm_rect *clip = &state->clip;
759
	int hscale, vscale;
773
	int hscale, vscale;
760
	int max_scale, min_scale;
774
	int max_scale, min_scale;
761
	bool can_scale;
775
	bool can_scale;
762
	int pixel_size;
-
 
Line 763... Line 776...
763
 
776
 
764
	if (!fb) {
777
	if (!fb) {
765
		state->visible = false;
778
		state->visible = false;
766
		return 0;
779
		return 0;
Line 879... Line 892...
879
	}
892
	}
Line 880... Line 893...
880
 
893
 
881
	/* Check size restrictions when scaling */
894
	/* Check size restrictions when scaling */
882
	if (state->visible && (src_w != crtc_w || src_h != crtc_h)) {
895
	if (state->visible && (src_w != crtc_w || src_h != crtc_h)) {
-
 
896
		unsigned int width_bytes;
Line 883... Line 897...
883
		unsigned int width_bytes;
897
		int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
Line 884... Line 898...
884
 
898
 
Line 890... Line 904...
890
			state->visible = false;
904
			state->visible = false;
Line 891... Line 905...
891
 
905
 
892
		if (src_w < 3 || src_h < 3)
906
		if (src_w < 3 || src_h < 3)
Line 893... Line -...
893
			state->visible = false;
-
 
894
 
907
			state->visible = false;
895
		pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
-
 
Line 896... Line 908...
896
		width_bytes = ((src_x * pixel_size) & 63) +
908
 
897
					src_w * pixel_size;
909
		width_bytes = ((src_x * cpp) & 63) + src_w * cpp;
898
 
910
 
899
		if (INTEL_INFO(dev)->gen < 9 && (src_w > 2048 || src_h > 2048 ||
911
		if (INTEL_INFO(dev)->gen < 9 && (src_w > 2048 || src_h > 2048 ||
Line 916... Line 928...
916
	dst->y2 = crtc_y + crtc_h;
928
	dst->y2 = crtc_y + crtc_h;
Line 917... Line 929...
917
 
929
 
918
	return 0;
930
	return 0;
Line 919... Line -...
919
}
-
 
920
 
-
 
921
static void
-
 
922
intel_commit_sprite_plane(struct drm_plane *plane,
-
 
923
			  struct intel_plane_state *state)
-
 
924
{
-
 
925
	struct drm_crtc *crtc = state->base.crtc;
-
 
926
	struct intel_plane *intel_plane = to_intel_plane(plane);
-
 
927
	struct drm_framebuffer *fb = state->base.fb;
-
 
928
 
-
 
929
	crtc = crtc ? crtc : plane->crtc;
-
 
930
 
-
 
931
	if (state->visible) {
-
 
932
		intel_plane->update_plane(plane, crtc, fb,
-
 
933
					  state->dst.x1, state->dst.y1,
-
 
934
					  drm_rect_width(&state->dst),
-
 
935
					  drm_rect_height(&state->dst),
-
 
936
					  state->src.x1 >> 16,
-
 
937
					  state->src.y1 >> 16,
-
 
938
					  drm_rect_width(&state->src) >> 16,
-
 
939
					  drm_rect_height(&state->src) >> 16);
-
 
940
	} else {
-
 
941
		intel_plane->disable_plane(plane, crtc);
-
 
942
	}
-
 
943
}
931
}
944
 
932
 
945
int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
933
int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
946
			      struct drm_file *file_priv)
934
			      struct drm_file *file_priv)
947
{
935
{
Line 1121... Line 1109...
1121
 
1109
 
1122
	intel_plane->pipe = pipe;
1110
	intel_plane->pipe = pipe;
1123
	intel_plane->plane = plane;
1111
	intel_plane->plane = plane;
1124
	intel_plane->frontbuffer_bit = INTEL_FRONTBUFFER_SPRITE(pipe, plane);
1112
	intel_plane->frontbuffer_bit = INTEL_FRONTBUFFER_SPRITE(pipe, plane);
1125
	intel_plane->check_plane = intel_check_sprite_plane;
-
 
1126
	intel_plane->commit_plane = intel_commit_sprite_plane;
1113
	intel_plane->check_plane = intel_check_sprite_plane;
1127
	possible_crtcs = (1 << pipe);
1114
	possible_crtcs = (1 << pipe);
1128
	ret = drm_universal_plane_init(dev, &intel_plane->base, possible_crtcs,
1115
	ret = drm_universal_plane_init(dev, &intel_plane->base, possible_crtcs,
1129
				       &intel_plane_funcs,
1116
				       &intel_plane_funcs,
1130
				       plane_formats, num_plane_formats,
1117
				       plane_formats, num_plane_formats,