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 * avoid random delays. The value written to @start_vbl_count should be
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 * avoid random delays. The value written to @start_vbl_count should be
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 * supplied to intel_pipe_update_end() for error checking.
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 * supplied to intel_pipe_update_end() for error checking.
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 */
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 */
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void intel_pipe_update_start(struct intel_crtc *crtc)
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void intel_pipe_update_start(struct intel_crtc *crtc)
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{
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{
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ENTER();
 - 
 
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	struct drm_device *dev = crtc->base.dev;
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	struct drm_device *dev = crtc->base.dev;
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	const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
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	const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
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	enum pipe pipe = crtc->pipe;
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	enum pipe pipe = crtc->pipe;
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	long timeout = msecs_to_jiffies_timeout(1);
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	long timeout = msecs_to_jiffies_timeout(1);
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	int scanline, min, max, vblank_start;
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	int scanline, min, max, vblank_start;