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Rev 3031 Rev 4560
Line 57... Line 57...
57
	unsigned int up_scaling:1;
57
	unsigned int up_scaling:1;
58
	unsigned int down_scaling:1;
58
	unsigned int down_scaling:1;
59
	unsigned int stall_support:1;
59
	unsigned int stall_support:1;
60
	unsigned int pad:1;
60
	unsigned int pad:1;
61
	u16 output_flags;
61
	u16 output_flags;
62
} __attribute__((packed));
62
} __packed;
Line 63... Line 63...
63
 
63
 
64
/* Note: SDVO detailed timing flags match EDID misc flags. */
64
/* Note: SDVO detailed timing flags match EDID misc flags. */
65
#define DTD_FLAG_HSYNC_POSITIVE (1 << 1)
65
#define DTD_FLAG_HSYNC_POSITIVE (1 << 1)
66
#define DTD_FLAG_VSYNC_POSITIVE (1 << 2)
66
#define DTD_FLAG_VSYNC_POSITIVE (1 << 2)
Line 92... Line 92...
92
		u8 sdvo_flags;
92
		u8 sdvo_flags;
93
		/** bits 6-7 of vsync offset at bits 6-7 */
93
		/** bits 6-7 of vsync offset at bits 6-7 */
94
		u8 v_sync_off_high;
94
		u8 v_sync_off_high;
95
		u8 reserved;
95
		u8 reserved;
96
	} part2;
96
	} part2;
97
} __attribute__((packed));
97
} __packed;
Line 98... Line 98...
98
 
98
 
99
struct intel_sdvo_pixel_clock_range {
99
struct intel_sdvo_pixel_clock_range {
100
	u16 min;	/**< pixel clock, in 10kHz units */
100
	u16 min;	/**< pixel clock, in 10kHz units */
101
	u16 max;	/**< pixel clock, in 10kHz units */
101
	u16 max;	/**< pixel clock, in 10kHz units */
Line 102... Line 102...
102
} __attribute__((packed));
102
} __packed;
103
 
103
 
104
struct intel_sdvo_preferred_input_timing_args {
104
struct intel_sdvo_preferred_input_timing_args {
105
	u16 clock;
105
	u16 clock;
106
	u16 width;
106
	u16 width;
107
	u16 height;
107
	u16 height;
108
	u8	interlace:1;
108
	u8	interlace:1;
109
	u8	scaled:1;
109
	u8	scaled:1;
Line 110... Line 110...
110
	u8	pad:6;
110
	u8	pad:6;
111
} __attribute__((packed));
111
} __packed;
112
 
112
 
113
/* I2C registers for SDVO */
113
/* I2C registers for SDVO */
Line 160... Line 160...
160
#define SDVO_CMD_GET_TRAINED_INPUTS			0x03
160
#define SDVO_CMD_GET_TRAINED_INPUTS			0x03
161
struct intel_sdvo_get_trained_inputs_response {
161
struct intel_sdvo_get_trained_inputs_response {
162
	unsigned int input0_trained:1;
162
	unsigned int input0_trained:1;
163
	unsigned int input1_trained:1;
163
	unsigned int input1_trained:1;
164
	unsigned int pad:6;
164
	unsigned int pad:6;
165
} __attribute__((packed));
165
} __packed;
Line 166... Line 166...
166
 
166
 
167
/** Returns a struct intel_sdvo_output_flags of active outputs. */
167
/** Returns a struct intel_sdvo_output_flags of active outputs. */
Line 168... Line 168...
168
#define SDVO_CMD_GET_ACTIVE_OUTPUTS			0x04
168
#define SDVO_CMD_GET_ACTIVE_OUTPUTS			0x04
Line 217... Line 217...
217
struct intel_sdvo_get_interrupt_event_source_response {
217
struct intel_sdvo_get_interrupt_event_source_response {
218
	u16 interrupt_status;
218
	u16 interrupt_status;
219
	unsigned int ambient_light_interrupt:1;
219
	unsigned int ambient_light_interrupt:1;
220
	unsigned int hdmi_audio_encrypt_change:1;
220
	unsigned int hdmi_audio_encrypt_change:1;
221
	unsigned int pad:6;
221
	unsigned int pad:6;
222
} __attribute__((packed));
222
} __packed;
Line 223... Line 223...
223
 
223
 
224
/**
224
/**
225
 * Selects which input is affected by future input commands.
225
 * Selects which input is affected by future input commands.
226
 *
226
 *
Line 230... Line 230...
230
 */
230
 */
231
#define SDVO_CMD_SET_TARGET_INPUT			0x10
231
#define SDVO_CMD_SET_TARGET_INPUT			0x10
232
struct intel_sdvo_set_target_input_args {
232
struct intel_sdvo_set_target_input_args {
233
	unsigned int target_1:1;
233
	unsigned int target_1:1;
234
	unsigned int pad:7;
234
	unsigned int pad:7;
235
} __attribute__((packed));
235
} __packed;
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236
 
236
 
237
/**
237
/**
238
 * Takes a struct intel_sdvo_output_flags of which outputs are targeted by
238
 * Takes a struct intel_sdvo_output_flags of which outputs are targeted by
239
 * future output commands.
239
 * future output commands.
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368
	unsigned int hdtv_std_iturbt601_576i_50:1;
368
	unsigned int hdtv_std_iturbt601_576i_50:1;
369
	unsigned int hdtv_std_iturbt601_576p_50:1;
369
	unsigned int hdtv_std_iturbt601_576p_50:1;
370
	unsigned int hdtv_std_eia_7702a_480i_60:1;
370
	unsigned int hdtv_std_eia_7702a_480i_60:1;
371
	unsigned int hdtv_std_eia_7702a_480p_60:1;
371
	unsigned int hdtv_std_eia_7702a_480p_60:1;
372
	unsigned int pad:3;
372
	unsigned int pad:3;
373
} __attribute__((packed));
373
} __packed;
Line 374... Line 374...
374
 
374
 
Line 375... Line 375...
375
#define SDVO_CMD_GET_TV_FORMAT				0x28
375
#define SDVO_CMD_GET_TV_FORMAT				0x28
Line 399... Line 399...
399
 
399
 
400
	unsigned int secam_k1:1;
400
	unsigned int secam_k1:1;
401
	unsigned int secam_l:1;
401
	unsigned int secam_l:1;
402
	unsigned int secam_60:1;
402
	unsigned int secam_60:1;
403
	unsigned int pad:5;
403
	unsigned int pad:5;
Line 404... Line 404...
404
} __attribute__((packed));
404
} __packed;
405
 
405
 
406
struct intel_sdvo_sdtv_resolution_reply {
406
struct intel_sdvo_sdtv_resolution_reply {
407
	unsigned int res_320x200:1;
407
	unsigned int res_320x200:1;
Line 424... Line 424...
424
 
424
 
425
	unsigned int res_920x766:1;
425
	unsigned int res_920x766:1;
426
	unsigned int res_1024x768:1;
426
	unsigned int res_1024x768:1;
427
	unsigned int res_1280x1024:1;
427
	unsigned int res_1280x1024:1;
428
	unsigned int pad:5;
428
	unsigned int pad:5;
Line 429... Line 429...
429
} __attribute__((packed));
429
} __packed;
430
 
430
 
431
/* Get supported resolution with squire pixel aspect ratio that can be
431
/* Get supported resolution with squire pixel aspect ratio that can be
Line 461... Line 461...
461
	unsigned int hdtv_std_iturbt601_576p_50:1;
461
	unsigned int hdtv_std_iturbt601_576p_50:1;
Line 462... Line 462...
462
 
462
 
463
	unsigned int hdtv_std_eia_7702a_480i_60:1;
463
	unsigned int hdtv_std_eia_7702a_480i_60:1;
464
	unsigned int hdtv_std_eia_7702a_480p_60:1;
464
	unsigned int hdtv_std_eia_7702a_480p_60:1;
465
	unsigned int pad:6;
465
	unsigned int pad:6;
Line 466... Line 466...
466
} __attribute__((packed));
466
} __packed;
467
 
467
 
468
struct intel_sdvo_hdtv_resolution_reply {
468
struct intel_sdvo_hdtv_resolution_reply {
469
	unsigned int res_640x480:1;
469
	unsigned int res_640x480:1;
Line 515... Line 515...
515
	unsigned int res_1280x1024:1;
515
	unsigned int res_1280x1024:1;
516
	unsigned int pad4:7;
516
	unsigned int pad4:7;
Line 517... Line 517...
517
 
517
 
518
	unsigned int res_1280x768:1;
518
	unsigned int res_1280x768:1;
519
	unsigned int pad5:7;
519
	unsigned int pad5:7;
Line 520... Line 520...
520
} __attribute__((packed));
520
} __packed;
521
 
521
 
522
/* Get supported power state returns info for encoder and monitor, rely on
522
/* Get supported power state returns info for encoder and monitor, rely on
523
   last SetTargetInput and SetTargetOutput calls */
523
   last SetTargetInput and SetTargetOutput calls */
Line 555... Line 555...
555
	unsigned int t2_high:2;
555
	unsigned int t2_high:2;
556
	unsigned int t3_high:2;
556
	unsigned int t3_high:2;
Line 557... Line 557...
557
 
557
 
558
	unsigned int t4_high:2;
558
	unsigned int t4_high:2;
559
	unsigned int pad:6;
559
	unsigned int pad:6;
Line 560... Line 560...
560
} __attribute__((packed));
560
} __packed;
561
 
561
 
562
#define SDVO_CMD_GET_MAX_BACKLIGHT_LEVEL		0x30
562
#define SDVO_CMD_GET_MAX_BACKLIGHT_LEVEL		0x30
563
struct sdvo_max_backlight_reply {
563
struct sdvo_max_backlight_reply {
564
	u8 max_value;
564
	u8 max_value;
Line 565... Line 565...
565
	u8 default_value;
565
	u8 default_value;
566
} __attribute__((packed));
566
} __packed;
Line 567... Line 567...
567
 
567
 
568
#define SDVO_CMD_GET_BACKLIGHT_LEVEL			0x31
568
#define SDVO_CMD_GET_BACKLIGHT_LEVEL			0x31
569
#define SDVO_CMD_SET_BACKLIGHT_LEVEL			0x32
569
#define SDVO_CMD_SET_BACKLIGHT_LEVEL			0x32
570
 
570
 
571
#define SDVO_CMD_GET_AMBIENT_LIGHT			0x33
571
#define SDVO_CMD_GET_AMBIENT_LIGHT			0x33
572
struct sdvo_get_ambient_light_reply {
572
struct sdvo_get_ambient_light_reply {
573
	u16 trip_low;
573
	u16 trip_low;
574
	u16 trip_high;
574
	u16 trip_high;
575
	u16 value;
575
	u16 value;
576
} __attribute__((packed));
576
} __packed;
577
#define SDVO_CMD_SET_AMBIENT_LIGHT			0x34
577
#define SDVO_CMD_SET_AMBIENT_LIGHT			0x34
578
struct sdvo_set_ambient_light_reply {
578
struct sdvo_set_ambient_light_reply {
579
	u16 trip_low;
579
	u16 trip_low;
Line 580... Line 580...
580
	u16 trip_high;
580
	u16 trip_high;
581
	unsigned int enable:1;
581
	unsigned int enable:1;
582
	unsigned int pad:7;
582
	unsigned int pad:7;
583
} __attribute__((packed));
583
} __packed;
Line 606... Line 606...
606
	unsigned int sharpness:1;
606
	unsigned int sharpness:1;
607
	unsigned int dot_crawl:1;
607
	unsigned int dot_crawl:1;
608
	unsigned int dither:1;
608
	unsigned int dither:1;
609
	unsigned int tv_chroma_filter:1;
609
	unsigned int tv_chroma_filter:1;
610
	unsigned int tv_luma_filter:1;
610
	unsigned int tv_luma_filter:1;
611
} __attribute__((packed));
611
} __packed;
Line 612... Line 612...
612
 
612
 
613
/* Picture enhancement limits below are dependent on the current TV format,
613
/* Picture enhancement limits below are dependent on the current TV format,
614
 * and thus need to be queried and set after it.
614
 * and thus need to be queried and set after it.
615
 */
615
 */
Line 628... Line 628...
628
#define SDVO_CMD_GET_MAX_TV_CHROMA_FILTER		0x74
628
#define SDVO_CMD_GET_MAX_TV_CHROMA_FILTER		0x74
629
#define SDVO_CMD_GET_MAX_TV_LUMA_FILTER			0x77
629
#define SDVO_CMD_GET_MAX_TV_LUMA_FILTER			0x77
630
struct intel_sdvo_enhancement_limits_reply {
630
struct intel_sdvo_enhancement_limits_reply {
631
	u16 max_value;
631
	u16 max_value;
632
	u16 default_value;
632
	u16 default_value;
633
} __attribute__((packed));
633
} __packed;
Line 634... Line 634...
634
 
634
 
635
#define SDVO_CMD_GET_LVDS_PANEL_INFORMATION		0x7f
635
#define SDVO_CMD_GET_LVDS_PANEL_INFORMATION		0x7f
636
#define SDVO_CMD_SET_LVDS_PANEL_INFORMATION		0x80
636
#define SDVO_CMD_SET_LVDS_PANEL_INFORMATION		0x80
637
# define SDVO_LVDS_COLOR_DEPTH_18			(0 << 0)
637
# define SDVO_LVDS_COLOR_DEPTH_18			(0 << 0)
Line 669... Line 669...
669
#define SDVO_CMD_SET_TV_CHROMA_FILTER			0x76
669
#define SDVO_CMD_SET_TV_CHROMA_FILTER			0x76
670
#define SDVO_CMD_GET_TV_LUMA_FILTER			0x78
670
#define SDVO_CMD_GET_TV_LUMA_FILTER			0x78
671
#define SDVO_CMD_SET_TV_LUMA_FILTER			0x79
671
#define SDVO_CMD_SET_TV_LUMA_FILTER			0x79
672
struct intel_sdvo_enhancements_arg {
672
struct intel_sdvo_enhancements_arg {
673
	u16 value;
673
	u16 value;
674
} __attribute__((packed));
674
} __packed;
Line 675... Line 675...
675
 
675
 
676
#define SDVO_CMD_GET_DOT_CRAWL				0x70
676
#define SDVO_CMD_GET_DOT_CRAWL				0x70
677
#define SDVO_CMD_SET_DOT_CRAWL				0x71
677
#define SDVO_CMD_SET_DOT_CRAWL				0x71
678
# define SDVO_DOT_CRAWL_ON					(1 << 0)
678
# define SDVO_DOT_CRAWL_ON					(1 << 0)
Line 725... Line 725...
725
#define SDVO_NEED_TO_STALL  (1 << 7)
725
#define SDVO_NEED_TO_STALL  (1 << 7)
Line 726... Line 726...
726
 
726
 
727
struct intel_sdvo_encode {
727
struct intel_sdvo_encode {
728
	u8 dvi_rev;
728
	u8 dvi_rev;
729
	u8 hdmi_rev;
729
	u8 hdmi_rev;