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22 | * |
22 | * |
23 | * Authors: |
23 | * Authors: |
24 | * Eric Anholt |
24 | * Eric Anholt |
25 | */ |
25 | */ |
Line 26... | Line 26... | ||
26 | 26 | ||
27 | /** |
27 | /* |
28 | * @file SDVO command definitions and structures. |
28 | * SDVO command definitions and structures. |
Line 29... | Line 29... | ||
29 | */ |
29 | */ |
30 | 30 | ||
31 | #define SDVO_OUTPUT_FIRST (0) |
31 | #define SDVO_OUTPUT_FIRST (0) |
Line 64... | Line 64... | ||
64 | /* Note: SDVO detailed timing flags match EDID misc flags. */ |
64 | /* Note: SDVO detailed timing flags match EDID misc flags. */ |
65 | #define DTD_FLAG_HSYNC_POSITIVE (1 << 1) |
65 | #define DTD_FLAG_HSYNC_POSITIVE (1 << 1) |
66 | #define DTD_FLAG_VSYNC_POSITIVE (1 << 2) |
66 | #define DTD_FLAG_VSYNC_POSITIVE (1 << 2) |
67 | #define DTD_FLAG_INTERLACE (1 << 7) |
67 | #define DTD_FLAG_INTERLACE (1 << 7) |
Line 68... | Line 68... | ||
68 | 68 | ||
69 | /** This matches the EDID DTD structure, more or less */ |
69 | /* This matches the EDID DTD structure, more or less */ |
70 | struct intel_sdvo_dtd { |
70 | struct intel_sdvo_dtd { |
71 | struct { |
71 | struct { |
72 | u16 clock; /**< pixel clock, in 10kHz units */ |
72 | u16 clock; /* pixel clock, in 10kHz units */ |
73 | u8 h_active; /**< lower 8 bits (pixels) */ |
73 | u8 h_active; /* lower 8 bits (pixels) */ |
74 | u8 h_blank; /**< lower 8 bits (pixels) */ |
74 | u8 h_blank; /* lower 8 bits (pixels) */ |
75 | u8 h_high; /**< upper 4 bits each h_active, h_blank */ |
75 | u8 h_high; /* upper 4 bits each h_active, h_blank */ |
76 | u8 v_active; /**< lower 8 bits (lines) */ |
76 | u8 v_active; /* lower 8 bits (lines) */ |
77 | u8 v_blank; /**< lower 8 bits (lines) */ |
77 | u8 v_blank; /* lower 8 bits (lines) */ |
78 | u8 v_high; /**< upper 4 bits each v_active, v_blank */ |
78 | u8 v_high; /* upper 4 bits each v_active, v_blank */ |
Line 79... | Line 79... | ||
79 | } part1; |
79 | } part1; |
80 | 80 | ||
81 | struct { |
81 | struct { |
82 | u8 h_sync_off; /**< lower 8 bits, from hblank start */ |
82 | u8 h_sync_off; /* lower 8 bits, from hblank start */ |
83 | u8 h_sync_width; /**< lower 8 bits (pixels) */ |
83 | u8 h_sync_width; /* lower 8 bits (pixels) */ |
84 | /** lower 4 bits each vsync offset, vsync width */ |
84 | /* lower 4 bits each vsync offset, vsync width */ |
85 | u8 v_sync_off_width; |
85 | u8 v_sync_off_width; |
86 | /** |
86 | /* |
87 | * 2 high bits of hsync offset, 2 high bits of hsync width, |
87 | * 2 high bits of hsync offset, 2 high bits of hsync width, |
88 | * bits 4-5 of vsync offset, and 2 high bits of vsync width. |
88 | * bits 4-5 of vsync offset, and 2 high bits of vsync width. |
89 | */ |
89 | */ |
90 | u8 sync_off_width_high; |
90 | u8 sync_off_width_high; |
91 | u8 dtd_flags; |
91 | u8 dtd_flags; |
92 | u8 sdvo_flags; |
92 | u8 sdvo_flags; |
93 | /** bits 6-7 of vsync offset at bits 6-7 */ |
93 | /* bits 6-7 of vsync offset at bits 6-7 */ |
94 | u8 v_sync_off_high; |
94 | u8 v_sync_off_high; |
95 | u8 reserved; |
95 | u8 reserved; |
Line 96... | Line 96... | ||
96 | } part2; |
96 | } part2; |
97 | } __packed; |
97 | } __packed; |
98 | 98 | ||
99 | struct intel_sdvo_pixel_clock_range { |
99 | struct intel_sdvo_pixel_clock_range { |
Line 100... | Line 100... | ||
100 | u16 min; /**< pixel clock, in 10kHz units */ |
100 | u16 min; /* pixel clock, in 10kHz units */ |
101 | u16 max; /**< pixel clock, in 10kHz units */ |
101 | u16 max; /* pixel clock, in 10kHz units */ |
102 | } __packed; |
102 | } __packed; |
Line 142... | Line 142... | ||
142 | 142 | ||
Line 143... | Line 143... | ||
143 | /* SDVO commands, argument/result registers */ |
143 | /* SDVO commands, argument/result registers */ |
Line 144... | Line 144... | ||
144 | 144 | ||
145 | #define SDVO_CMD_RESET 0x01 |
145 | #define SDVO_CMD_RESET 0x01 |
Line 146... | Line 146... | ||
146 | 146 | ||
147 | /** Returns a struct intel_sdvo_caps */ |
147 | /* Returns a struct intel_sdvo_caps */ |
148 | #define SDVO_CMD_GET_DEVICE_CAPS 0x02 |
148 | #define SDVO_CMD_GET_DEVICE_CAPS 0x02 |
149 | 149 | ||
Line 150... | Line 150... | ||
150 | #define SDVO_CMD_GET_FIRMWARE_REV 0x86 |
150 | #define SDVO_CMD_GET_FIRMWARE_REV 0x86 |
151 | # define SDVO_DEVICE_FIRMWARE_MINOR SDVO_I2C_RETURN_0 |
151 | # define SDVO_DEVICE_FIRMWARE_MINOR SDVO_I2C_RETURN_0 |
152 | # define SDVO_DEVICE_FIRMWARE_MAJOR SDVO_I2C_RETURN_1 |
152 | # define SDVO_DEVICE_FIRMWARE_MAJOR SDVO_I2C_RETURN_1 |
153 | # define SDVO_DEVICE_FIRMWARE_PATCH SDVO_I2C_RETURN_2 |
153 | # define SDVO_DEVICE_FIRMWARE_PATCH SDVO_I2C_RETURN_2 |
154 | 154 | ||
155 | /** |
155 | /* |
Line 162... | Line 162... | ||
162 | unsigned int input0_trained:1; |
162 | unsigned int input0_trained:1; |
163 | unsigned int input1_trained:1; |
163 | unsigned int input1_trained:1; |
164 | unsigned int pad:6; |
164 | unsigned int pad:6; |
165 | } __packed; |
165 | } __packed; |
Line 166... | Line 166... | ||
166 | 166 | ||
167 | /** Returns a struct intel_sdvo_output_flags of active outputs. */ |
167 | /* Returns a struct intel_sdvo_output_flags of active outputs. */ |
Line 168... | Line 168... | ||
168 | #define SDVO_CMD_GET_ACTIVE_OUTPUTS 0x04 |
168 | #define SDVO_CMD_GET_ACTIVE_OUTPUTS 0x04 |
169 | 169 | ||
170 | /** |
170 | /* |
171 | * Sets the current set of active outputs. |
171 | * Sets the current set of active outputs. |
172 | * |
172 | * |
173 | * Takes a struct intel_sdvo_output_flags. Must be preceded by a SET_IN_OUT_MAP |
173 | * Takes a struct intel_sdvo_output_flags. Must be preceded by a SET_IN_OUT_MAP |
174 | * on multi-output devices. |
174 | * on multi-output devices. |
Line 175... | Line 175... | ||
175 | */ |
175 | */ |
176 | #define SDVO_CMD_SET_ACTIVE_OUTPUTS 0x05 |
176 | #define SDVO_CMD_SET_ACTIVE_OUTPUTS 0x05 |
177 | 177 | ||
178 | /** |
178 | /* |
179 | * Returns the current mapping of SDVO inputs to outputs on the device. |
179 | * Returns the current mapping of SDVO inputs to outputs on the device. |
180 | * |
180 | * |
181 | * Returns two struct intel_sdvo_output_flags structures. |
181 | * Returns two struct intel_sdvo_output_flags structures. |
182 | */ |
182 | */ |
183 | #define SDVO_CMD_GET_IN_OUT_MAP 0x06 |
183 | #define SDVO_CMD_GET_IN_OUT_MAP 0x06 |
Line 184... | Line 184... | ||
184 | struct intel_sdvo_in_out_map { |
184 | struct intel_sdvo_in_out_map { |
185 | u16 in0, in1; |
185 | u16 in0, in1; |
186 | }; |
186 | }; |
187 | 187 | ||
188 | /** |
188 | /* |
189 | * Sets the current mapping of SDVO inputs to outputs on the device. |
189 | * Sets the current mapping of SDVO inputs to outputs on the device. |
Line 190... | Line 190... | ||
190 | * |
190 | * |
191 | * Takes two struct i380_sdvo_output_flags structures. |
191 | * Takes two struct i380_sdvo_output_flags structures. |
192 | */ |
192 | */ |
193 | #define SDVO_CMD_SET_IN_OUT_MAP 0x07 |
193 | #define SDVO_CMD_SET_IN_OUT_MAP 0x07 |
Line 194... | Line 194... | ||
194 | 194 | ||
195 | /** |
195 | /* |
196 | * Returns a struct intel_sdvo_output_flags of attached displays. |
196 | * Returns a struct intel_sdvo_output_flags of attached displays. |
197 | */ |
197 | */ |
Line 198... | Line 198... | ||
198 | #define SDVO_CMD_GET_ATTACHED_DISPLAYS 0x0b |
198 | #define SDVO_CMD_GET_ATTACHED_DISPLAYS 0x0b |
199 | 199 | ||
200 | /** |
200 | /* |
201 | * Returns a struct intel_sdvo_ouptut_flags of displays supporting hot plugging. |
201 | * Returns a struct intel_sdvo_ouptut_flags of displays supporting hot plugging. |
Line 202... | Line 202... | ||
202 | */ |
202 | */ |
203 | #define SDVO_CMD_GET_HOT_PLUG_SUPPORT 0x0c |
203 | #define SDVO_CMD_GET_HOT_PLUG_SUPPORT 0x0c |
204 | 204 | ||
205 | /** |
205 | /* |
206 | * Takes a struct intel_sdvo_output_flags. |
206 | * Takes a struct intel_sdvo_output_flags. |
Line 219... | Line 219... | ||
219 | unsigned int ambient_light_interrupt:1; |
219 | unsigned int ambient_light_interrupt:1; |
220 | unsigned int hdmi_audio_encrypt_change:1; |
220 | unsigned int hdmi_audio_encrypt_change:1; |
221 | unsigned int pad:6; |
221 | unsigned int pad:6; |
222 | } __packed; |
222 | } __packed; |
Line 223... | Line 223... | ||
223 | 223 | ||
224 | /** |
224 | /* |
225 | * Selects which input is affected by future input commands. |
225 | * Selects which input is affected by future input commands. |
226 | * |
226 | * |
227 | * Commands affected include SET_INPUT_TIMINGS_PART[12], |
227 | * Commands affected include SET_INPUT_TIMINGS_PART[12], |
228 | * GET_INPUT_TIMINGS_PART[12], GET_PREFERRED_INPUT_TIMINGS_PART[12], |
228 | * GET_INPUT_TIMINGS_PART[12], GET_PREFERRED_INPUT_TIMINGS_PART[12], |
Line 232... | Line 232... | ||
232 | struct intel_sdvo_set_target_input_args { |
232 | struct intel_sdvo_set_target_input_args { |
233 | unsigned int target_1:1; |
233 | unsigned int target_1:1; |
234 | unsigned int pad:7; |
234 | unsigned int pad:7; |
235 | } __packed; |
235 | } __packed; |
Line 236... | Line 236... | ||
236 | 236 | ||
237 | /** |
237 | /* |
238 | * Takes a struct intel_sdvo_output_flags of which outputs are targeted by |
238 | * Takes a struct intel_sdvo_output_flags of which outputs are targeted by |
239 | * future output commands. |
239 | * future output commands. |
240 | * |
240 | * |
241 | * Affected commands inclue SET_OUTPUT_TIMINGS_PART[12], |
241 | * Affected commands inclue SET_OUTPUT_TIMINGS_PART[12], |
Line 278... | Line 278... | ||
278 | # define SDVO_DTD_SDVO_FLAG_SCALING_NONE (0 << 4) |
278 | # define SDVO_DTD_SDVO_FLAG_SCALING_NONE (0 << 4) |
279 | # define SDVO_DTD_SDVO_FLAG_SCALING_SHARP (1 << 4) |
279 | # define SDVO_DTD_SDVO_FLAG_SCALING_SHARP (1 << 4) |
280 | # define SDVO_DTD_SDVO_FLAG_SCALING_SMOOTH (2 << 4) |
280 | # define SDVO_DTD_SDVO_FLAG_SCALING_SMOOTH (2 << 4) |
281 | # define SDVO_DTD_VSYNC_OFF_HIGH SDVO_I2C_ARG_6 |
281 | # define SDVO_DTD_VSYNC_OFF_HIGH SDVO_I2C_ARG_6 |
Line 282... | Line 282... | ||
282 | 282 | ||
283 | /** |
283 | /* |
284 | * Generates a DTD based on the given width, height, and flags. |
284 | * Generates a DTD based on the given width, height, and flags. |
285 | * |
285 | * |
286 | * This will be supported by any device supporting scaling or interlaced |
286 | * This will be supported by any device supporting scaling or interlaced |
287 | * modes. |
287 | * modes. |
Line 298... | Line 298... | ||
298 | # define SDVO_PREFERRED_INPUT_TIMING_FLAGS_SCALED (1 << 1) |
298 | # define SDVO_PREFERRED_INPUT_TIMING_FLAGS_SCALED (1 << 1) |
Line 299... | Line 299... | ||
299 | 299 | ||
300 | #define SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1 0x1b |
300 | #define SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1 0x1b |
Line 301... | Line 301... | ||
301 | #define SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2 0x1c |
301 | #define SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2 0x1c |
302 | 302 | ||
303 | /** Returns a struct intel_sdvo_pixel_clock_range */ |
303 | /* Returns a struct intel_sdvo_pixel_clock_range */ |
304 | #define SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE 0x1d |
304 | #define SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE 0x1d |
Line 305... | Line 305... | ||
305 | /** Returns a struct intel_sdvo_pixel_clock_range */ |
305 | /* Returns a struct intel_sdvo_pixel_clock_range */ |
306 | #define SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE 0x1e |
306 | #define SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE 0x1e |
Line 307... | Line 307... | ||
307 | 307 | ||
308 | /** Returns a byte bitfield containing SDVO_CLOCK_RATE_MULT_* flags */ |
308 | /* Returns a byte bitfield containing SDVO_CLOCK_RATE_MULT_* flags */ |
309 | #define SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS 0x1f |
309 | #define SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS 0x1f |
310 | 310 | ||
311 | /** Returns a byte containing a SDVO_CLOCK_RATE_MULT_* flag */ |
311 | /* Returns a byte containing a SDVO_CLOCK_RATE_MULT_* flag */ |
312 | #define SDVO_CMD_GET_CLOCK_RATE_MULT 0x20 |
312 | #define SDVO_CMD_GET_CLOCK_RATE_MULT 0x20 |
313 | /** Takes a byte containing a SDVO_CLOCK_RATE_MULT_* flag */ |
313 | /* Takes a byte containing a SDVO_CLOCK_RATE_MULT_* flag */ |
Line 314... | Line 314... | ||
314 | #define SDVO_CMD_SET_CLOCK_RATE_MULT 0x21 |
314 | #define SDVO_CMD_SET_CLOCK_RATE_MULT 0x21 |
315 | # define SDVO_CLOCK_RATE_MULT_1X (1 << 0) |
315 | # define SDVO_CLOCK_RATE_MULT_1X (1 << 0) |
316 | # define SDVO_CLOCK_RATE_MULT_2X (1 << 1) |
316 | # define SDVO_CLOCK_RATE_MULT_2X (1 << 1) |
317 | # define SDVO_CLOCK_RATE_MULT_4X (1 << 3) |
317 | # define SDVO_CLOCK_RATE_MULT_4X (1 << 3) |
318 | 318 | ||
319 | #define SDVO_CMD_GET_SUPPORTED_TV_FORMATS 0x27 |
319 | #define SDVO_CMD_GET_SUPPORTED_TV_FORMATS 0x27 |
320 | /** 6 bytes of bit flags for TV formats shared by all TV format functions */ |
320 | /* 6 bytes of bit flags for TV formats shared by all TV format functions */ |
Line 374... | Line 374... | ||
374 | 374 | ||
Line 375... | Line 375... | ||
375 | #define SDVO_CMD_GET_TV_FORMAT 0x28 |
375 | #define SDVO_CMD_GET_TV_FORMAT 0x28 |
Line 376... | Line 376... | ||
376 | 376 | ||
377 | #define SDVO_CMD_SET_TV_FORMAT 0x29 |
377 | #define SDVO_CMD_SET_TV_FORMAT 0x29 |
378 | 378 | ||
379 | /** Returns the resolutiosn that can be used with the given TV format */ |
379 | /* Returns the resolutiosn that can be used with the given TV format */ |
380 | #define SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT 0x83 |
380 | #define SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT 0x83 |
381 | struct intel_sdvo_sdtv_resolution_request { |
381 | struct intel_sdvo_sdtv_resolution_request { |
Line 537... | Line 537... | ||
537 | # define SDVO_MONITOR_STATE_OFF (1 << 7) |
537 | # define SDVO_MONITOR_STATE_OFF (1 << 7) |
Line 538... | Line 538... | ||
538 | 538 | ||
539 | #define SDVO_CMD_GET_MAX_PANEL_POWER_SEQUENCING 0x2d |
539 | #define SDVO_CMD_GET_MAX_PANEL_POWER_SEQUENCING 0x2d |
540 | #define SDVO_CMD_GET_PANEL_POWER_SEQUENCING 0x2e |
540 | #define SDVO_CMD_GET_PANEL_POWER_SEQUENCING 0x2e |
541 | #define SDVO_CMD_SET_PANEL_POWER_SEQUENCING 0x2f |
541 | #define SDVO_CMD_SET_PANEL_POWER_SEQUENCING 0x2f |
542 | /** |
542 | /* |
543 | * The panel power sequencing parameters are in units of milliseconds. |
543 | * The panel power sequencing parameters are in units of milliseconds. |
544 | * The high fields are bits 8:9 of the 10-bit values. |
544 | * The high fields are bits 8:9 of the 10-bit values. |
545 | */ |
545 | */ |
546 | struct sdvo_panel_power_sequencing { |
546 | struct sdvo_panel_power_sequencing { |