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1 | /* |
1 | /* |
2 | * Copyright 2006 Dave Airlie |
2 | * Copyright 2006 Dave Airlie |
3 | * Copyright © 2006-2007 Intel Corporation |
3 | * Copyright © 2006-2007 Intel Corporation |
4 | * Jesse Barnes |
4 | * Jesse Barnes |
5 | * |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), |
7 | * copy of this software and associated documentation files (the "Software"), |
8 | * to deal in the Software without restriction, including without limitation |
8 | * to deal in the Software without restriction, including without limitation |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
11 | * Software is furnished to do so, subject to the following conditions: |
11 | * Software is furnished to do so, subject to the following conditions: |
12 | * |
12 | * |
13 | * The above copyright notice and this permission notice (including the next |
13 | * The above copyright notice and this permission notice (including the next |
14 | * paragraph) shall be included in all copies or substantial portions of the |
14 | * paragraph) shall be included in all copies or substantial portions of the |
15 | * Software. |
15 | * Software. |
16 | * |
16 | * |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
23 | * DEALINGS IN THE SOFTWARE. |
23 | * DEALINGS IN THE SOFTWARE. |
24 | * |
24 | * |
25 | * Authors: |
25 | * Authors: |
26 | * Eric Anholt |
26 | * Eric Anholt |
27 | */ |
27 | */ |
28 | #include |
28 | #include |
29 | #include |
29 | #include |
30 | #include |
30 | #include |
31 | #include |
31 | #include |
32 | #include |
32 | #include |
33 | #include |
33 | #include |
34 | #include |
34 | #include |
35 | #include "intel_drv.h" |
35 | #include "intel_drv.h" |
36 | #include |
36 | #include |
37 | #include "i915_drv.h" |
37 | #include "i915_drv.h" |
38 | #include "intel_sdvo_regs.h" |
38 | #include "intel_sdvo_regs.h" |
39 | 39 | ||
40 | unsigned int hweight16(unsigned int w) |
40 | unsigned int hweight16(unsigned int w) |
41 | { |
41 | { |
42 | unsigned int res = w - ((w >> 1) & 0x5555); |
42 | unsigned int res = w - ((w >> 1) & 0x5555); |
43 | res = (res & 0x3333) + ((res >> 2) & 0x3333); |
43 | res = (res & 0x3333) + ((res >> 2) & 0x3333); |
44 | res = (res + (res >> 4)) & 0x0F0F; |
44 | res = (res + (res >> 4)) & 0x0F0F; |
45 | return (res + (res >> 8)) & 0x00FF; |
45 | return (res + (res >> 8)) & 0x00FF; |
46 | } |
46 | } |
47 | 47 | ||
48 | 48 | ||
49 | #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) |
49 | #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) |
50 | #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) |
50 | #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) |
51 | #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) |
51 | #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) |
52 | #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) |
52 | #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) |
53 | 53 | ||
54 | #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ |
54 | #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ |
55 | SDVO_TV_MASK) |
55 | SDVO_TV_MASK) |
56 | 56 | ||
57 | #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) |
57 | #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) |
58 | #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) |
58 | #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) |
59 | #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) |
59 | #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) |
60 | #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) |
60 | #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) |
61 | #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) |
61 | #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) |
62 | 62 | ||
63 | 63 | ||
64 | static const char *tv_format_names[] = { |
64 | static const char *tv_format_names[] = { |
65 | "NTSC_M" , "NTSC_J" , "NTSC_443", |
65 | "NTSC_M" , "NTSC_J" , "NTSC_443", |
66 | "PAL_B" , "PAL_D" , "PAL_G" , |
66 | "PAL_B" , "PAL_D" , "PAL_G" , |
67 | "PAL_H" , "PAL_I" , "PAL_M" , |
67 | "PAL_H" , "PAL_I" , "PAL_M" , |
68 | "PAL_N" , "PAL_NC" , "PAL_60" , |
68 | "PAL_N" , "PAL_NC" , "PAL_60" , |
69 | "SECAM_B" , "SECAM_D" , "SECAM_G" , |
69 | "SECAM_B" , "SECAM_D" , "SECAM_G" , |
70 | "SECAM_K" , "SECAM_K1", "SECAM_L" , |
70 | "SECAM_K" , "SECAM_K1", "SECAM_L" , |
71 | "SECAM_60" |
71 | "SECAM_60" |
72 | }; |
72 | }; |
73 | 73 | ||
74 | #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) |
74 | #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) |
75 | 75 | ||
76 | struct intel_sdvo { |
76 | struct intel_sdvo { |
77 | struct intel_encoder base; |
77 | struct intel_encoder base; |
78 | 78 | ||
79 | struct i2c_adapter *i2c; |
79 | struct i2c_adapter *i2c; |
80 | u8 slave_addr; |
80 | u8 slave_addr; |
81 | 81 | ||
82 | struct i2c_adapter ddc; |
82 | struct i2c_adapter ddc; |
83 | 83 | ||
84 | /* Register for the SDVO device: SDVOB or SDVOC */ |
84 | /* Register for the SDVO device: SDVOB or SDVOC */ |
85 | uint32_t sdvo_reg; |
85 | uint32_t sdvo_reg; |
86 | 86 | ||
87 | /* Active outputs controlled by this SDVO output */ |
87 | /* Active outputs controlled by this SDVO output */ |
88 | uint16_t controlled_output; |
88 | uint16_t controlled_output; |
89 | 89 | ||
90 | /* |
90 | /* |
91 | * Capabilities of the SDVO device returned by |
91 | * Capabilities of the SDVO device returned by |
92 | * i830_sdvo_get_capabilities() |
92 | * i830_sdvo_get_capabilities() |
93 | */ |
93 | */ |
94 | struct intel_sdvo_caps caps; |
94 | struct intel_sdvo_caps caps; |
95 | 95 | ||
96 | /* Pixel clock limitations reported by the SDVO device, in kHz */ |
96 | /* Pixel clock limitations reported by the SDVO device, in kHz */ |
97 | int pixel_clock_min, pixel_clock_max; |
97 | int pixel_clock_min, pixel_clock_max; |
98 | 98 | ||
99 | /* |
99 | /* |
100 | * For multiple function SDVO device, |
100 | * For multiple function SDVO device, |
101 | * this is for current attached outputs. |
101 | * this is for current attached outputs. |
102 | */ |
102 | */ |
103 | uint16_t attached_output; |
103 | uint16_t attached_output; |
104 | 104 | ||
105 | /* |
105 | /* |
106 | * Hotplug activation bits for this device |
106 | * Hotplug activation bits for this device |
107 | */ |
107 | */ |
108 | uint16_t hotplug_active; |
108 | uint16_t hotplug_active; |
109 | 109 | ||
110 | /** |
110 | /** |
111 | * This is used to select the color range of RBG outputs in HDMI mode. |
111 | * This is used to select the color range of RBG outputs in HDMI mode. |
112 | * It is only valid when using TMDS encoding and 8 bit per color mode. |
112 | * It is only valid when using TMDS encoding and 8 bit per color mode. |
113 | */ |
113 | */ |
114 | uint32_t color_range; |
114 | uint32_t color_range; |
- | 115 | bool color_range_auto; |
|
115 | 116 | ||
116 | /** |
117 | /** |
117 | * This is set if we're going to treat the device as TV-out. |
118 | * This is set if we're going to treat the device as TV-out. |
118 | * |
119 | * |
119 | * While we have these nice friendly flags for output types that ought |
120 | * While we have these nice friendly flags for output types that ought |
120 | * to decide this for us, the S-Video output on our HDMI+S-Video card |
121 | * to decide this for us, the S-Video output on our HDMI+S-Video card |
121 | * shows up as RGB1 (VGA). |
122 | * shows up as RGB1 (VGA). |
122 | */ |
123 | */ |
123 | bool is_tv; |
124 | bool is_tv; |
124 | 125 | ||
125 | /* On different gens SDVOB is at different places. */ |
126 | /* On different gens SDVOB is at different places. */ |
126 | bool is_sdvob; |
127 | bool is_sdvob; |
127 | 128 | ||
128 | /* This is for current tv format name */ |
129 | /* This is for current tv format name */ |
129 | int tv_format_index; |
130 | int tv_format_index; |
130 | 131 | ||
131 | /** |
132 | /** |
132 | * This is set if we treat the device as HDMI, instead of DVI. |
133 | * This is set if we treat the device as HDMI, instead of DVI. |
133 | */ |
134 | */ |
134 | bool is_hdmi; |
135 | bool is_hdmi; |
135 | bool has_hdmi_monitor; |
136 | bool has_hdmi_monitor; |
136 | bool has_hdmi_audio; |
137 | bool has_hdmi_audio; |
- | 138 | bool rgb_quant_range_selectable; |
|
137 | 139 | ||
138 | /** |
140 | /** |
139 | * This is set if we detect output of sdvo device as LVDS and |
141 | * This is set if we detect output of sdvo device as LVDS and |
140 | * have a valid fixed mode to use with the panel. |
142 | * have a valid fixed mode to use with the panel. |
141 | */ |
143 | */ |
142 | bool is_lvds; |
144 | bool is_lvds; |
143 | 145 | ||
144 | /** |
146 | /** |
145 | * This is sdvo fixed pannel mode pointer |
147 | * This is sdvo fixed pannel mode pointer |
146 | */ |
148 | */ |
147 | struct drm_display_mode *sdvo_lvds_fixed_mode; |
149 | struct drm_display_mode *sdvo_lvds_fixed_mode; |
148 | 150 | ||
149 | /* DDC bus used by this SDVO encoder */ |
151 | /* DDC bus used by this SDVO encoder */ |
150 | uint8_t ddc_bus; |
152 | uint8_t ddc_bus; |
151 | 153 | ||
152 | /* |
154 | /* |
153 | * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd |
155 | * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd |
154 | */ |
156 | */ |
155 | uint8_t dtd_sdvo_flags; |
157 | uint8_t dtd_sdvo_flags; |
156 | }; |
158 | }; |
157 | 159 | ||
158 | struct intel_sdvo_connector { |
160 | struct intel_sdvo_connector { |
159 | struct intel_connector base; |
161 | struct intel_connector base; |
160 | 162 | ||
161 | /* Mark the type of connector */ |
163 | /* Mark the type of connector */ |
162 | uint16_t output_flag; |
164 | uint16_t output_flag; |
163 | 165 | ||
164 | enum hdmi_force_audio force_audio; |
166 | enum hdmi_force_audio force_audio; |
165 | 167 | ||
166 | /* This contains all current supported TV format */ |
168 | /* This contains all current supported TV format */ |
167 | u8 tv_format_supported[TV_FORMAT_NUM]; |
169 | u8 tv_format_supported[TV_FORMAT_NUM]; |
168 | int format_supported_num; |
170 | int format_supported_num; |
169 | struct drm_property *tv_format; |
171 | struct drm_property *tv_format; |
170 | 172 | ||
171 | /* add the property for the SDVO-TV */ |
173 | /* add the property for the SDVO-TV */ |
172 | struct drm_property *left; |
174 | struct drm_property *left; |
173 | struct drm_property *right; |
175 | struct drm_property *right; |
174 | struct drm_property *top; |
176 | struct drm_property *top; |
175 | struct drm_property *bottom; |
177 | struct drm_property *bottom; |
176 | struct drm_property *hpos; |
178 | struct drm_property *hpos; |
177 | struct drm_property *vpos; |
179 | struct drm_property *vpos; |
178 | struct drm_property *contrast; |
180 | struct drm_property *contrast; |
179 | struct drm_property *saturation; |
181 | struct drm_property *saturation; |
180 | struct drm_property *hue; |
182 | struct drm_property *hue; |
181 | struct drm_property *sharpness; |
183 | struct drm_property *sharpness; |
182 | struct drm_property *flicker_filter; |
184 | struct drm_property *flicker_filter; |
183 | struct drm_property *flicker_filter_adaptive; |
185 | struct drm_property *flicker_filter_adaptive; |
184 | struct drm_property *flicker_filter_2d; |
186 | struct drm_property *flicker_filter_2d; |
185 | struct drm_property *tv_chroma_filter; |
187 | struct drm_property *tv_chroma_filter; |
186 | struct drm_property *tv_luma_filter; |
188 | struct drm_property *tv_luma_filter; |
187 | struct drm_property *dot_crawl; |
189 | struct drm_property *dot_crawl; |
188 | 190 | ||
189 | /* add the property for the SDVO-TV/LVDS */ |
191 | /* add the property for the SDVO-TV/LVDS */ |
190 | struct drm_property *brightness; |
192 | struct drm_property *brightness; |
191 | 193 | ||
192 | /* Add variable to record current setting for the above property */ |
194 | /* Add variable to record current setting for the above property */ |
193 | u32 left_margin, right_margin, top_margin, bottom_margin; |
195 | u32 left_margin, right_margin, top_margin, bottom_margin; |
194 | 196 | ||
195 | /* this is to get the range of margin.*/ |
197 | /* this is to get the range of margin.*/ |
196 | u32 max_hscan, max_vscan; |
198 | u32 max_hscan, max_vscan; |
197 | u32 max_hpos, cur_hpos; |
199 | u32 max_hpos, cur_hpos; |
198 | u32 max_vpos, cur_vpos; |
200 | u32 max_vpos, cur_vpos; |
199 | u32 cur_brightness, max_brightness; |
201 | u32 cur_brightness, max_brightness; |
200 | u32 cur_contrast, max_contrast; |
202 | u32 cur_contrast, max_contrast; |
201 | u32 cur_saturation, max_saturation; |
203 | u32 cur_saturation, max_saturation; |
202 | u32 cur_hue, max_hue; |
204 | u32 cur_hue, max_hue; |
203 | u32 cur_sharpness, max_sharpness; |
205 | u32 cur_sharpness, max_sharpness; |
204 | u32 cur_flicker_filter, max_flicker_filter; |
206 | u32 cur_flicker_filter, max_flicker_filter; |
205 | u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; |
207 | u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; |
206 | u32 cur_flicker_filter_2d, max_flicker_filter_2d; |
208 | u32 cur_flicker_filter_2d, max_flicker_filter_2d; |
207 | u32 cur_tv_chroma_filter, max_tv_chroma_filter; |
209 | u32 cur_tv_chroma_filter, max_tv_chroma_filter; |
208 | u32 cur_tv_luma_filter, max_tv_luma_filter; |
210 | u32 cur_tv_luma_filter, max_tv_luma_filter; |
209 | u32 cur_dot_crawl, max_dot_crawl; |
211 | u32 cur_dot_crawl, max_dot_crawl; |
210 | }; |
212 | }; |
211 | 213 | ||
212 | static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder) |
214 | static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder) |
213 | { |
215 | { |
214 | return container_of(encoder, struct intel_sdvo, base.base); |
216 | return container_of(encoder, struct intel_sdvo, base.base); |
215 | } |
217 | } |
216 | 218 | ||
217 | static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) |
219 | static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) |
218 | { |
220 | { |
219 | return container_of(intel_attached_encoder(connector), |
221 | return container_of(intel_attached_encoder(connector), |
220 | struct intel_sdvo, base); |
222 | struct intel_sdvo, base); |
221 | } |
223 | } |
222 | 224 | ||
223 | static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector) |
225 | static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector) |
224 | { |
226 | { |
225 | return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base); |
227 | return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base); |
226 | } |
228 | } |
227 | 229 | ||
228 | static bool |
230 | static bool |
229 | intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags); |
231 | intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags); |
230 | static bool |
232 | static bool |
231 | intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, |
233 | intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, |
232 | struct intel_sdvo_connector *intel_sdvo_connector, |
234 | struct intel_sdvo_connector *intel_sdvo_connector, |
233 | int type); |
235 | int type); |
234 | static bool |
236 | static bool |
235 | intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, |
237 | intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, |
236 | struct intel_sdvo_connector *intel_sdvo_connector); |
238 | struct intel_sdvo_connector *intel_sdvo_connector); |
237 | 239 | ||
238 | /** |
240 | /** |
239 | * Writes the SDVOB or SDVOC with the given value, but always writes both |
241 | * Writes the SDVOB or SDVOC with the given value, but always writes both |
240 | * SDVOB and SDVOC to work around apparent hardware issues (according to |
242 | * SDVOB and SDVOC to work around apparent hardware issues (according to |
241 | * comments in the BIOS). |
243 | * comments in the BIOS). |
242 | */ |
244 | */ |
243 | static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) |
245 | static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) |
244 | { |
246 | { |
245 | struct drm_device *dev = intel_sdvo->base.base.dev; |
247 | struct drm_device *dev = intel_sdvo->base.base.dev; |
246 | struct drm_i915_private *dev_priv = dev->dev_private; |
248 | struct drm_i915_private *dev_priv = dev->dev_private; |
247 | u32 bval = val, cval = val; |
249 | u32 bval = val, cval = val; |
248 | int i; |
250 | int i; |
249 | 251 | ||
250 | if (intel_sdvo->sdvo_reg == PCH_SDVOB) { |
252 | if (intel_sdvo->sdvo_reg == PCH_SDVOB) { |
251 | I915_WRITE(intel_sdvo->sdvo_reg, val); |
253 | I915_WRITE(intel_sdvo->sdvo_reg, val); |
252 | I915_READ(intel_sdvo->sdvo_reg); |
254 | I915_READ(intel_sdvo->sdvo_reg); |
253 | return; |
255 | return; |
254 | } |
256 | } |
255 | 257 | ||
256 | if (intel_sdvo->sdvo_reg == SDVOB) { |
258 | if (intel_sdvo->sdvo_reg == SDVOB) { |
257 | cval = I915_READ(SDVOC); |
259 | cval = I915_READ(SDVOC); |
258 | } else { |
260 | } else { |
259 | bval = I915_READ(SDVOB); |
261 | bval = I915_READ(SDVOB); |
260 | } |
262 | } |
261 | /* |
263 | /* |
262 | * Write the registers twice for luck. Sometimes, |
264 | * Write the registers twice for luck. Sometimes, |
263 | * writing them only once doesn't appear to 'stick'. |
265 | * writing them only once doesn't appear to 'stick'. |
264 | * The BIOS does this too. Yay, magic |
266 | * The BIOS does this too. Yay, magic |
265 | */ |
267 | */ |
266 | for (i = 0; i < 2; i++) |
268 | for (i = 0; i < 2; i++) |
267 | { |
269 | { |
268 | I915_WRITE(SDVOB, bval); |
270 | I915_WRITE(SDVOB, bval); |
269 | I915_READ(SDVOB); |
271 | I915_READ(SDVOB); |
270 | I915_WRITE(SDVOC, cval); |
272 | I915_WRITE(SDVOC, cval); |
271 | I915_READ(SDVOC); |
273 | I915_READ(SDVOC); |
272 | } |
274 | } |
273 | } |
275 | } |
274 | 276 | ||
275 | static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) |
277 | static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) |
276 | { |
278 | { |
277 | struct i2c_msg msgs[] = { |
279 | struct i2c_msg msgs[] = { |
278 | { |
280 | { |
279 | .addr = intel_sdvo->slave_addr, |
281 | .addr = intel_sdvo->slave_addr, |
280 | .flags = 0, |
282 | .flags = 0, |
281 | .len = 1, |
283 | .len = 1, |
282 | .buf = &addr, |
284 | .buf = &addr, |
283 | }, |
285 | }, |
284 | { |
286 | { |
285 | .addr = intel_sdvo->slave_addr, |
287 | .addr = intel_sdvo->slave_addr, |
286 | .flags = I2C_M_RD, |
288 | .flags = I2C_M_RD, |
287 | .len = 1, |
289 | .len = 1, |
288 | .buf = ch, |
290 | .buf = ch, |
289 | } |
291 | } |
290 | }; |
292 | }; |
291 | int ret; |
293 | int ret; |
292 | 294 | ||
293 | if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2) |
295 | if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2) |
294 | return true; |
296 | return true; |
295 | 297 | ||
296 | DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); |
298 | DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); |
297 | return false; |
299 | return false; |
298 | } |
300 | } |
299 | 301 | ||
300 | #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} |
302 | #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} |
301 | /** Mapping of command numbers to names, for debug output */ |
303 | /** Mapping of command numbers to names, for debug output */ |
302 | static const struct _sdvo_cmd_name { |
304 | static const struct _sdvo_cmd_name { |
303 | u8 cmd; |
305 | u8 cmd; |
304 | const char *name; |
306 | const char *name; |
305 | } sdvo_cmd_names[] = { |
307 | } sdvo_cmd_names[] = { |
306 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), |
308 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), |
307 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), |
309 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), |
308 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), |
310 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), |
309 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), |
311 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), |
310 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), |
312 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), |
311 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), |
313 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), |
312 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), |
314 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), |
313 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), |
315 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), |
314 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), |
316 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), |
315 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), |
317 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), |
316 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), |
318 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), |
317 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), |
319 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), |
318 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), |
320 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), |
319 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), |
321 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), |
320 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), |
322 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), |
321 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), |
323 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), |
322 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), |
324 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), |
323 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
325 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
324 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), |
326 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), |
325 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
327 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
326 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), |
328 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), |
327 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), |
329 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), |
328 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), |
330 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), |
329 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), |
331 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), |
330 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), |
332 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), |
331 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), |
333 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), |
332 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), |
334 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), |
333 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), |
335 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), |
334 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), |
336 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), |
335 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), |
337 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), |
336 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), |
338 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), |
337 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), |
339 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), |
338 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), |
340 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), |
339 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), |
341 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), |
340 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), |
342 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), |
341 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), |
343 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), |
342 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), |
344 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), |
343 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), |
345 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), |
344 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), |
346 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), |
345 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), |
347 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), |
346 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), |
348 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), |
347 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), |
349 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), |
348 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), |
350 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), |
349 | 351 | ||
350 | /* Add the op code for SDVO enhancements */ |
352 | /* Add the op code for SDVO enhancements */ |
351 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), |
353 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), |
352 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), |
354 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), |
353 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), |
355 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), |
354 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), |
356 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), |
355 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), |
357 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), |
356 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), |
358 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), |
357 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), |
359 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), |
358 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), |
360 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), |
359 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), |
361 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), |
360 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), |
362 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), |
361 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), |
363 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), |
362 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), |
364 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), |
363 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), |
365 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), |
364 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), |
366 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), |
365 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), |
367 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), |
366 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), |
368 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), |
367 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), |
369 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), |
368 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), |
370 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), |
369 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), |
371 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), |
370 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), |
372 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), |
371 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), |
373 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), |
372 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), |
374 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), |
373 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), |
375 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), |
374 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), |
376 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), |
375 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), |
377 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), |
376 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), |
378 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), |
377 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), |
379 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), |
378 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), |
380 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), |
379 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), |
381 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), |
380 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), |
382 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), |
381 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), |
383 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), |
382 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), |
384 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), |
383 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), |
385 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), |
384 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), |
386 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), |
385 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), |
387 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), |
386 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), |
388 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), |
387 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), |
389 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), |
388 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), |
390 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), |
389 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), |
391 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), |
390 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), |
392 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), |
391 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), |
393 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), |
392 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), |
394 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), |
393 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), |
395 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), |
394 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), |
396 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), |
395 | 397 | ||
396 | /* HDMI op code */ |
398 | /* HDMI op code */ |
397 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), |
399 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), |
398 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), |
400 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), |
399 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), |
401 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), |
400 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), |
402 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), |
401 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), |
403 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), |
402 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), |
404 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), |
403 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), |
405 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), |
404 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), |
406 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), |
405 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), |
407 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), |
406 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), |
408 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), |
407 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), |
409 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), |
408 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), |
410 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), |
409 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), |
411 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), |
410 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), |
412 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), |
411 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), |
413 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), |
412 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), |
414 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), |
413 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), |
415 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), |
414 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), |
416 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), |
415 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), |
417 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), |
416 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), |
418 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), |
417 | }; |
419 | }; |
418 | 420 | ||
419 | #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC") |
421 | #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC") |
420 | 422 | ||
421 | static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, |
423 | static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, |
422 | const void *args, int args_len) |
424 | const void *args, int args_len) |
423 | { |
425 | { |
424 | int i; |
426 | int i; |
425 | 427 | ||
426 | DRM_DEBUG_KMS("%s: W: %02X ", |
428 | DRM_DEBUG_KMS("%s: W: %02X ", |
427 | SDVO_NAME(intel_sdvo), cmd); |
429 | SDVO_NAME(intel_sdvo), cmd); |
428 | for (i = 0; i < args_len; i++) |
430 | for (i = 0; i < args_len; i++) |
429 | DRM_LOG_KMS("%02X ", ((u8 *)args)[i]); |
431 | DRM_LOG_KMS("%02X ", ((u8 *)args)[i]); |
430 | for (; i < 8; i++) |
432 | for (; i < 8; i++) |
431 | DRM_LOG_KMS(" "); |
433 | DRM_LOG_KMS(" "); |
432 | for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { |
434 | for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { |
433 | if (cmd == sdvo_cmd_names[i].cmd) { |
435 | if (cmd == sdvo_cmd_names[i].cmd) { |
434 | DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name); |
436 | DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name); |
435 | break; |
437 | break; |
436 | } |
438 | } |
437 | } |
439 | } |
438 | if (i == ARRAY_SIZE(sdvo_cmd_names)) |
440 | if (i == ARRAY_SIZE(sdvo_cmd_names)) |
439 | DRM_LOG_KMS("(%02X)", cmd); |
441 | DRM_LOG_KMS("(%02X)", cmd); |
440 | DRM_LOG_KMS("\n"); |
442 | DRM_LOG_KMS("\n"); |
441 | } |
443 | } |
442 | 444 | ||
443 | static const char *cmd_status_names[] = { |
445 | static const char *cmd_status_names[] = { |
444 | "Power on", |
446 | "Power on", |
445 | "Success", |
447 | "Success", |
446 | "Not supported", |
448 | "Not supported", |
447 | "Invalid arg", |
449 | "Invalid arg", |
448 | "Pending", |
450 | "Pending", |
449 | "Target not specified", |
451 | "Target not specified", |
450 | "Scaling not supported" |
452 | "Scaling not supported" |
451 | }; |
453 | }; |
452 | 454 | ||
453 | static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, |
455 | static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, |
454 | const void *args, int args_len) |
456 | const void *args, int args_len) |
455 | { |
457 | { |
456 | u8 *buf, status; |
458 | u8 *buf, status; |
457 | struct i2c_msg *msgs; |
459 | struct i2c_msg *msgs; |
458 | int i, ret = true; |
460 | int i, ret = true; |
459 | 461 | ||
460 | /* Would be simpler to allocate both in one go ? */ |
462 | /* Would be simpler to allocate both in one go ? */ |
461 | buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL); |
463 | buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL); |
462 | if (!buf) |
464 | if (!buf) |
463 | return false; |
465 | return false; |
464 | 466 | ||
465 | msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL); |
467 | msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL); |
466 | if (!msgs) { |
468 | if (!msgs) { |
467 | kfree(buf); |
469 | kfree(buf); |
468 | return false; |
470 | return false; |
469 | } |
471 | } |
470 | 472 | ||
471 | intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); |
473 | intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); |
472 | 474 | ||
473 | for (i = 0; i < args_len; i++) { |
475 | for (i = 0; i < args_len; i++) { |
474 | msgs[i].addr = intel_sdvo->slave_addr; |
476 | msgs[i].addr = intel_sdvo->slave_addr; |
475 | msgs[i].flags = 0; |
477 | msgs[i].flags = 0; |
476 | msgs[i].len = 2; |
478 | msgs[i].len = 2; |
477 | msgs[i].buf = buf + 2 *i; |
479 | msgs[i].buf = buf + 2 *i; |
478 | buf[2*i + 0] = SDVO_I2C_ARG_0 - i; |
480 | buf[2*i + 0] = SDVO_I2C_ARG_0 - i; |
479 | buf[2*i + 1] = ((u8*)args)[i]; |
481 | buf[2*i + 1] = ((u8*)args)[i]; |
480 | } |
482 | } |
481 | msgs[i].addr = intel_sdvo->slave_addr; |
483 | msgs[i].addr = intel_sdvo->slave_addr; |
482 | msgs[i].flags = 0; |
484 | msgs[i].flags = 0; |
483 | msgs[i].len = 2; |
485 | msgs[i].len = 2; |
484 | msgs[i].buf = buf + 2*i; |
486 | msgs[i].buf = buf + 2*i; |
485 | buf[2*i + 0] = SDVO_I2C_OPCODE; |
487 | buf[2*i + 0] = SDVO_I2C_OPCODE; |
486 | buf[2*i + 1] = cmd; |
488 | buf[2*i + 1] = cmd; |
487 | 489 | ||
488 | /* the following two are to read the response */ |
490 | /* the following two are to read the response */ |
489 | status = SDVO_I2C_CMD_STATUS; |
491 | status = SDVO_I2C_CMD_STATUS; |
490 | msgs[i+1].addr = intel_sdvo->slave_addr; |
492 | msgs[i+1].addr = intel_sdvo->slave_addr; |
491 | msgs[i+1].flags = 0; |
493 | msgs[i+1].flags = 0; |
492 | msgs[i+1].len = 1; |
494 | msgs[i+1].len = 1; |
493 | msgs[i+1].buf = &status; |
495 | msgs[i+1].buf = &status; |
494 | 496 | ||
495 | msgs[i+2].addr = intel_sdvo->slave_addr; |
497 | msgs[i+2].addr = intel_sdvo->slave_addr; |
496 | msgs[i+2].flags = I2C_M_RD; |
498 | msgs[i+2].flags = I2C_M_RD; |
497 | msgs[i+2].len = 1; |
499 | msgs[i+2].len = 1; |
498 | msgs[i+2].buf = &status; |
500 | msgs[i+2].buf = &status; |
499 | 501 | ||
500 | ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3); |
502 | ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3); |
501 | if (ret < 0) { |
503 | if (ret < 0) { |
502 | DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); |
504 | DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); |
503 | ret = false; |
505 | ret = false; |
504 | goto out; |
506 | goto out; |
505 | } |
507 | } |
506 | if (ret != i+3) { |
508 | if (ret != i+3) { |
507 | /* failure in I2C transfer */ |
509 | /* failure in I2C transfer */ |
508 | DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); |
510 | DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); |
509 | ret = false; |
511 | ret = false; |
510 | } |
512 | } |
511 | 513 | ||
512 | out: |
514 | out: |
513 | kfree(msgs); |
515 | kfree(msgs); |
514 | kfree(buf); |
516 | kfree(buf); |
515 | return ret; |
517 | return ret; |
516 | } |
518 | } |
517 | 519 | ||
518 | static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, |
520 | static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, |
519 | void *response, int response_len) |
521 | void *response, int response_len) |
520 | { |
522 | { |
521 | u8 retry = 15; /* 5 quick checks, followed by 10 long checks */ |
523 | u8 retry = 15; /* 5 quick checks, followed by 10 long checks */ |
522 | u8 status; |
524 | u8 status; |
523 | int i; |
525 | int i; |
524 | 526 | ||
525 | DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo)); |
527 | DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo)); |
526 | 528 | ||
527 | /* |
529 | /* |
528 | * The documentation states that all commands will be |
530 | * The documentation states that all commands will be |
529 | * processed within 15µs, and that we need only poll |
531 | * processed within 15µs, and that we need only poll |
530 | * the status byte a maximum of 3 times in order for the |
532 | * the status byte a maximum of 3 times in order for the |
531 | * command to be complete. |
533 | * command to be complete. |
532 | * |
534 | * |
533 | * Check 5 times in case the hardware failed to read the docs. |
535 | * Check 5 times in case the hardware failed to read the docs. |
534 | * |
536 | * |
535 | * Also beware that the first response by many devices is to |
537 | * Also beware that the first response by many devices is to |
536 | * reply PENDING and stall for time. TVs are notorious for |
538 | * reply PENDING and stall for time. TVs are notorious for |
537 | * requiring longer than specified to complete their replies. |
539 | * requiring longer than specified to complete their replies. |
538 | * Originally (in the DDX long ago), the delay was only ever 15ms |
540 | * Originally (in the DDX long ago), the delay was only ever 15ms |
539 | * with an additional delay of 30ms applied for TVs added later after |
541 | * with an additional delay of 30ms applied for TVs added later after |
540 | * many experiments. To accommodate both sets of delays, we do a |
542 | * many experiments. To accommodate both sets of delays, we do a |
541 | * sequence of slow checks if the device is falling behind and fails |
543 | * sequence of slow checks if the device is falling behind and fails |
542 | * to reply within 5*15µs. |
544 | * to reply within 5*15µs. |
543 | */ |
545 | */ |
544 | if (!intel_sdvo_read_byte(intel_sdvo, |
546 | if (!intel_sdvo_read_byte(intel_sdvo, |
545 | SDVO_I2C_CMD_STATUS, |
547 | SDVO_I2C_CMD_STATUS, |
546 | &status)) |
548 | &status)) |
547 | goto log_fail; |
549 | goto log_fail; |
548 | 550 | ||
549 | while (status == SDVO_CMD_STATUS_PENDING && --retry) { |
551 | while (status == SDVO_CMD_STATUS_PENDING && --retry) { |
550 | if (retry < 10) |
552 | if (retry < 10) |
551 | msleep(15); |
553 | msleep(15); |
552 | else |
554 | else |
553 | udelay(15); |
555 | udelay(15); |
554 | 556 | ||
555 | if (!intel_sdvo_read_byte(intel_sdvo, |
557 | if (!intel_sdvo_read_byte(intel_sdvo, |
556 | SDVO_I2C_CMD_STATUS, |
558 | SDVO_I2C_CMD_STATUS, |
557 | &status)) |
559 | &status)) |
558 | goto log_fail; |
560 | goto log_fail; |
559 | } |
561 | } |
560 | 562 | ||
561 | if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) |
563 | if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) |
562 | DRM_LOG_KMS("(%s)", cmd_status_names[status]); |
564 | DRM_LOG_KMS("(%s)", cmd_status_names[status]); |
563 | else |
565 | else |
564 | DRM_LOG_KMS("(??? %d)", status); |
566 | DRM_LOG_KMS("(??? %d)", status); |
565 | 567 | ||
566 | if (status != SDVO_CMD_STATUS_SUCCESS) |
568 | if (status != SDVO_CMD_STATUS_SUCCESS) |
567 | goto log_fail; |
569 | goto log_fail; |
568 | 570 | ||
569 | /* Read the command response */ |
571 | /* Read the command response */ |
570 | for (i = 0; i < response_len; i++) { |
572 | for (i = 0; i < response_len; i++) { |
571 | if (!intel_sdvo_read_byte(intel_sdvo, |
573 | if (!intel_sdvo_read_byte(intel_sdvo, |
572 | SDVO_I2C_RETURN_0 + i, |
574 | SDVO_I2C_RETURN_0 + i, |
573 | &((u8 *)response)[i])) |
575 | &((u8 *)response)[i])) |
574 | goto log_fail; |
576 | goto log_fail; |
575 | DRM_LOG_KMS(" %02X", ((u8 *)response)[i]); |
577 | DRM_LOG_KMS(" %02X", ((u8 *)response)[i]); |
576 | } |
578 | } |
577 | DRM_LOG_KMS("\n"); |
579 | DRM_LOG_KMS("\n"); |
578 | return true; |
580 | return true; |
579 | 581 | ||
580 | log_fail: |
582 | log_fail: |
581 | DRM_LOG_KMS("... failed\n"); |
583 | DRM_LOG_KMS("... failed\n"); |
582 | return false; |
584 | return false; |
583 | } |
585 | } |
584 | 586 | ||
585 | static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) |
587 | static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) |
586 | { |
588 | { |
587 | if (mode->clock >= 100000) |
589 | if (mode->clock >= 100000) |
588 | return 1; |
590 | return 1; |
589 | else if (mode->clock >= 50000) |
591 | else if (mode->clock >= 50000) |
590 | return 2; |
592 | return 2; |
591 | else |
593 | else |
592 | return 4; |
594 | return 4; |
593 | } |
595 | } |
594 | 596 | ||
595 | static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, |
597 | static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, |
596 | u8 ddc_bus) |
598 | u8 ddc_bus) |
597 | { |
599 | { |
598 | /* This must be the immediately preceding write before the i2c xfer */ |
600 | /* This must be the immediately preceding write before the i2c xfer */ |
599 | return intel_sdvo_write_cmd(intel_sdvo, |
601 | return intel_sdvo_write_cmd(intel_sdvo, |
600 | SDVO_CMD_SET_CONTROL_BUS_SWITCH, |
602 | SDVO_CMD_SET_CONTROL_BUS_SWITCH, |
601 | &ddc_bus, 1); |
603 | &ddc_bus, 1); |
602 | } |
604 | } |
603 | 605 | ||
604 | static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) |
606 | static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) |
605 | { |
607 | { |
606 | if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) |
608 | if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) |
607 | return false; |
609 | return false; |
608 | 610 | ||
609 | return intel_sdvo_read_response(intel_sdvo, NULL, 0); |
611 | return intel_sdvo_read_response(intel_sdvo, NULL, 0); |
610 | } |
612 | } |
611 | 613 | ||
612 | static bool |
614 | static bool |
613 | intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) |
615 | intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) |
614 | { |
616 | { |
615 | if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) |
617 | if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) |
616 | return false; |
618 | return false; |
617 | 619 | ||
618 | return intel_sdvo_read_response(intel_sdvo, value, len); |
620 | return intel_sdvo_read_response(intel_sdvo, value, len); |
619 | } |
621 | } |
620 | 622 | ||
621 | static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) |
623 | static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) |
622 | { |
624 | { |
623 | struct intel_sdvo_set_target_input_args targets = {0}; |
625 | struct intel_sdvo_set_target_input_args targets = {0}; |
624 | return intel_sdvo_set_value(intel_sdvo, |
626 | return intel_sdvo_set_value(intel_sdvo, |
625 | SDVO_CMD_SET_TARGET_INPUT, |
627 | SDVO_CMD_SET_TARGET_INPUT, |
626 | &targets, sizeof(targets)); |
628 | &targets, sizeof(targets)); |
627 | } |
629 | } |
628 | 630 | ||
629 | /** |
631 | /** |
630 | * Return whether each input is trained. |
632 | * Return whether each input is trained. |
631 | * |
633 | * |
632 | * This function is making an assumption about the layout of the response, |
634 | * This function is making an assumption about the layout of the response, |
633 | * which should be checked against the docs. |
635 | * which should be checked against the docs. |
634 | */ |
636 | */ |
635 | static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) |
637 | static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) |
636 | { |
638 | { |
637 | struct intel_sdvo_get_trained_inputs_response response; |
639 | struct intel_sdvo_get_trained_inputs_response response; |
638 | 640 | ||
639 | BUILD_BUG_ON(sizeof(response) != 1); |
641 | BUILD_BUG_ON(sizeof(response) != 1); |
640 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, |
642 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, |
641 | &response, sizeof(response))) |
643 | &response, sizeof(response))) |
642 | return false; |
644 | return false; |
643 | 645 | ||
644 | *input_1 = response.input0_trained; |
646 | *input_1 = response.input0_trained; |
645 | *input_2 = response.input1_trained; |
647 | *input_2 = response.input1_trained; |
646 | return true; |
648 | return true; |
647 | } |
649 | } |
648 | 650 | ||
649 | static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, |
651 | static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, |
650 | u16 outputs) |
652 | u16 outputs) |
651 | { |
653 | { |
652 | return intel_sdvo_set_value(intel_sdvo, |
654 | return intel_sdvo_set_value(intel_sdvo, |
653 | SDVO_CMD_SET_ACTIVE_OUTPUTS, |
655 | SDVO_CMD_SET_ACTIVE_OUTPUTS, |
654 | &outputs, sizeof(outputs)); |
656 | &outputs, sizeof(outputs)); |
655 | } |
657 | } |
656 | 658 | ||
657 | static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, |
659 | static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, |
658 | u16 *outputs) |
660 | u16 *outputs) |
659 | { |
661 | { |
660 | return intel_sdvo_get_value(intel_sdvo, |
662 | return intel_sdvo_get_value(intel_sdvo, |
661 | SDVO_CMD_GET_ACTIVE_OUTPUTS, |
663 | SDVO_CMD_GET_ACTIVE_OUTPUTS, |
662 | outputs, sizeof(*outputs)); |
664 | outputs, sizeof(*outputs)); |
663 | } |
665 | } |
664 | 666 | ||
665 | static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, |
667 | static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, |
666 | int mode) |
668 | int mode) |
667 | { |
669 | { |
668 | u8 state = SDVO_ENCODER_STATE_ON; |
670 | u8 state = SDVO_ENCODER_STATE_ON; |
669 | 671 | ||
670 | switch (mode) { |
672 | switch (mode) { |
671 | case DRM_MODE_DPMS_ON: |
673 | case DRM_MODE_DPMS_ON: |
672 | state = SDVO_ENCODER_STATE_ON; |
674 | state = SDVO_ENCODER_STATE_ON; |
673 | break; |
675 | break; |
674 | case DRM_MODE_DPMS_STANDBY: |
676 | case DRM_MODE_DPMS_STANDBY: |
675 | state = SDVO_ENCODER_STATE_STANDBY; |
677 | state = SDVO_ENCODER_STATE_STANDBY; |
676 | break; |
678 | break; |
677 | case DRM_MODE_DPMS_SUSPEND: |
679 | case DRM_MODE_DPMS_SUSPEND: |
678 | state = SDVO_ENCODER_STATE_SUSPEND; |
680 | state = SDVO_ENCODER_STATE_SUSPEND; |
679 | break; |
681 | break; |
680 | case DRM_MODE_DPMS_OFF: |
682 | case DRM_MODE_DPMS_OFF: |
681 | state = SDVO_ENCODER_STATE_OFF; |
683 | state = SDVO_ENCODER_STATE_OFF; |
682 | break; |
684 | break; |
683 | } |
685 | } |
684 | 686 | ||
685 | return intel_sdvo_set_value(intel_sdvo, |
687 | return intel_sdvo_set_value(intel_sdvo, |
686 | SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); |
688 | SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); |
687 | } |
689 | } |
688 | 690 | ||
689 | static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, |
691 | static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, |
690 | int *clock_min, |
692 | int *clock_min, |
691 | int *clock_max) |
693 | int *clock_max) |
692 | { |
694 | { |
693 | struct intel_sdvo_pixel_clock_range clocks; |
695 | struct intel_sdvo_pixel_clock_range clocks; |
694 | 696 | ||
695 | BUILD_BUG_ON(sizeof(clocks) != 4); |
697 | BUILD_BUG_ON(sizeof(clocks) != 4); |
696 | if (!intel_sdvo_get_value(intel_sdvo, |
698 | if (!intel_sdvo_get_value(intel_sdvo, |
697 | SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, |
699 | SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, |
698 | &clocks, sizeof(clocks))) |
700 | &clocks, sizeof(clocks))) |
699 | return false; |
701 | return false; |
700 | 702 | ||
701 | /* Convert the values from units of 10 kHz to kHz. */ |
703 | /* Convert the values from units of 10 kHz to kHz. */ |
702 | *clock_min = clocks.min * 10; |
704 | *clock_min = clocks.min * 10; |
703 | *clock_max = clocks.max * 10; |
705 | *clock_max = clocks.max * 10; |
704 | return true; |
706 | return true; |
705 | } |
707 | } |
706 | 708 | ||
707 | static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, |
709 | static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, |
708 | u16 outputs) |
710 | u16 outputs) |
709 | { |
711 | { |
710 | return intel_sdvo_set_value(intel_sdvo, |
712 | return intel_sdvo_set_value(intel_sdvo, |
711 | SDVO_CMD_SET_TARGET_OUTPUT, |
713 | SDVO_CMD_SET_TARGET_OUTPUT, |
712 | &outputs, sizeof(outputs)); |
714 | &outputs, sizeof(outputs)); |
713 | } |
715 | } |
714 | 716 | ||
715 | static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, |
717 | static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, |
716 | struct intel_sdvo_dtd *dtd) |
718 | struct intel_sdvo_dtd *dtd) |
717 | { |
719 | { |
718 | return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && |
720 | return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && |
719 | intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); |
721 | intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); |
720 | } |
722 | } |
721 | 723 | ||
722 | static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, |
724 | static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, |
723 | struct intel_sdvo_dtd *dtd) |
725 | struct intel_sdvo_dtd *dtd) |
724 | { |
726 | { |
725 | return intel_sdvo_set_timing(intel_sdvo, |
727 | return intel_sdvo_set_timing(intel_sdvo, |
726 | SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); |
728 | SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); |
727 | } |
729 | } |
728 | 730 | ||
729 | static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, |
731 | static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, |
730 | struct intel_sdvo_dtd *dtd) |
732 | struct intel_sdvo_dtd *dtd) |
731 | { |
733 | { |
732 | return intel_sdvo_set_timing(intel_sdvo, |
734 | return intel_sdvo_set_timing(intel_sdvo, |
733 | SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); |
735 | SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); |
734 | } |
736 | } |
735 | 737 | ||
736 | static bool |
738 | static bool |
737 | intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, |
739 | intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, |
738 | uint16_t clock, |
740 | uint16_t clock, |
739 | uint16_t width, |
741 | uint16_t width, |
740 | uint16_t height) |
742 | uint16_t height) |
741 | { |
743 | { |
742 | struct intel_sdvo_preferred_input_timing_args args; |
744 | struct intel_sdvo_preferred_input_timing_args args; |
743 | 745 | ||
744 | memset(&args, 0, sizeof(args)); |
746 | memset(&args, 0, sizeof(args)); |
745 | args.clock = clock; |
747 | args.clock = clock; |
746 | args.width = width; |
748 | args.width = width; |
747 | args.height = height; |
749 | args.height = height; |
748 | args.interlace = 0; |
750 | args.interlace = 0; |
749 | 751 | ||
750 | if (intel_sdvo->is_lvds && |
752 | if (intel_sdvo->is_lvds && |
751 | (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || |
753 | (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || |
752 | intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) |
754 | intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) |
753 | args.scaled = 1; |
755 | args.scaled = 1; |
754 | 756 | ||
755 | return intel_sdvo_set_value(intel_sdvo, |
757 | return intel_sdvo_set_value(intel_sdvo, |
756 | SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, |
758 | SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, |
757 | &args, sizeof(args)); |
759 | &args, sizeof(args)); |
758 | } |
760 | } |
759 | 761 | ||
760 | static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, |
762 | static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, |
761 | struct intel_sdvo_dtd *dtd) |
763 | struct intel_sdvo_dtd *dtd) |
762 | { |
764 | { |
763 | BUILD_BUG_ON(sizeof(dtd->part1) != 8); |
765 | BUILD_BUG_ON(sizeof(dtd->part1) != 8); |
764 | BUILD_BUG_ON(sizeof(dtd->part2) != 8); |
766 | BUILD_BUG_ON(sizeof(dtd->part2) != 8); |
765 | return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, |
767 | return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, |
766 | &dtd->part1, sizeof(dtd->part1)) && |
768 | &dtd->part1, sizeof(dtd->part1)) && |
767 | intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, |
769 | intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, |
768 | &dtd->part2, sizeof(dtd->part2)); |
770 | &dtd->part2, sizeof(dtd->part2)); |
769 | } |
771 | } |
770 | 772 | ||
771 | static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) |
773 | static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) |
772 | { |
774 | { |
773 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); |
775 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); |
774 | } |
776 | } |
775 | 777 | ||
776 | static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, |
778 | static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, |
777 | const struct drm_display_mode *mode) |
779 | const struct drm_display_mode *mode) |
778 | { |
780 | { |
779 | uint16_t width, height; |
781 | uint16_t width, height; |
780 | uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; |
782 | uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; |
781 | uint16_t h_sync_offset, v_sync_offset; |
783 | uint16_t h_sync_offset, v_sync_offset; |
782 | int mode_clock; |
784 | int mode_clock; |
783 | 785 | ||
784 | width = mode->hdisplay; |
786 | width = mode->hdisplay; |
785 | height = mode->vdisplay; |
787 | height = mode->vdisplay; |
786 | 788 | ||
787 | /* do some mode translations */ |
789 | /* do some mode translations */ |
788 | h_blank_len = mode->htotal - mode->hdisplay; |
790 | h_blank_len = mode->htotal - mode->hdisplay; |
789 | h_sync_len = mode->hsync_end - mode->hsync_start; |
791 | h_sync_len = mode->hsync_end - mode->hsync_start; |
790 | 792 | ||
791 | v_blank_len = mode->vtotal - mode->vdisplay; |
793 | v_blank_len = mode->vtotal - mode->vdisplay; |
792 | v_sync_len = mode->vsync_end - mode->vsync_start; |
794 | v_sync_len = mode->vsync_end - mode->vsync_start; |
793 | 795 | ||
794 | h_sync_offset = mode->hsync_start - mode->hdisplay; |
796 | h_sync_offset = mode->hsync_start - mode->hdisplay; |
795 | v_sync_offset = mode->vsync_start - mode->vdisplay; |
797 | v_sync_offset = mode->vsync_start - mode->vdisplay; |
796 | 798 | ||
797 | mode_clock = mode->clock; |
799 | mode_clock = mode->clock; |
798 | mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1; |
800 | mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1; |
799 | mode_clock /= 10; |
801 | mode_clock /= 10; |
800 | dtd->part1.clock = mode_clock; |
802 | dtd->part1.clock = mode_clock; |
801 | 803 | ||
802 | dtd->part1.h_active = width & 0xff; |
804 | dtd->part1.h_active = width & 0xff; |
803 | dtd->part1.h_blank = h_blank_len & 0xff; |
805 | dtd->part1.h_blank = h_blank_len & 0xff; |
804 | dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | |
806 | dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | |
805 | ((h_blank_len >> 8) & 0xf); |
807 | ((h_blank_len >> 8) & 0xf); |
806 | dtd->part1.v_active = height & 0xff; |
808 | dtd->part1.v_active = height & 0xff; |
807 | dtd->part1.v_blank = v_blank_len & 0xff; |
809 | dtd->part1.v_blank = v_blank_len & 0xff; |
808 | dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | |
810 | dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | |
809 | ((v_blank_len >> 8) & 0xf); |
811 | ((v_blank_len >> 8) & 0xf); |
810 | 812 | ||
811 | dtd->part2.h_sync_off = h_sync_offset & 0xff; |
813 | dtd->part2.h_sync_off = h_sync_offset & 0xff; |
812 | dtd->part2.h_sync_width = h_sync_len & 0xff; |
814 | dtd->part2.h_sync_width = h_sync_len & 0xff; |
813 | dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | |
815 | dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | |
814 | (v_sync_len & 0xf); |
816 | (v_sync_len & 0xf); |
815 | dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | |
817 | dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | |
816 | ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | |
818 | ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | |
817 | ((v_sync_len & 0x30) >> 4); |
819 | ((v_sync_len & 0x30) >> 4); |
818 | 820 | ||
819 | dtd->part2.dtd_flags = 0x18; |
821 | dtd->part2.dtd_flags = 0x18; |
820 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
822 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
821 | dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE; |
823 | dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE; |
822 | if (mode->flags & DRM_MODE_FLAG_PHSYNC) |
824 | if (mode->flags & DRM_MODE_FLAG_PHSYNC) |
823 | dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE; |
825 | dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE; |
824 | if (mode->flags & DRM_MODE_FLAG_PVSYNC) |
826 | if (mode->flags & DRM_MODE_FLAG_PVSYNC) |
825 | dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; |
827 | dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; |
826 | 828 | ||
827 | dtd->part2.sdvo_flags = 0; |
829 | dtd->part2.sdvo_flags = 0; |
828 | dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; |
830 | dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; |
829 | dtd->part2.reserved = 0; |
831 | dtd->part2.reserved = 0; |
830 | } |
832 | } |
831 | 833 | ||
832 | static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, |
834 | static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, |
833 | const struct intel_sdvo_dtd *dtd) |
835 | const struct intel_sdvo_dtd *dtd) |
834 | { |
836 | { |
835 | mode->hdisplay = dtd->part1.h_active; |
837 | mode->hdisplay = dtd->part1.h_active; |
836 | mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; |
838 | mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; |
837 | mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; |
839 | mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; |
838 | mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; |
840 | mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; |
839 | mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; |
841 | mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; |
840 | mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; |
842 | mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; |
841 | mode->htotal = mode->hdisplay + dtd->part1.h_blank; |
843 | mode->htotal = mode->hdisplay + dtd->part1.h_blank; |
842 | mode->htotal += (dtd->part1.h_high & 0xf) << 8; |
844 | mode->htotal += (dtd->part1.h_high & 0xf) << 8; |
843 | 845 | ||
844 | mode->vdisplay = dtd->part1.v_active; |
846 | mode->vdisplay = dtd->part1.v_active; |
845 | mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; |
847 | mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; |
846 | mode->vsync_start = mode->vdisplay; |
848 | mode->vsync_start = mode->vdisplay; |
847 | mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; |
849 | mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; |
848 | mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; |
850 | mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; |
849 | mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; |
851 | mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; |
850 | mode->vsync_end = mode->vsync_start + |
852 | mode->vsync_end = mode->vsync_start + |
851 | (dtd->part2.v_sync_off_width & 0xf); |
853 | (dtd->part2.v_sync_off_width & 0xf); |
852 | mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; |
854 | mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; |
853 | mode->vtotal = mode->vdisplay + dtd->part1.v_blank; |
855 | mode->vtotal = mode->vdisplay + dtd->part1.v_blank; |
854 | mode->vtotal += (dtd->part1.v_high & 0xf) << 8; |
856 | mode->vtotal += (dtd->part1.v_high & 0xf) << 8; |
855 | 857 | ||
856 | mode->clock = dtd->part1.clock * 10; |
858 | mode->clock = dtd->part1.clock * 10; |
857 | 859 | ||
858 | mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); |
860 | mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); |
859 | if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) |
861 | if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) |
860 | mode->flags |= DRM_MODE_FLAG_INTERLACE; |
862 | mode->flags |= DRM_MODE_FLAG_INTERLACE; |
861 | if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) |
863 | if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) |
862 | mode->flags |= DRM_MODE_FLAG_PHSYNC; |
864 | mode->flags |= DRM_MODE_FLAG_PHSYNC; |
863 | if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) |
865 | if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) |
864 | mode->flags |= DRM_MODE_FLAG_PVSYNC; |
866 | mode->flags |= DRM_MODE_FLAG_PVSYNC; |
865 | } |
867 | } |
866 | 868 | ||
867 | static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) |
869 | static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) |
868 | { |
870 | { |
869 | struct intel_sdvo_encode encode; |
871 | struct intel_sdvo_encode encode; |
870 | 872 | ||
871 | BUILD_BUG_ON(sizeof(encode) != 2); |
873 | BUILD_BUG_ON(sizeof(encode) != 2); |
872 | return intel_sdvo_get_value(intel_sdvo, |
874 | return intel_sdvo_get_value(intel_sdvo, |
873 | SDVO_CMD_GET_SUPP_ENCODE, |
875 | SDVO_CMD_GET_SUPP_ENCODE, |
874 | &encode, sizeof(encode)); |
876 | &encode, sizeof(encode)); |
875 | } |
877 | } |
876 | 878 | ||
877 | static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, |
879 | static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, |
878 | uint8_t mode) |
880 | uint8_t mode) |
879 | { |
881 | { |
880 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); |
882 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); |
881 | } |
883 | } |
882 | 884 | ||
883 | static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, |
885 | static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, |
884 | uint8_t mode) |
886 | uint8_t mode) |
885 | { |
887 | { |
886 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); |
888 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); |
887 | } |
889 | } |
888 | 890 | ||
889 | #if 0 |
891 | #if 0 |
890 | static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) |
892 | static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) |
891 | { |
893 | { |
892 | int i, j; |
894 | int i, j; |
893 | uint8_t set_buf_index[2]; |
895 | uint8_t set_buf_index[2]; |
894 | uint8_t av_split; |
896 | uint8_t av_split; |
895 | uint8_t buf_size; |
897 | uint8_t buf_size; |
896 | uint8_t buf[48]; |
898 | uint8_t buf[48]; |
897 | uint8_t *pos; |
899 | uint8_t *pos; |
898 | 900 | ||
899 | intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); |
901 | intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); |
900 | 902 | ||
901 | for (i = 0; i <= av_split; i++) { |
903 | for (i = 0; i <= av_split; i++) { |
902 | set_buf_index[0] = i; set_buf_index[1] = 0; |
904 | set_buf_index[0] = i; set_buf_index[1] = 0; |
903 | intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, |
905 | intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, |
904 | set_buf_index, 2); |
906 | set_buf_index, 2); |
905 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); |
907 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); |
906 | intel_sdvo_read_response(encoder, &buf_size, 1); |
908 | intel_sdvo_read_response(encoder, &buf_size, 1); |
907 | 909 | ||
908 | pos = buf; |
910 | pos = buf; |
909 | for (j = 0; j <= buf_size; j += 8) { |
911 | for (j = 0; j <= buf_size; j += 8) { |
910 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, |
912 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, |
911 | NULL, 0); |
913 | NULL, 0); |
912 | intel_sdvo_read_response(encoder, pos, 8); |
914 | intel_sdvo_read_response(encoder, pos, 8); |
913 | pos += 8; |
915 | pos += 8; |
914 | } |
916 | } |
915 | } |
917 | } |
916 | } |
918 | } |
917 | #endif |
919 | #endif |
918 | 920 | ||
919 | static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, |
921 | static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, |
920 | unsigned if_index, uint8_t tx_rate, |
922 | unsigned if_index, uint8_t tx_rate, |
921 | uint8_t *data, unsigned length) |
923 | uint8_t *data, unsigned length) |
922 | { |
924 | { |
923 | uint8_t set_buf_index[2] = { if_index, 0 }; |
925 | uint8_t set_buf_index[2] = { if_index, 0 }; |
924 | uint8_t hbuf_size, tmp[8]; |
926 | uint8_t hbuf_size, tmp[8]; |
925 | int i; |
927 | int i; |
926 | 928 | ||
927 | if (!intel_sdvo_set_value(intel_sdvo, |
929 | if (!intel_sdvo_set_value(intel_sdvo, |
928 | SDVO_CMD_SET_HBUF_INDEX, |
930 | SDVO_CMD_SET_HBUF_INDEX, |
929 | set_buf_index, 2)) |
931 | set_buf_index, 2)) |
930 | return false; |
932 | return false; |
931 | 933 | ||
932 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, |
934 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, |
933 | &hbuf_size, 1)) |
935 | &hbuf_size, 1)) |
934 | return false; |
936 | return false; |
935 | 937 | ||
936 | /* Buffer size is 0 based, hooray! */ |
938 | /* Buffer size is 0 based, hooray! */ |
937 | hbuf_size++; |
939 | hbuf_size++; |
938 | 940 | ||
939 | DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n", |
941 | DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n", |
940 | if_index, length, hbuf_size); |
942 | if_index, length, hbuf_size); |
941 | 943 | ||
942 | for (i = 0; i < hbuf_size; i += 8) { |
944 | for (i = 0; i < hbuf_size; i += 8) { |
943 | memset(tmp, 0, 8); |
945 | memset(tmp, 0, 8); |
944 | if (i < length) |
946 | if (i < length) |
945 | memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); |
947 | memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); |
946 | 948 | ||
947 | if (!intel_sdvo_set_value(intel_sdvo, |
949 | if (!intel_sdvo_set_value(intel_sdvo, |
948 | SDVO_CMD_SET_HBUF_DATA, |
950 | SDVO_CMD_SET_HBUF_DATA, |
949 | tmp, 8)) |
951 | tmp, 8)) |
950 | return false; |
952 | return false; |
951 | } |
953 | } |
952 | 954 | ||
953 | return intel_sdvo_set_value(intel_sdvo, |
955 | return intel_sdvo_set_value(intel_sdvo, |
954 | SDVO_CMD_SET_HBUF_TXRATE, |
956 | SDVO_CMD_SET_HBUF_TXRATE, |
955 | &tx_rate, 1); |
957 | &tx_rate, 1); |
956 | } |
958 | } |
957 | 959 | ||
- | 960 | static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo, |
|
958 | static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) |
961 | const struct drm_display_mode *adjusted_mode) |
959 | { |
962 | { |
960 | struct dip_infoframe avi_if = { |
963 | struct dip_infoframe avi_if = { |
961 | .type = DIP_TYPE_AVI, |
964 | .type = DIP_TYPE_AVI, |
962 | .ver = DIP_VERSION_AVI, |
965 | .ver = DIP_VERSION_AVI, |
963 | .len = DIP_LEN_AVI, |
966 | .len = DIP_LEN_AVI, |
964 | }; |
967 | }; |
965 | uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; |
968 | uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; |
- | 969 | ||
- | 970 | if (intel_sdvo->rgb_quant_range_selectable) { |
|
- | 971 | if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE) |
|
- | 972 | avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED; |
|
- | 973 | else |
|
- | 974 | avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL; |
|
- | 975 | } |
|
966 | 976 | ||
967 | intel_dip_infoframe_csum(&avi_if); |
977 | intel_dip_infoframe_csum(&avi_if); |
968 | 978 | ||
969 | /* sdvo spec says that the ecc is handled by the hw, and it looks like |
979 | /* sdvo spec says that the ecc is handled by the hw, and it looks like |
970 | * we must not send the ecc field, either. */ |
980 | * we must not send the ecc field, either. */ |
971 | memcpy(sdvo_data, &avi_if, 3); |
981 | memcpy(sdvo_data, &avi_if, 3); |
972 | sdvo_data[3] = avi_if.checksum; |
982 | sdvo_data[3] = avi_if.checksum; |
973 | memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi)); |
983 | memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi)); |
974 | 984 | ||
975 | return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, |
985 | return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, |
976 | SDVO_HBUF_TX_VSYNC, |
986 | SDVO_HBUF_TX_VSYNC, |
977 | sdvo_data, sizeof(sdvo_data)); |
987 | sdvo_data, sizeof(sdvo_data)); |
978 | } |
988 | } |
979 | 989 | ||
980 | static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) |
990 | static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) |
981 | { |
991 | { |
982 | struct intel_sdvo_tv_format format; |
992 | struct intel_sdvo_tv_format format; |
983 | uint32_t format_map; |
993 | uint32_t format_map; |
984 | 994 | ||
985 | format_map = 1 << intel_sdvo->tv_format_index; |
995 | format_map = 1 << intel_sdvo->tv_format_index; |
986 | memset(&format, 0, sizeof(format)); |
996 | memset(&format, 0, sizeof(format)); |
987 | memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); |
997 | memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); |
988 | 998 | ||
989 | BUILD_BUG_ON(sizeof(format) != 6); |
999 | BUILD_BUG_ON(sizeof(format) != 6); |
990 | return intel_sdvo_set_value(intel_sdvo, |
1000 | return intel_sdvo_set_value(intel_sdvo, |
991 | SDVO_CMD_SET_TV_FORMAT, |
1001 | SDVO_CMD_SET_TV_FORMAT, |
992 | &format, sizeof(format)); |
1002 | &format, sizeof(format)); |
993 | } |
1003 | } |
994 | 1004 | ||
995 | static bool |
1005 | static bool |
996 | intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, |
1006 | intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, |
997 | const struct drm_display_mode *mode) |
1007 | const struct drm_display_mode *mode) |
998 | { |
1008 | { |
999 | struct intel_sdvo_dtd output_dtd; |
1009 | struct intel_sdvo_dtd output_dtd; |
1000 | 1010 | ||
1001 | if (!intel_sdvo_set_target_output(intel_sdvo, |
1011 | if (!intel_sdvo_set_target_output(intel_sdvo, |
1002 | intel_sdvo->attached_output)) |
1012 | intel_sdvo->attached_output)) |
1003 | return false; |
1013 | return false; |
1004 | 1014 | ||
1005 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
1015 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
1006 | if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) |
1016 | if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) |
1007 | return false; |
1017 | return false; |
1008 | 1018 | ||
1009 | return true; |
1019 | return true; |
1010 | } |
1020 | } |
1011 | 1021 | ||
1012 | /* Asks the sdvo controller for the preferred input mode given the output mode. |
1022 | /* Asks the sdvo controller for the preferred input mode given the output mode. |
1013 | * Unfortunately we have to set up the full output mode to do that. */ |
1023 | * Unfortunately we have to set up the full output mode to do that. */ |
1014 | static bool |
1024 | static bool |
1015 | intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo, |
1025 | intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo, |
1016 | const struct drm_display_mode *mode, |
1026 | const struct drm_display_mode *mode, |
1017 | struct drm_display_mode *adjusted_mode) |
1027 | struct drm_display_mode *adjusted_mode) |
1018 | { |
1028 | { |
1019 | struct intel_sdvo_dtd input_dtd; |
1029 | struct intel_sdvo_dtd input_dtd; |
1020 | 1030 | ||
1021 | /* Reset the input timing to the screen. Assume always input 0. */ |
1031 | /* Reset the input timing to the screen. Assume always input 0. */ |
1022 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1032 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1023 | return false; |
1033 | return false; |
1024 | 1034 | ||
1025 | if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, |
1035 | if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, |
1026 | mode->clock / 10, |
1036 | mode->clock / 10, |
1027 | mode->hdisplay, |
1037 | mode->hdisplay, |
1028 | mode->vdisplay)) |
1038 | mode->vdisplay)) |
1029 | return false; |
1039 | return false; |
1030 | 1040 | ||
1031 | if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, |
1041 | if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, |
1032 | &input_dtd)) |
1042 | &input_dtd)) |
1033 | return false; |
1043 | return false; |
1034 | 1044 | ||
1035 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); |
1045 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); |
1036 | intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; |
1046 | intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; |
1037 | 1047 | ||
1038 | return true; |
1048 | return true; |
1039 | } |
1049 | } |
1040 | 1050 | ||
1041 | static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, |
1051 | static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, |
1042 | const struct drm_display_mode *mode, |
1052 | const struct drm_display_mode *mode, |
1043 | struct drm_display_mode *adjusted_mode) |
1053 | struct drm_display_mode *adjusted_mode) |
1044 | { |
1054 | { |
1045 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); |
1055 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); |
1046 | int multiplier; |
1056 | int multiplier; |
1047 | 1057 | ||
1048 | /* We need to construct preferred input timings based on our |
1058 | /* We need to construct preferred input timings based on our |
1049 | * output timings. To do that, we have to set the output |
1059 | * output timings. To do that, we have to set the output |
1050 | * timings, even though this isn't really the right place in |
1060 | * timings, even though this isn't really the right place in |
1051 | * the sequence to do it. Oh well. |
1061 | * the sequence to do it. Oh well. |
1052 | */ |
1062 | */ |
1053 | if (intel_sdvo->is_tv) { |
1063 | if (intel_sdvo->is_tv) { |
1054 | if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) |
1064 | if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) |
1055 | return false; |
1065 | return false; |
1056 | 1066 | ||
1057 | (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, |
1067 | (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, |
1058 | mode, |
1068 | mode, |
1059 | adjusted_mode); |
1069 | adjusted_mode); |
1060 | } else if (intel_sdvo->is_lvds) { |
1070 | } else if (intel_sdvo->is_lvds) { |
1061 | if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, |
1071 | if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, |
1062 | intel_sdvo->sdvo_lvds_fixed_mode)) |
1072 | intel_sdvo->sdvo_lvds_fixed_mode)) |
1063 | return false; |
1073 | return false; |
1064 | 1074 | ||
1065 | (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, |
1075 | (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, |
1066 | mode, |
1076 | mode, |
1067 | adjusted_mode); |
1077 | adjusted_mode); |
1068 | } |
1078 | } |
1069 | 1079 | ||
1070 | /* Make the CRTC code factor in the SDVO pixel multiplier. The |
1080 | /* Make the CRTC code factor in the SDVO pixel multiplier. The |
1071 | * SDVO device will factor out the multiplier during mode_set. |
1081 | * SDVO device will factor out the multiplier during mode_set. |
1072 | */ |
1082 | */ |
1073 | multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode); |
1083 | multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode); |
1074 | intel_mode_set_pixel_multiplier(adjusted_mode, multiplier); |
1084 | intel_mode_set_pixel_multiplier(adjusted_mode, multiplier); |
- | 1085 | ||
- | 1086 | if (intel_sdvo->color_range_auto) { |
|
- | 1087 | /* See CEA-861-E - 5.1 Default Encoding Parameters */ |
|
- | 1088 | if (intel_sdvo->has_hdmi_monitor && |
|
- | 1089 | drm_match_cea_mode(adjusted_mode) > 1) |
|
- | 1090 | intel_sdvo->color_range = SDVO_COLOR_RANGE_16_235; |
|
- | 1091 | else |
|
- | 1092 | intel_sdvo->color_range = 0; |
|
- | 1093 | } |
|
- | 1094 | ||
- | 1095 | if (intel_sdvo->color_range) |
|
- | 1096 | adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE; |
|
1075 | 1097 | ||
1076 | return true; |
1098 | return true; |
1077 | } |
1099 | } |
1078 | 1100 | ||
1079 | static void intel_sdvo_mode_set(struct drm_encoder *encoder, |
1101 | static void intel_sdvo_mode_set(struct drm_encoder *encoder, |
1080 | struct drm_display_mode *mode, |
1102 | struct drm_display_mode *mode, |
1081 | struct drm_display_mode *adjusted_mode) |
1103 | struct drm_display_mode *adjusted_mode) |
1082 | { |
1104 | { |
1083 | struct drm_device *dev = encoder->dev; |
1105 | struct drm_device *dev = encoder->dev; |
1084 | struct drm_i915_private *dev_priv = dev->dev_private; |
1106 | struct drm_i915_private *dev_priv = dev->dev_private; |
1085 | struct drm_crtc *crtc = encoder->crtc; |
1107 | struct drm_crtc *crtc = encoder->crtc; |
1086 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
1108 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
1087 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); |
1109 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); |
1088 | u32 sdvox; |
1110 | u32 sdvox; |
1089 | struct intel_sdvo_in_out_map in_out; |
1111 | struct intel_sdvo_in_out_map in_out; |
1090 | struct intel_sdvo_dtd input_dtd, output_dtd; |
1112 | struct intel_sdvo_dtd input_dtd, output_dtd; |
1091 | int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode); |
1113 | int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode); |
1092 | int rate; |
1114 | int rate; |
1093 | 1115 | ||
1094 | if (!mode) |
1116 | if (!mode) |
1095 | return; |
1117 | return; |
1096 | 1118 | ||
1097 | /* First, set the input mapping for the first input to our controlled |
1119 | /* First, set the input mapping for the first input to our controlled |
1098 | * output. This is only correct if we're a single-input device, in |
1120 | * output. This is only correct if we're a single-input device, in |
1099 | * which case the first input is the output from the appropriate SDVO |
1121 | * which case the first input is the output from the appropriate SDVO |
1100 | * channel on the motherboard. In a two-input device, the first input |
1122 | * channel on the motherboard. In a two-input device, the first input |
1101 | * will be SDVOB and the second SDVOC. |
1123 | * will be SDVOB and the second SDVOC. |
1102 | */ |
1124 | */ |
1103 | in_out.in0 = intel_sdvo->attached_output; |
1125 | in_out.in0 = intel_sdvo->attached_output; |
1104 | in_out.in1 = 0; |
1126 | in_out.in1 = 0; |
1105 | 1127 | ||
1106 | intel_sdvo_set_value(intel_sdvo, |
1128 | intel_sdvo_set_value(intel_sdvo, |
1107 | SDVO_CMD_SET_IN_OUT_MAP, |
1129 | SDVO_CMD_SET_IN_OUT_MAP, |
1108 | &in_out, sizeof(in_out)); |
1130 | &in_out, sizeof(in_out)); |
1109 | 1131 | ||
1110 | /* Set the output timings to the screen */ |
1132 | /* Set the output timings to the screen */ |
1111 | if (!intel_sdvo_set_target_output(intel_sdvo, |
1133 | if (!intel_sdvo_set_target_output(intel_sdvo, |
1112 | intel_sdvo->attached_output)) |
1134 | intel_sdvo->attached_output)) |
1113 | return; |
1135 | return; |
1114 | 1136 | ||
1115 | /* lvds has a special fixed output timing. */ |
1137 | /* lvds has a special fixed output timing. */ |
1116 | if (intel_sdvo->is_lvds) |
1138 | if (intel_sdvo->is_lvds) |
1117 | intel_sdvo_get_dtd_from_mode(&output_dtd, |
1139 | intel_sdvo_get_dtd_from_mode(&output_dtd, |
1118 | intel_sdvo->sdvo_lvds_fixed_mode); |
1140 | intel_sdvo->sdvo_lvds_fixed_mode); |
1119 | else |
1141 | else |
1120 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
1142 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
1121 | if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) |
1143 | if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) |
1122 | DRM_INFO("Setting output timings on %s failed\n", |
1144 | DRM_INFO("Setting output timings on %s failed\n", |
1123 | SDVO_NAME(intel_sdvo)); |
1145 | SDVO_NAME(intel_sdvo)); |
1124 | 1146 | ||
1125 | /* Set the input timing to the screen. Assume always input 0. */ |
1147 | /* Set the input timing to the screen. Assume always input 0. */ |
1126 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1148 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1127 | return; |
1149 | return; |
1128 | 1150 | ||
1129 | if (intel_sdvo->has_hdmi_monitor) { |
1151 | if (intel_sdvo->has_hdmi_monitor) { |
1130 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); |
1152 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); |
1131 | intel_sdvo_set_colorimetry(intel_sdvo, |
1153 | intel_sdvo_set_colorimetry(intel_sdvo, |
1132 | SDVO_COLORIMETRY_RGB256); |
1154 | SDVO_COLORIMETRY_RGB256); |
1133 | intel_sdvo_set_avi_infoframe(intel_sdvo); |
1155 | intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode); |
1134 | } else |
1156 | } else |
1135 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); |
1157 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); |
1136 | 1158 | ||
1137 | if (intel_sdvo->is_tv && |
1159 | if (intel_sdvo->is_tv && |
1138 | !intel_sdvo_set_tv_format(intel_sdvo)) |
1160 | !intel_sdvo_set_tv_format(intel_sdvo)) |
1139 | return; |
1161 | return; |
1140 | 1162 | ||
1141 | /* We have tried to get input timing in mode_fixup, and filled into |
1163 | /* We have tried to get input timing in mode_fixup, and filled into |
1142 | * adjusted_mode. |
1164 | * adjusted_mode. |
1143 | */ |
1165 | */ |
1144 | intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); |
1166 | intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); |
1145 | if (intel_sdvo->is_tv || intel_sdvo->is_lvds) |
1167 | if (intel_sdvo->is_tv || intel_sdvo->is_lvds) |
1146 | input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; |
1168 | input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; |
1147 | if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) |
1169 | if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) |
1148 | DRM_INFO("Setting input timings on %s failed\n", |
1170 | DRM_INFO("Setting input timings on %s failed\n", |
1149 | SDVO_NAME(intel_sdvo)); |
1171 | SDVO_NAME(intel_sdvo)); |
1150 | 1172 | ||
1151 | switch (pixel_multiplier) { |
1173 | switch (pixel_multiplier) { |
1152 | default: |
1174 | default: |
1153 | case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; |
1175 | case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; |
1154 | case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; |
1176 | case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; |
1155 | case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; |
1177 | case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; |
1156 | } |
1178 | } |
1157 | if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) |
1179 | if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) |
1158 | return; |
1180 | return; |
1159 | 1181 | ||
1160 | /* Set the SDVO control regs. */ |
1182 | /* Set the SDVO control regs. */ |
1161 | if (INTEL_INFO(dev)->gen >= 4) { |
1183 | if (INTEL_INFO(dev)->gen >= 4) { |
1162 | /* The real mode polarity is set by the SDVO commands, using |
1184 | /* The real mode polarity is set by the SDVO commands, using |
1163 | * struct intel_sdvo_dtd. */ |
1185 | * struct intel_sdvo_dtd. */ |
1164 | sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; |
1186 | sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; |
1165 | if (intel_sdvo->is_hdmi) |
1187 | if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi) |
1166 | sdvox |= intel_sdvo->color_range; |
1188 | sdvox |= intel_sdvo->color_range; |
1167 | if (INTEL_INFO(dev)->gen < 5) |
1189 | if (INTEL_INFO(dev)->gen < 5) |
1168 | sdvox |= SDVO_BORDER_ENABLE; |
1190 | sdvox |= SDVO_BORDER_ENABLE; |
1169 | } else { |
1191 | } else { |
1170 | sdvox = I915_READ(intel_sdvo->sdvo_reg); |
1192 | sdvox = I915_READ(intel_sdvo->sdvo_reg); |
1171 | switch (intel_sdvo->sdvo_reg) { |
1193 | switch (intel_sdvo->sdvo_reg) { |
1172 | case SDVOB: |
1194 | case SDVOB: |
1173 | sdvox &= SDVOB_PRESERVE_MASK; |
1195 | sdvox &= SDVOB_PRESERVE_MASK; |
1174 | break; |
1196 | break; |
1175 | case SDVOC: |
1197 | case SDVOC: |
1176 | sdvox &= SDVOC_PRESERVE_MASK; |
1198 | sdvox &= SDVOC_PRESERVE_MASK; |
1177 | break; |
1199 | break; |
1178 | } |
1200 | } |
1179 | sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; |
1201 | sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; |
1180 | } |
1202 | } |
1181 | 1203 | ||
1182 | if (INTEL_PCH_TYPE(dev) >= PCH_CPT) |
1204 | if (INTEL_PCH_TYPE(dev) >= PCH_CPT) |
1183 | sdvox |= TRANSCODER_CPT(intel_crtc->pipe); |
1205 | sdvox |= TRANSCODER_CPT(intel_crtc->pipe); |
1184 | else |
1206 | else |
1185 | sdvox |= TRANSCODER(intel_crtc->pipe); |
1207 | sdvox |= TRANSCODER(intel_crtc->pipe); |
1186 | 1208 | ||
1187 | if (intel_sdvo->has_hdmi_audio) |
1209 | if (intel_sdvo->has_hdmi_audio) |
1188 | sdvox |= SDVO_AUDIO_ENABLE; |
1210 | sdvox |= SDVO_AUDIO_ENABLE; |
1189 | 1211 | ||
1190 | if (INTEL_INFO(dev)->gen >= 4) { |
1212 | if (INTEL_INFO(dev)->gen >= 4) { |
1191 | /* done in crtc_mode_set as the dpll_md reg must be written early */ |
1213 | /* done in crtc_mode_set as the dpll_md reg must be written early */ |
1192 | } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { |
1214 | } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { |
1193 | /* done in crtc_mode_set as it lives inside the dpll register */ |
1215 | /* done in crtc_mode_set as it lives inside the dpll register */ |
1194 | } else { |
1216 | } else { |
1195 | sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT; |
1217 | sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT; |
1196 | } |
1218 | } |
1197 | 1219 | ||
1198 | if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && |
1220 | if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && |
1199 | INTEL_INFO(dev)->gen < 5) |
1221 | INTEL_INFO(dev)->gen < 5) |
1200 | sdvox |= SDVO_STALL_SELECT; |
1222 | sdvox |= SDVO_STALL_SELECT; |
1201 | intel_sdvo_write_sdvox(intel_sdvo, sdvox); |
1223 | intel_sdvo_write_sdvox(intel_sdvo, sdvox); |
1202 | } |
1224 | } |
1203 | 1225 | ||
1204 | static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) |
1226 | static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) |
1205 | { |
1227 | { |
1206 | struct intel_sdvo_connector *intel_sdvo_connector = |
1228 | struct intel_sdvo_connector *intel_sdvo_connector = |
1207 | to_intel_sdvo_connector(&connector->base); |
1229 | to_intel_sdvo_connector(&connector->base); |
1208 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base); |
1230 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base); |
1209 | u16 active_outputs; |
1231 | u16 active_outputs; |
1210 | 1232 | ||
1211 | intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); |
1233 | intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); |
1212 | 1234 | ||
1213 | if (active_outputs & intel_sdvo_connector->output_flag) |
1235 | if (active_outputs & intel_sdvo_connector->output_flag) |
1214 | return true; |
1236 | return true; |
1215 | else |
1237 | else |
1216 | return false; |
1238 | return false; |
1217 | } |
1239 | } |
1218 | 1240 | ||
1219 | static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, |
1241 | static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, |
1220 | enum pipe *pipe) |
1242 | enum pipe *pipe) |
1221 | { |
1243 | { |
1222 | struct drm_device *dev = encoder->base.dev; |
1244 | struct drm_device *dev = encoder->base.dev; |
1223 | struct drm_i915_private *dev_priv = dev->dev_private; |
1245 | struct drm_i915_private *dev_priv = dev->dev_private; |
1224 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1246 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1225 | u32 tmp; |
1247 | u32 tmp; |
1226 | 1248 | ||
1227 | tmp = I915_READ(intel_sdvo->sdvo_reg); |
1249 | tmp = I915_READ(intel_sdvo->sdvo_reg); |
1228 | 1250 | ||
1229 | if (!(tmp & SDVO_ENABLE)) |
1251 | if (!(tmp & SDVO_ENABLE)) |
1230 | return false; |
1252 | return false; |
1231 | 1253 | ||
1232 | if (HAS_PCH_CPT(dev)) |
1254 | if (HAS_PCH_CPT(dev)) |
1233 | *pipe = PORT_TO_PIPE_CPT(tmp); |
1255 | *pipe = PORT_TO_PIPE_CPT(tmp); |
1234 | else |
1256 | else |
1235 | *pipe = PORT_TO_PIPE(tmp); |
1257 | *pipe = PORT_TO_PIPE(tmp); |
1236 | 1258 | ||
1237 | return true; |
1259 | return true; |
1238 | } |
1260 | } |
1239 | 1261 | ||
1240 | static void intel_disable_sdvo(struct intel_encoder *encoder) |
1262 | static void intel_disable_sdvo(struct intel_encoder *encoder) |
1241 | { |
1263 | { |
1242 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
1264 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
1243 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1265 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1244 | u32 temp; |
1266 | u32 temp; |
1245 | 1267 | ||
1246 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
1268 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
1247 | if (0) |
1269 | if (0) |
1248 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1270 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1249 | DRM_MODE_DPMS_OFF); |
1271 | DRM_MODE_DPMS_OFF); |
1250 | 1272 | ||
1251 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1273 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1252 | if ((temp & SDVO_ENABLE) != 0) { |
1274 | if ((temp & SDVO_ENABLE) != 0) { |
1253 | /* HW workaround for IBX, we need to move the port to |
1275 | /* HW workaround for IBX, we need to move the port to |
1254 | * transcoder A before disabling it. */ |
1276 | * transcoder A before disabling it. */ |
1255 | if (HAS_PCH_IBX(encoder->base.dev)) { |
1277 | if (HAS_PCH_IBX(encoder->base.dev)) { |
1256 | struct drm_crtc *crtc = encoder->base.crtc; |
1278 | struct drm_crtc *crtc = encoder->base.crtc; |
1257 | int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1; |
1279 | int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1; |
1258 | 1280 | ||
1259 | if (temp & SDVO_PIPE_B_SELECT) { |
1281 | if (temp & SDVO_PIPE_B_SELECT) { |
1260 | temp &= ~SDVO_PIPE_B_SELECT; |
1282 | temp &= ~SDVO_PIPE_B_SELECT; |
1261 | I915_WRITE(intel_sdvo->sdvo_reg, temp); |
1283 | I915_WRITE(intel_sdvo->sdvo_reg, temp); |
1262 | POSTING_READ(intel_sdvo->sdvo_reg); |
1284 | POSTING_READ(intel_sdvo->sdvo_reg); |
1263 | 1285 | ||
1264 | /* Again we need to write this twice. */ |
1286 | /* Again we need to write this twice. */ |
1265 | I915_WRITE(intel_sdvo->sdvo_reg, temp); |
1287 | I915_WRITE(intel_sdvo->sdvo_reg, temp); |
1266 | POSTING_READ(intel_sdvo->sdvo_reg); |
1288 | POSTING_READ(intel_sdvo->sdvo_reg); |
1267 | 1289 | ||
1268 | /* Transcoder selection bits only update |
1290 | /* Transcoder selection bits only update |
1269 | * effectively on vblank. */ |
1291 | * effectively on vblank. */ |
1270 | if (crtc) |
1292 | if (crtc) |
1271 | intel_wait_for_vblank(encoder->base.dev, pipe); |
1293 | intel_wait_for_vblank(encoder->base.dev, pipe); |
1272 | else |
1294 | else |
1273 | msleep(50); |
1295 | msleep(50); |
1274 | } |
1296 | } |
1275 | } |
1297 | } |
1276 | 1298 | ||
1277 | intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE); |
1299 | intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE); |
1278 | } |
1300 | } |
1279 | } |
1301 | } |
1280 | 1302 | ||
1281 | static void intel_enable_sdvo(struct intel_encoder *encoder) |
1303 | static void intel_enable_sdvo(struct intel_encoder *encoder) |
1282 | { |
1304 | { |
1283 | struct drm_device *dev = encoder->base.dev; |
1305 | struct drm_device *dev = encoder->base.dev; |
1284 | struct drm_i915_private *dev_priv = dev->dev_private; |
1306 | struct drm_i915_private *dev_priv = dev->dev_private; |
1285 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1307 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1286 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); |
1308 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); |
1287 | u32 temp; |
1309 | u32 temp; |
1288 | bool input1, input2; |
1310 | bool input1, input2; |
1289 | int i; |
1311 | int i; |
1290 | u8 status; |
1312 | u8 status; |
1291 | 1313 | ||
1292 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1314 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1293 | if ((temp & SDVO_ENABLE) == 0) { |
1315 | if ((temp & SDVO_ENABLE) == 0) { |
1294 | /* HW workaround for IBX, we need to move the port |
1316 | /* HW workaround for IBX, we need to move the port |
1295 | * to transcoder A before disabling it. */ |
1317 | * to transcoder A before disabling it. */ |
1296 | if (HAS_PCH_IBX(dev)) { |
1318 | if (HAS_PCH_IBX(dev)) { |
1297 | struct drm_crtc *crtc = encoder->base.crtc; |
1319 | struct drm_crtc *crtc = encoder->base.crtc; |
1298 | int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1; |
1320 | int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1; |
1299 | 1321 | ||
1300 | /* Restore the transcoder select bit. */ |
1322 | /* Restore the transcoder select bit. */ |
1301 | if (pipe == PIPE_B) |
1323 | if (pipe == PIPE_B) |
1302 | temp |= SDVO_PIPE_B_SELECT; |
1324 | temp |= SDVO_PIPE_B_SELECT; |
1303 | } |
1325 | } |
1304 | 1326 | ||
1305 | intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE); |
1327 | intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE); |
1306 | } |
1328 | } |
1307 | for (i = 0; i < 2; i++) |
1329 | for (i = 0; i < 2; i++) |
1308 | intel_wait_for_vblank(dev, intel_crtc->pipe); |
1330 | intel_wait_for_vblank(dev, intel_crtc->pipe); |
1309 | 1331 | ||
1310 | status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); |
1332 | status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); |
1311 | /* Warn if the device reported failure to sync. |
1333 | /* Warn if the device reported failure to sync. |
1312 | * A lot of SDVO devices fail to notify of sync, but it's |
1334 | * A lot of SDVO devices fail to notify of sync, but it's |
1313 | * a given it the status is a success, we succeeded. |
1335 | * a given it the status is a success, we succeeded. |
1314 | */ |
1336 | */ |
1315 | if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { |
1337 | if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { |
1316 | DRM_DEBUG_KMS("First %s output reported failure to " |
1338 | DRM_DEBUG_KMS("First %s output reported failure to " |
1317 | "sync\n", SDVO_NAME(intel_sdvo)); |
1339 | "sync\n", SDVO_NAME(intel_sdvo)); |
1318 | } |
1340 | } |
1319 | 1341 | ||
1320 | if (0) |
1342 | if (0) |
1321 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1343 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1322 | DRM_MODE_DPMS_ON); |
1344 | DRM_MODE_DPMS_ON); |
1323 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
1345 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
1324 | } |
1346 | } |
1325 | 1347 | ||
1326 | static void intel_sdvo_dpms(struct drm_connector *connector, int mode) |
1348 | static void intel_sdvo_dpms(struct drm_connector *connector, int mode) |
1327 | { |
1349 | { |
1328 | struct drm_crtc *crtc; |
1350 | struct drm_crtc *crtc; |
1329 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1351 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1330 | 1352 | ||
1331 | /* dvo supports only 2 dpms states. */ |
1353 | /* dvo supports only 2 dpms states. */ |
1332 | if (mode != DRM_MODE_DPMS_ON) |
1354 | if (mode != DRM_MODE_DPMS_ON) |
1333 | mode = DRM_MODE_DPMS_OFF; |
1355 | mode = DRM_MODE_DPMS_OFF; |
1334 | 1356 | ||
1335 | if (mode == connector->dpms) |
1357 | if (mode == connector->dpms) |
1336 | return; |
1358 | return; |
1337 | 1359 | ||
1338 | connector->dpms = mode; |
1360 | connector->dpms = mode; |
1339 | 1361 | ||
1340 | /* Only need to change hw state when actually enabled */ |
1362 | /* Only need to change hw state when actually enabled */ |
1341 | crtc = intel_sdvo->base.base.crtc; |
1363 | crtc = intel_sdvo->base.base.crtc; |
1342 | if (!crtc) { |
1364 | if (!crtc) { |
1343 | intel_sdvo->base.connectors_active = false; |
1365 | intel_sdvo->base.connectors_active = false; |
1344 | return; |
1366 | return; |
1345 | } |
1367 | } |
1346 | 1368 | ||
1347 | if (mode != DRM_MODE_DPMS_ON) { |
1369 | if (mode != DRM_MODE_DPMS_ON) { |
1348 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
1370 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
1349 | if (0) |
1371 | if (0) |
1350 | intel_sdvo_set_encoder_power_state(intel_sdvo, mode); |
1372 | intel_sdvo_set_encoder_power_state(intel_sdvo, mode); |
1351 | 1373 | ||
1352 | intel_sdvo->base.connectors_active = false; |
1374 | intel_sdvo->base.connectors_active = false; |
1353 | 1375 | ||
1354 | intel_crtc_update_dpms(crtc); |
1376 | intel_crtc_update_dpms(crtc); |
1355 | } else { |
1377 | } else { |
1356 | intel_sdvo->base.connectors_active = true; |
1378 | intel_sdvo->base.connectors_active = true; |
1357 | 1379 | ||
1358 | intel_crtc_update_dpms(crtc); |
1380 | intel_crtc_update_dpms(crtc); |
1359 | 1381 | ||
1360 | if (0) |
1382 | if (0) |
1361 | intel_sdvo_set_encoder_power_state(intel_sdvo, mode); |
1383 | intel_sdvo_set_encoder_power_state(intel_sdvo, mode); |
1362 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
1384 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
1363 | } |
1385 | } |
1364 | 1386 | ||
1365 | intel_modeset_check_state(connector->dev); |
1387 | intel_modeset_check_state(connector->dev); |
1366 | } |
1388 | } |
1367 | 1389 | ||
1368 | static int intel_sdvo_mode_valid(struct drm_connector *connector, |
1390 | static int intel_sdvo_mode_valid(struct drm_connector *connector, |
1369 | struct drm_display_mode *mode) |
1391 | struct drm_display_mode *mode) |
1370 | { |
1392 | { |
1371 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1393 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1372 | 1394 | ||
1373 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
1395 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
1374 | return MODE_NO_DBLESCAN; |
1396 | return MODE_NO_DBLESCAN; |
1375 | 1397 | ||
1376 | if (intel_sdvo->pixel_clock_min > mode->clock) |
1398 | if (intel_sdvo->pixel_clock_min > mode->clock) |
1377 | return MODE_CLOCK_LOW; |
1399 | return MODE_CLOCK_LOW; |
1378 | 1400 | ||
1379 | if (intel_sdvo->pixel_clock_max < mode->clock) |
1401 | if (intel_sdvo->pixel_clock_max < mode->clock) |
1380 | return MODE_CLOCK_HIGH; |
1402 | return MODE_CLOCK_HIGH; |
1381 | 1403 | ||
1382 | if (intel_sdvo->is_lvds) { |
1404 | if (intel_sdvo->is_lvds) { |
1383 | if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) |
1405 | if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) |
1384 | return MODE_PANEL; |
1406 | return MODE_PANEL; |
1385 | 1407 | ||
1386 | if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) |
1408 | if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) |
1387 | return MODE_PANEL; |
1409 | return MODE_PANEL; |
1388 | } |
1410 | } |
1389 | 1411 | ||
1390 | return MODE_OK; |
1412 | return MODE_OK; |
1391 | } |
1413 | } |
1392 | 1414 | ||
1393 | static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) |
1415 | static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) |
1394 | { |
1416 | { |
1395 | BUILD_BUG_ON(sizeof(*caps) != 8); |
1417 | BUILD_BUG_ON(sizeof(*caps) != 8); |
1396 | if (!intel_sdvo_get_value(intel_sdvo, |
1418 | if (!intel_sdvo_get_value(intel_sdvo, |
1397 | SDVO_CMD_GET_DEVICE_CAPS, |
1419 | SDVO_CMD_GET_DEVICE_CAPS, |
1398 | caps, sizeof(*caps))) |
1420 | caps, sizeof(*caps))) |
1399 | return false; |
1421 | return false; |
1400 | 1422 | ||
1401 | DRM_DEBUG_KMS("SDVO capabilities:\n" |
1423 | DRM_DEBUG_KMS("SDVO capabilities:\n" |
1402 | " vendor_id: %d\n" |
1424 | " vendor_id: %d\n" |
1403 | " device_id: %d\n" |
1425 | " device_id: %d\n" |
1404 | " device_rev_id: %d\n" |
1426 | " device_rev_id: %d\n" |
1405 | " sdvo_version_major: %d\n" |
1427 | " sdvo_version_major: %d\n" |
1406 | " sdvo_version_minor: %d\n" |
1428 | " sdvo_version_minor: %d\n" |
1407 | " sdvo_inputs_mask: %d\n" |
1429 | " sdvo_inputs_mask: %d\n" |
1408 | " smooth_scaling: %d\n" |
1430 | " smooth_scaling: %d\n" |
1409 | " sharp_scaling: %d\n" |
1431 | " sharp_scaling: %d\n" |
1410 | " up_scaling: %d\n" |
1432 | " up_scaling: %d\n" |
1411 | " down_scaling: %d\n" |
1433 | " down_scaling: %d\n" |
1412 | " stall_support: %d\n" |
1434 | " stall_support: %d\n" |
1413 | " output_flags: %d\n", |
1435 | " output_flags: %d\n", |
1414 | caps->vendor_id, |
1436 | caps->vendor_id, |
1415 | caps->device_id, |
1437 | caps->device_id, |
1416 | caps->device_rev_id, |
1438 | caps->device_rev_id, |
1417 | caps->sdvo_version_major, |
1439 | caps->sdvo_version_major, |
1418 | caps->sdvo_version_minor, |
1440 | caps->sdvo_version_minor, |
1419 | caps->sdvo_inputs_mask, |
1441 | caps->sdvo_inputs_mask, |
1420 | caps->smooth_scaling, |
1442 | caps->smooth_scaling, |
1421 | caps->sharp_scaling, |
1443 | caps->sharp_scaling, |
1422 | caps->up_scaling, |
1444 | caps->up_scaling, |
1423 | caps->down_scaling, |
1445 | caps->down_scaling, |
1424 | caps->stall_support, |
1446 | caps->stall_support, |
1425 | caps->output_flags); |
1447 | caps->output_flags); |
1426 | 1448 | ||
1427 | return true; |
1449 | return true; |
1428 | } |
1450 | } |
1429 | 1451 | ||
1430 | static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) |
1452 | static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) |
1431 | { |
1453 | { |
1432 | struct drm_device *dev = intel_sdvo->base.base.dev; |
1454 | struct drm_device *dev = intel_sdvo->base.base.dev; |
1433 | uint16_t hotplug; |
1455 | uint16_t hotplug; |
1434 | 1456 | ||
1435 | /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise |
1457 | /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise |
1436 | * on the line. */ |
1458 | * on the line. */ |
1437 | if (IS_I945G(dev) || IS_I945GM(dev)) |
1459 | if (IS_I945G(dev) || IS_I945GM(dev)) |
1438 | return 0; |
1460 | return 0; |
1439 | 1461 | ||
1440 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, |
1462 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, |
1441 | &hotplug, sizeof(hotplug))) |
1463 | &hotplug, sizeof(hotplug))) |
1442 | return 0; |
1464 | return 0; |
1443 | 1465 | ||
1444 | return hotplug; |
1466 | return hotplug; |
1445 | } |
1467 | } |
1446 | 1468 | ||
1447 | static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) |
1469 | static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) |
1448 | { |
1470 | { |
1449 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1471 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1450 | 1472 | ||
1451 | intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, |
1473 | intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, |
1452 | &intel_sdvo->hotplug_active, 2); |
1474 | &intel_sdvo->hotplug_active, 2); |
1453 | } |
1475 | } |
1454 | 1476 | ||
1455 | static bool |
1477 | static bool |
1456 | intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) |
1478 | intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) |
1457 | { |
1479 | { |
1458 | /* Is there more than one type of output? */ |
1480 | /* Is there more than one type of output? */ |
1459 | return hweight16(intel_sdvo->caps.output_flags) > 1; |
1481 | return hweight16(intel_sdvo->caps.output_flags) > 1; |
1460 | } |
1482 | } |
1461 | 1483 | ||
1462 | static struct edid * |
1484 | static struct edid * |
1463 | intel_sdvo_get_edid(struct drm_connector *connector) |
1485 | intel_sdvo_get_edid(struct drm_connector *connector) |
1464 | { |
1486 | { |
1465 | struct intel_sdvo *sdvo = intel_attached_sdvo(connector); |
1487 | struct intel_sdvo *sdvo = intel_attached_sdvo(connector); |
1466 | return drm_get_edid(connector, &sdvo->ddc); |
1488 | return drm_get_edid(connector, &sdvo->ddc); |
1467 | } |
1489 | } |
1468 | 1490 | ||
1469 | /* Mac mini hack -- use the same DDC as the analog connector */ |
1491 | /* Mac mini hack -- use the same DDC as the analog connector */ |
1470 | static struct edid * |
1492 | static struct edid * |
1471 | intel_sdvo_get_analog_edid(struct drm_connector *connector) |
1493 | intel_sdvo_get_analog_edid(struct drm_connector *connector) |
1472 | { |
1494 | { |
1473 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1495 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1474 | 1496 | ||
1475 | return drm_get_edid(connector, |
1497 | return drm_get_edid(connector, |
1476 | intel_gmbus_get_adapter(dev_priv, |
1498 | intel_gmbus_get_adapter(dev_priv, |
1477 | dev_priv->crt_ddc_pin)); |
1499 | dev_priv->crt_ddc_pin)); |
1478 | } |
1500 | } |
1479 | 1501 | ||
1480 | static enum drm_connector_status |
1502 | static enum drm_connector_status |
1481 | intel_sdvo_tmds_sink_detect(struct drm_connector *connector) |
1503 | intel_sdvo_tmds_sink_detect(struct drm_connector *connector) |
1482 | { |
1504 | { |
1483 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1505 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1484 | enum drm_connector_status status; |
1506 | enum drm_connector_status status; |
1485 | struct edid *edid; |
1507 | struct edid *edid; |
1486 | 1508 | ||
1487 | edid = intel_sdvo_get_edid(connector); |
1509 | edid = intel_sdvo_get_edid(connector); |
1488 | 1510 | ||
1489 | if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { |
1511 | if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { |
1490 | u8 ddc, saved_ddc = intel_sdvo->ddc_bus; |
1512 | u8 ddc, saved_ddc = intel_sdvo->ddc_bus; |
1491 | 1513 | ||
1492 | /* |
1514 | /* |
1493 | * Don't use the 1 as the argument of DDC bus switch to get |
1515 | * Don't use the 1 as the argument of DDC bus switch to get |
1494 | * the EDID. It is used for SDVO SPD ROM. |
1516 | * the EDID. It is used for SDVO SPD ROM. |
1495 | */ |
1517 | */ |
1496 | for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { |
1518 | for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { |
1497 | intel_sdvo->ddc_bus = ddc; |
1519 | intel_sdvo->ddc_bus = ddc; |
1498 | edid = intel_sdvo_get_edid(connector); |
1520 | edid = intel_sdvo_get_edid(connector); |
1499 | if (edid) |
1521 | if (edid) |
1500 | break; |
1522 | break; |
1501 | } |
1523 | } |
1502 | /* |
1524 | /* |
1503 | * If we found the EDID on the other bus, |
1525 | * If we found the EDID on the other bus, |
1504 | * assume that is the correct DDC bus. |
1526 | * assume that is the correct DDC bus. |
1505 | */ |
1527 | */ |
1506 | if (edid == NULL) |
1528 | if (edid == NULL) |
1507 | intel_sdvo->ddc_bus = saved_ddc; |
1529 | intel_sdvo->ddc_bus = saved_ddc; |
1508 | } |
1530 | } |
1509 | 1531 | ||
1510 | /* |
1532 | /* |
1511 | * When there is no edid and no monitor is connected with VGA |
1533 | * When there is no edid and no monitor is connected with VGA |
1512 | * port, try to use the CRT ddc to read the EDID for DVI-connector. |
1534 | * port, try to use the CRT ddc to read the EDID for DVI-connector. |
1513 | */ |
1535 | */ |
1514 | if (edid == NULL) |
1536 | if (edid == NULL) |
1515 | edid = intel_sdvo_get_analog_edid(connector); |
1537 | edid = intel_sdvo_get_analog_edid(connector); |
1516 | 1538 | ||
1517 | status = connector_status_unknown; |
1539 | status = connector_status_unknown; |
1518 | if (edid != NULL) { |
1540 | if (edid != NULL) { |
1519 | /* DDC bus is shared, match EDID to connector type */ |
1541 | /* DDC bus is shared, match EDID to connector type */ |
1520 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { |
1542 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { |
1521 | status = connector_status_connected; |
1543 | status = connector_status_connected; |
1522 | if (intel_sdvo->is_hdmi) { |
1544 | if (intel_sdvo->is_hdmi) { |
1523 | intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); |
1545 | intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); |
1524 | intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); |
1546 | intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); |
- | 1547 | intel_sdvo->rgb_quant_range_selectable = |
|
- | 1548 | drm_rgb_quant_range_selectable(edid); |
|
1525 | } |
1549 | } |
1526 | } else |
1550 | } else |
1527 | status = connector_status_disconnected; |
1551 | status = connector_status_disconnected; |
1528 | kfree(edid); |
1552 | kfree(edid); |
1529 | } |
1553 | } |
1530 | 1554 | ||
1531 | if (status == connector_status_connected) { |
1555 | if (status == connector_status_connected) { |
1532 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1556 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1533 | if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO) |
1557 | if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO) |
1534 | intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON); |
1558 | intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON); |
1535 | } |
1559 | } |
1536 | 1560 | ||
1537 | return status; |
1561 | return status; |
1538 | } |
1562 | } |
1539 | 1563 | ||
1540 | static bool |
1564 | static bool |
1541 | intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, |
1565 | intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, |
1542 | struct edid *edid) |
1566 | struct edid *edid) |
1543 | { |
1567 | { |
1544 | bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); |
1568 | bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); |
1545 | bool connector_is_digital = !!IS_DIGITAL(sdvo); |
1569 | bool connector_is_digital = !!IS_DIGITAL(sdvo); |
1546 | 1570 | ||
1547 | DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", |
1571 | DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", |
1548 | connector_is_digital, monitor_is_digital); |
1572 | connector_is_digital, monitor_is_digital); |
1549 | return connector_is_digital == monitor_is_digital; |
1573 | return connector_is_digital == monitor_is_digital; |
1550 | } |
1574 | } |
1551 | 1575 | ||
1552 | static enum drm_connector_status |
1576 | static enum drm_connector_status |
1553 | intel_sdvo_detect(struct drm_connector *connector, bool force) |
1577 | intel_sdvo_detect(struct drm_connector *connector, bool force) |
1554 | { |
1578 | { |
1555 | uint16_t response; |
1579 | uint16_t response; |
1556 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1580 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1557 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1581 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1558 | enum drm_connector_status ret; |
1582 | enum drm_connector_status ret; |
1559 | 1583 | ||
1560 | if (!intel_sdvo_get_value(intel_sdvo, |
1584 | if (!intel_sdvo_get_value(intel_sdvo, |
1561 | SDVO_CMD_GET_ATTACHED_DISPLAYS, |
1585 | SDVO_CMD_GET_ATTACHED_DISPLAYS, |
1562 | &response, 2)) |
1586 | &response, 2)) |
1563 | return connector_status_unknown; |
1587 | return connector_status_unknown; |
1564 | 1588 | ||
1565 | DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", |
1589 | DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", |
1566 | response & 0xff, response >> 8, |
1590 | response & 0xff, response >> 8, |
1567 | intel_sdvo_connector->output_flag); |
1591 | intel_sdvo_connector->output_flag); |
1568 | 1592 | ||
1569 | if (response == 0) |
1593 | if (response == 0) |
1570 | return connector_status_disconnected; |
1594 | return connector_status_disconnected; |
1571 | 1595 | ||
1572 | intel_sdvo->attached_output = response; |
1596 | intel_sdvo->attached_output = response; |
1573 | 1597 | ||
1574 | intel_sdvo->has_hdmi_monitor = false; |
1598 | intel_sdvo->has_hdmi_monitor = false; |
1575 | intel_sdvo->has_hdmi_audio = false; |
1599 | intel_sdvo->has_hdmi_audio = false; |
- | 1600 | intel_sdvo->rgb_quant_range_selectable = false; |
|
1576 | 1601 | ||
1577 | if ((intel_sdvo_connector->output_flag & response) == 0) |
1602 | if ((intel_sdvo_connector->output_flag & response) == 0) |
1578 | ret = connector_status_disconnected; |
1603 | ret = connector_status_disconnected; |
1579 | else if (IS_TMDS(intel_sdvo_connector)) |
1604 | else if (IS_TMDS(intel_sdvo_connector)) |
1580 | ret = intel_sdvo_tmds_sink_detect(connector); |
1605 | ret = intel_sdvo_tmds_sink_detect(connector); |
1581 | else { |
1606 | else { |
1582 | struct edid *edid; |
1607 | struct edid *edid; |
1583 | 1608 | ||
1584 | /* if we have an edid check it matches the connection */ |
1609 | /* if we have an edid check it matches the connection */ |
1585 | edid = intel_sdvo_get_edid(connector); |
1610 | edid = intel_sdvo_get_edid(connector); |
1586 | if (edid == NULL) |
1611 | if (edid == NULL) |
1587 | edid = intel_sdvo_get_analog_edid(connector); |
1612 | edid = intel_sdvo_get_analog_edid(connector); |
1588 | if (edid != NULL) { |
1613 | if (edid != NULL) { |
1589 | if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, |
1614 | if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, |
1590 | edid)) |
1615 | edid)) |
1591 | ret = connector_status_connected; |
1616 | ret = connector_status_connected; |
1592 | else |
1617 | else |
1593 | ret = connector_status_disconnected; |
1618 | ret = connector_status_disconnected; |
1594 | 1619 | ||
1595 | kfree(edid); |
1620 | kfree(edid); |
1596 | } else |
1621 | } else |
1597 | ret = connector_status_connected; |
1622 | ret = connector_status_connected; |
1598 | } |
1623 | } |
1599 | 1624 | ||
1600 | /* May update encoder flag for like clock for SDVO TV, etc.*/ |
1625 | /* May update encoder flag for like clock for SDVO TV, etc.*/ |
1601 | if (ret == connector_status_connected) { |
1626 | if (ret == connector_status_connected) { |
1602 | intel_sdvo->is_tv = false; |
1627 | intel_sdvo->is_tv = false; |
1603 | intel_sdvo->is_lvds = false; |
1628 | intel_sdvo->is_lvds = false; |
1604 | intel_sdvo->base.needs_tv_clock = false; |
1629 | intel_sdvo->base.needs_tv_clock = false; |
1605 | 1630 | ||
1606 | if (response & SDVO_TV_MASK) { |
1631 | if (response & SDVO_TV_MASK) { |
1607 | intel_sdvo->is_tv = true; |
1632 | intel_sdvo->is_tv = true; |
1608 | intel_sdvo->base.needs_tv_clock = true; |
1633 | intel_sdvo->base.needs_tv_clock = true; |
1609 | } |
1634 | } |
1610 | if (response & SDVO_LVDS_MASK) |
1635 | if (response & SDVO_LVDS_MASK) |
1611 | intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; |
1636 | intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; |
1612 | } |
1637 | } |
1613 | 1638 | ||
1614 | return ret; |
1639 | return ret; |
1615 | } |
1640 | } |
1616 | 1641 | ||
1617 | static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) |
1642 | static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) |
1618 | { |
1643 | { |
1619 | struct edid *edid; |
1644 | struct edid *edid; |
1620 | 1645 | ||
1621 | /* set the bus switch and get the modes */ |
1646 | /* set the bus switch and get the modes */ |
1622 | edid = intel_sdvo_get_edid(connector); |
1647 | edid = intel_sdvo_get_edid(connector); |
1623 | 1648 | ||
1624 | /* |
1649 | /* |
1625 | * Mac mini hack. On this device, the DVI-I connector shares one DDC |
1650 | * Mac mini hack. On this device, the DVI-I connector shares one DDC |
1626 | * link between analog and digital outputs. So, if the regular SDVO |
1651 | * link between analog and digital outputs. So, if the regular SDVO |
1627 | * DDC fails, check to see if the analog output is disconnected, in |
1652 | * DDC fails, check to see if the analog output is disconnected, in |
1628 | * which case we'll look there for the digital DDC data. |
1653 | * which case we'll look there for the digital DDC data. |
1629 | */ |
1654 | */ |
1630 | if (edid == NULL) |
1655 | if (edid == NULL) |
1631 | edid = intel_sdvo_get_analog_edid(connector); |
1656 | edid = intel_sdvo_get_analog_edid(connector); |
1632 | 1657 | ||
1633 | if (edid != NULL) { |
1658 | if (edid != NULL) { |
1634 | if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), |
1659 | if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), |
1635 | edid)) { |
1660 | edid)) { |
1636 | drm_mode_connector_update_edid_property(connector, edid); |
1661 | drm_mode_connector_update_edid_property(connector, edid); |
1637 | drm_add_edid_modes(connector, edid); |
1662 | drm_add_edid_modes(connector, edid); |
1638 | } |
1663 | } |
1639 | 1664 | ||
1640 | kfree(edid); |
1665 | kfree(edid); |
1641 | } |
1666 | } |
1642 | } |
1667 | } |
1643 | 1668 | ||
1644 | /* |
1669 | /* |
1645 | * Set of SDVO TV modes. |
1670 | * Set of SDVO TV modes. |
1646 | * Note! This is in reply order (see loop in get_tv_modes). |
1671 | * Note! This is in reply order (see loop in get_tv_modes). |
1647 | * XXX: all 60Hz refresh? |
1672 | * XXX: all 60Hz refresh? |
1648 | */ |
1673 | */ |
1649 | static const struct drm_display_mode sdvo_tv_modes[] = { |
1674 | static const struct drm_display_mode sdvo_tv_modes[] = { |
1650 | { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, |
1675 | { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, |
1651 | 416, 0, 200, 201, 232, 233, 0, |
1676 | 416, 0, 200, 201, 232, 233, 0, |
1652 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1677 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1653 | { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, |
1678 | { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, |
1654 | 416, 0, 240, 241, 272, 273, 0, |
1679 | 416, 0, 240, 241, 272, 273, 0, |
1655 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1680 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1656 | { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, |
1681 | { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, |
1657 | 496, 0, 300, 301, 332, 333, 0, |
1682 | 496, 0, 300, 301, 332, 333, 0, |
1658 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1683 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1659 | { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, |
1684 | { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, |
1660 | 736, 0, 350, 351, 382, 383, 0, |
1685 | 736, 0, 350, 351, 382, 383, 0, |
1661 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1686 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1662 | { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, |
1687 | { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, |
1663 | 736, 0, 400, 401, 432, 433, 0, |
1688 | 736, 0, 400, 401, 432, 433, 0, |
1664 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1689 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1665 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, |
1690 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, |
1666 | 736, 0, 480, 481, 512, 513, 0, |
1691 | 736, 0, 480, 481, 512, 513, 0, |
1667 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1692 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1668 | { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, |
1693 | { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, |
1669 | 800, 0, 480, 481, 512, 513, 0, |
1694 | 800, 0, 480, 481, 512, 513, 0, |
1670 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1695 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1671 | { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, |
1696 | { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, |
1672 | 800, 0, 576, 577, 608, 609, 0, |
1697 | 800, 0, 576, 577, 608, 609, 0, |
1673 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1698 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1674 | { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, |
1699 | { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, |
1675 | 816, 0, 350, 351, 382, 383, 0, |
1700 | 816, 0, 350, 351, 382, 383, 0, |
1676 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1701 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1677 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, |
1702 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, |
1678 | 816, 0, 400, 401, 432, 433, 0, |
1703 | 816, 0, 400, 401, 432, 433, 0, |
1679 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1704 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1680 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, |
1705 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, |
1681 | 816, 0, 480, 481, 512, 513, 0, |
1706 | 816, 0, 480, 481, 512, 513, 0, |
1682 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1707 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1683 | { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, |
1708 | { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, |
1684 | 816, 0, 540, 541, 572, 573, 0, |
1709 | 816, 0, 540, 541, 572, 573, 0, |
1685 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1710 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1686 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, |
1711 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, |
1687 | 816, 0, 576, 577, 608, 609, 0, |
1712 | 816, 0, 576, 577, 608, 609, 0, |
1688 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1713 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1689 | { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, |
1714 | { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, |
1690 | 864, 0, 576, 577, 608, 609, 0, |
1715 | 864, 0, 576, 577, 608, 609, 0, |
1691 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1716 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1692 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, |
1717 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, |
1693 | 896, 0, 600, 601, 632, 633, 0, |
1718 | 896, 0, 600, 601, 632, 633, 0, |
1694 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1719 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1695 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, |
1720 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, |
1696 | 928, 0, 624, 625, 656, 657, 0, |
1721 | 928, 0, 624, 625, 656, 657, 0, |
1697 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1722 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1698 | { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, |
1723 | { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, |
1699 | 1016, 0, 766, 767, 798, 799, 0, |
1724 | 1016, 0, 766, 767, 798, 799, 0, |
1700 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1725 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1701 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, |
1726 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, |
1702 | 1120, 0, 768, 769, 800, 801, 0, |
1727 | 1120, 0, 768, 769, 800, 801, 0, |
1703 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1728 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1704 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, |
1729 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, |
1705 | 1376, 0, 1024, 1025, 1056, 1057, 0, |
1730 | 1376, 0, 1024, 1025, 1056, 1057, 0, |
1706 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1731 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1707 | }; |
1732 | }; |
1708 | 1733 | ||
1709 | static void intel_sdvo_get_tv_modes(struct drm_connector *connector) |
1734 | static void intel_sdvo_get_tv_modes(struct drm_connector *connector) |
1710 | { |
1735 | { |
1711 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1736 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1712 | struct intel_sdvo_sdtv_resolution_request tv_res; |
1737 | struct intel_sdvo_sdtv_resolution_request tv_res; |
1713 | uint32_t reply = 0, format_map = 0; |
1738 | uint32_t reply = 0, format_map = 0; |
1714 | int i; |
1739 | int i; |
1715 | 1740 | ||
1716 | /* Read the list of supported input resolutions for the selected TV |
1741 | /* Read the list of supported input resolutions for the selected TV |
1717 | * format. |
1742 | * format. |
1718 | */ |
1743 | */ |
1719 | format_map = 1 << intel_sdvo->tv_format_index; |
1744 | format_map = 1 << intel_sdvo->tv_format_index; |
1720 | memcpy(&tv_res, &format_map, |
1745 | memcpy(&tv_res, &format_map, |
1721 | min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); |
1746 | min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); |
1722 | 1747 | ||
1723 | if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) |
1748 | if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) |
1724 | return; |
1749 | return; |
1725 | 1750 | ||
1726 | BUILD_BUG_ON(sizeof(tv_res) != 3); |
1751 | BUILD_BUG_ON(sizeof(tv_res) != 3); |
1727 | if (!intel_sdvo_write_cmd(intel_sdvo, |
1752 | if (!intel_sdvo_write_cmd(intel_sdvo, |
1728 | SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, |
1753 | SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, |
1729 | &tv_res, sizeof(tv_res))) |
1754 | &tv_res, sizeof(tv_res))) |
1730 | return; |
1755 | return; |
1731 | if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) |
1756 | if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) |
1732 | return; |
1757 | return; |
1733 | 1758 | ||
1734 | for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) |
1759 | for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) |
1735 | if (reply & (1 << i)) { |
1760 | if (reply & (1 << i)) { |
1736 | struct drm_display_mode *nmode; |
1761 | struct drm_display_mode *nmode; |
1737 | nmode = drm_mode_duplicate(connector->dev, |
1762 | nmode = drm_mode_duplicate(connector->dev, |
1738 | &sdvo_tv_modes[i]); |
1763 | &sdvo_tv_modes[i]); |
1739 | if (nmode) |
1764 | if (nmode) |
1740 | drm_mode_probed_add(connector, nmode); |
1765 | drm_mode_probed_add(connector, nmode); |
1741 | } |
1766 | } |
1742 | } |
1767 | } |
1743 | 1768 | ||
1744 | static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) |
1769 | static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) |
1745 | { |
1770 | { |
1746 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1771 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1747 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1772 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1748 | struct drm_display_mode *newmode; |
1773 | struct drm_display_mode *newmode; |
1749 | 1774 | ||
1750 | /* |
1775 | /* |
1751 | * Attempt to get the mode list from DDC. |
1776 | * Attempt to get the mode list from DDC. |
1752 | * Assume that the preferred modes are |
1777 | * Assume that the preferred modes are |
1753 | * arranged in priority order. |
1778 | * arranged in priority order. |
1754 | */ |
1779 | */ |
1755 | intel_ddc_get_modes(connector, intel_sdvo->i2c); |
1780 | intel_ddc_get_modes(connector, intel_sdvo->i2c); |
1756 | if (list_empty(&connector->probed_modes) == false) |
1781 | if (list_empty(&connector->probed_modes) == false) |
1757 | goto end; |
1782 | goto end; |
1758 | 1783 | ||
1759 | /* Fetch modes from VBT */ |
1784 | /* Fetch modes from VBT */ |
1760 | if (dev_priv->sdvo_lvds_vbt_mode != NULL) { |
1785 | if (dev_priv->sdvo_lvds_vbt_mode != NULL) { |
1761 | newmode = drm_mode_duplicate(connector->dev, |
1786 | newmode = drm_mode_duplicate(connector->dev, |
1762 | dev_priv->sdvo_lvds_vbt_mode); |
1787 | dev_priv->sdvo_lvds_vbt_mode); |
1763 | if (newmode != NULL) { |
1788 | if (newmode != NULL) { |
1764 | /* Guarantee the mode is preferred */ |
1789 | /* Guarantee the mode is preferred */ |
1765 | newmode->type = (DRM_MODE_TYPE_PREFERRED | |
1790 | newmode->type = (DRM_MODE_TYPE_PREFERRED | |
1766 | DRM_MODE_TYPE_DRIVER); |
1791 | DRM_MODE_TYPE_DRIVER); |
1767 | drm_mode_probed_add(connector, newmode); |
1792 | drm_mode_probed_add(connector, newmode); |
1768 | } |
1793 | } |
1769 | } |
1794 | } |
1770 | 1795 | ||
1771 | end: |
1796 | end: |
1772 | list_for_each_entry(newmode, &connector->probed_modes, head) { |
1797 | list_for_each_entry(newmode, &connector->probed_modes, head) { |
1773 | if (newmode->type & DRM_MODE_TYPE_PREFERRED) { |
1798 | if (newmode->type & DRM_MODE_TYPE_PREFERRED) { |
1774 | intel_sdvo->sdvo_lvds_fixed_mode = |
1799 | intel_sdvo->sdvo_lvds_fixed_mode = |
1775 | drm_mode_duplicate(connector->dev, newmode); |
1800 | drm_mode_duplicate(connector->dev, newmode); |
1776 | 1801 | ||
1777 | intel_sdvo->is_lvds = true; |
1802 | intel_sdvo->is_lvds = true; |
1778 | break; |
1803 | break; |
1779 | } |
1804 | } |
1780 | } |
1805 | } |
1781 | 1806 | ||
1782 | } |
1807 | } |
1783 | 1808 | ||
1784 | static int intel_sdvo_get_modes(struct drm_connector *connector) |
1809 | static int intel_sdvo_get_modes(struct drm_connector *connector) |
1785 | { |
1810 | { |
1786 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1811 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1787 | 1812 | ||
1788 | if (IS_TV(intel_sdvo_connector)) |
1813 | if (IS_TV(intel_sdvo_connector)) |
1789 | intel_sdvo_get_tv_modes(connector); |
1814 | intel_sdvo_get_tv_modes(connector); |
1790 | else if (IS_LVDS(intel_sdvo_connector)) |
1815 | else if (IS_LVDS(intel_sdvo_connector)) |
1791 | intel_sdvo_get_lvds_modes(connector); |
1816 | intel_sdvo_get_lvds_modes(connector); |
1792 | else |
1817 | else |
1793 | intel_sdvo_get_ddc_modes(connector); |
1818 | intel_sdvo_get_ddc_modes(connector); |
1794 | 1819 | ||
1795 | return !list_empty(&connector->probed_modes); |
1820 | return !list_empty(&connector->probed_modes); |
1796 | } |
1821 | } |
1797 | 1822 | ||
1798 | static void |
1823 | static void |
1799 | intel_sdvo_destroy_enhance_property(struct drm_connector *connector) |
1824 | intel_sdvo_destroy_enhance_property(struct drm_connector *connector) |
1800 | { |
1825 | { |
1801 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1826 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1802 | struct drm_device *dev = connector->dev; |
1827 | struct drm_device *dev = connector->dev; |
1803 | 1828 | ||
1804 | if (intel_sdvo_connector->left) |
1829 | if (intel_sdvo_connector->left) |
1805 | drm_property_destroy(dev, intel_sdvo_connector->left); |
1830 | drm_property_destroy(dev, intel_sdvo_connector->left); |
1806 | if (intel_sdvo_connector->right) |
1831 | if (intel_sdvo_connector->right) |
1807 | drm_property_destroy(dev, intel_sdvo_connector->right); |
1832 | drm_property_destroy(dev, intel_sdvo_connector->right); |
1808 | if (intel_sdvo_connector->top) |
1833 | if (intel_sdvo_connector->top) |
1809 | drm_property_destroy(dev, intel_sdvo_connector->top); |
1834 | drm_property_destroy(dev, intel_sdvo_connector->top); |
1810 | if (intel_sdvo_connector->bottom) |
1835 | if (intel_sdvo_connector->bottom) |
1811 | drm_property_destroy(dev, intel_sdvo_connector->bottom); |
1836 | drm_property_destroy(dev, intel_sdvo_connector->bottom); |
1812 | if (intel_sdvo_connector->hpos) |
1837 | if (intel_sdvo_connector->hpos) |
1813 | drm_property_destroy(dev, intel_sdvo_connector->hpos); |
1838 | drm_property_destroy(dev, intel_sdvo_connector->hpos); |
1814 | if (intel_sdvo_connector->vpos) |
1839 | if (intel_sdvo_connector->vpos) |
1815 | drm_property_destroy(dev, intel_sdvo_connector->vpos); |
1840 | drm_property_destroy(dev, intel_sdvo_connector->vpos); |
1816 | if (intel_sdvo_connector->saturation) |
1841 | if (intel_sdvo_connector->saturation) |
1817 | drm_property_destroy(dev, intel_sdvo_connector->saturation); |
1842 | drm_property_destroy(dev, intel_sdvo_connector->saturation); |
1818 | if (intel_sdvo_connector->contrast) |
1843 | if (intel_sdvo_connector->contrast) |
1819 | drm_property_destroy(dev, intel_sdvo_connector->contrast); |
1844 | drm_property_destroy(dev, intel_sdvo_connector->contrast); |
1820 | if (intel_sdvo_connector->hue) |
1845 | if (intel_sdvo_connector->hue) |
1821 | drm_property_destroy(dev, intel_sdvo_connector->hue); |
1846 | drm_property_destroy(dev, intel_sdvo_connector->hue); |
1822 | if (intel_sdvo_connector->sharpness) |
1847 | if (intel_sdvo_connector->sharpness) |
1823 | drm_property_destroy(dev, intel_sdvo_connector->sharpness); |
1848 | drm_property_destroy(dev, intel_sdvo_connector->sharpness); |
1824 | if (intel_sdvo_connector->flicker_filter) |
1849 | if (intel_sdvo_connector->flicker_filter) |
1825 | drm_property_destroy(dev, intel_sdvo_connector->flicker_filter); |
1850 | drm_property_destroy(dev, intel_sdvo_connector->flicker_filter); |
1826 | if (intel_sdvo_connector->flicker_filter_2d) |
1851 | if (intel_sdvo_connector->flicker_filter_2d) |
1827 | drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d); |
1852 | drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d); |
1828 | if (intel_sdvo_connector->flicker_filter_adaptive) |
1853 | if (intel_sdvo_connector->flicker_filter_adaptive) |
1829 | drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive); |
1854 | drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive); |
1830 | if (intel_sdvo_connector->tv_luma_filter) |
1855 | if (intel_sdvo_connector->tv_luma_filter) |
1831 | drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter); |
1856 | drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter); |
1832 | if (intel_sdvo_connector->tv_chroma_filter) |
1857 | if (intel_sdvo_connector->tv_chroma_filter) |
1833 | drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter); |
1858 | drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter); |
1834 | if (intel_sdvo_connector->dot_crawl) |
1859 | if (intel_sdvo_connector->dot_crawl) |
1835 | drm_property_destroy(dev, intel_sdvo_connector->dot_crawl); |
1860 | drm_property_destroy(dev, intel_sdvo_connector->dot_crawl); |
1836 | if (intel_sdvo_connector->brightness) |
1861 | if (intel_sdvo_connector->brightness) |
1837 | drm_property_destroy(dev, intel_sdvo_connector->brightness); |
1862 | drm_property_destroy(dev, intel_sdvo_connector->brightness); |
1838 | } |
1863 | } |
1839 | 1864 | ||
1840 | static void intel_sdvo_destroy(struct drm_connector *connector) |
1865 | static void intel_sdvo_destroy(struct drm_connector *connector) |
1841 | { |
1866 | { |
1842 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1867 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1843 | 1868 | ||
1844 | if (intel_sdvo_connector->tv_format) |
1869 | if (intel_sdvo_connector->tv_format) |
1845 | drm_property_destroy(connector->dev, |
1870 | drm_property_destroy(connector->dev, |
1846 | intel_sdvo_connector->tv_format); |
1871 | intel_sdvo_connector->tv_format); |
1847 | 1872 | ||
1848 | intel_sdvo_destroy_enhance_property(connector); |
1873 | intel_sdvo_destroy_enhance_property(connector); |
1849 | drm_sysfs_connector_remove(connector); |
1874 | drm_sysfs_connector_remove(connector); |
1850 | drm_connector_cleanup(connector); |
1875 | drm_connector_cleanup(connector); |
1851 | kfree(intel_sdvo_connector); |
1876 | kfree(intel_sdvo_connector); |
1852 | } |
1877 | } |
1853 | 1878 | ||
1854 | static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) |
1879 | static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) |
1855 | { |
1880 | { |
1856 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1881 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1857 | struct edid *edid; |
1882 | struct edid *edid; |
1858 | bool has_audio = false; |
1883 | bool has_audio = false; |
1859 | 1884 | ||
1860 | if (!intel_sdvo->is_hdmi) |
1885 | if (!intel_sdvo->is_hdmi) |
1861 | return false; |
1886 | return false; |
1862 | 1887 | ||
1863 | edid = intel_sdvo_get_edid(connector); |
1888 | edid = intel_sdvo_get_edid(connector); |
1864 | if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) |
1889 | if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) |
1865 | has_audio = drm_detect_monitor_audio(edid); |
1890 | has_audio = drm_detect_monitor_audio(edid); |
1866 | kfree(edid); |
1891 | kfree(edid); |
1867 | 1892 | ||
1868 | return has_audio; |
1893 | return has_audio; |
1869 | } |
1894 | } |
1870 | 1895 | ||
1871 | static int |
1896 | static int |
1872 | intel_sdvo_set_property(struct drm_connector *connector, |
1897 | intel_sdvo_set_property(struct drm_connector *connector, |
1873 | struct drm_property *property, |
1898 | struct drm_property *property, |
1874 | uint64_t val) |
1899 | uint64_t val) |
1875 | { |
1900 | { |
1876 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1901 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1877 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1902 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1878 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1903 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1879 | uint16_t temp_value; |
1904 | uint16_t temp_value; |
1880 | uint8_t cmd; |
1905 | uint8_t cmd; |
1881 | int ret; |
1906 | int ret; |
1882 | 1907 | ||
1883 | ret = drm_object_property_set_value(&connector->base, property, val); |
1908 | ret = drm_object_property_set_value(&connector->base, property, val); |
1884 | if (ret) |
1909 | if (ret) |
1885 | return ret; |
1910 | return ret; |
1886 | - | ||
1887 | #if 0 |
1911 | |
1888 | if (property == dev_priv->force_audio_property) { |
1912 | if (property == dev_priv->force_audio_property) { |
1889 | int i = val; |
1913 | int i = val; |
1890 | bool has_audio; |
1914 | bool has_audio; |
1891 | 1915 | ||
1892 | if (i == intel_sdvo_connector->force_audio) |
1916 | if (i == intel_sdvo_connector->force_audio) |
1893 | return 0; |
1917 | return 0; |
1894 | 1918 | ||
1895 | intel_sdvo_connector->force_audio = i; |
1919 | intel_sdvo_connector->force_audio = i; |
1896 | 1920 | ||
1897 | if (i == HDMI_AUDIO_AUTO) |
1921 | if (i == HDMI_AUDIO_AUTO) |
1898 | has_audio = intel_sdvo_detect_hdmi_audio(connector); |
1922 | has_audio = intel_sdvo_detect_hdmi_audio(connector); |
1899 | else |
1923 | else |
1900 | has_audio = (i == HDMI_AUDIO_ON); |
1924 | has_audio = (i == HDMI_AUDIO_ON); |
1901 | 1925 | ||
1902 | if (has_audio == intel_sdvo->has_hdmi_audio) |
1926 | if (has_audio == intel_sdvo->has_hdmi_audio) |
1903 | return 0; |
1927 | return 0; |
1904 | 1928 | ||
1905 | intel_sdvo->has_hdmi_audio = has_audio; |
1929 | intel_sdvo->has_hdmi_audio = has_audio; |
1906 | goto done; |
1930 | goto done; |
1907 | } |
1931 | } |
1908 | 1932 | ||
1909 | if (property == dev_priv->broadcast_rgb_property) { |
1933 | if (property == dev_priv->broadcast_rgb_property) { |
- | 1934 | switch (val) { |
|
- | 1935 | case INTEL_BROADCAST_RGB_AUTO: |
|
1910 | if (val == !!intel_sdvo->color_range) |
1936 | intel_sdvo->color_range_auto = true; |
1911 | return 0; |
1937 | break; |
- | 1938 | case INTEL_BROADCAST_RGB_FULL: |
|
- | 1939 | intel_sdvo->color_range_auto = false; |
|
- | 1940 | intel_sdvo->color_range = 0; |
|
1912 | 1941 | break; |
|
- | 1942 | case INTEL_BROADCAST_RGB_LIMITED: |
|
- | 1943 | intel_sdvo->color_range_auto = false; |
|
1913 | intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0; |
1944 | intel_sdvo->color_range = SDVO_COLOR_RANGE_16_235; |
- | 1945 | break; |
|
- | 1946 | default: |
|
- | 1947 | return -EINVAL; |
|
- | 1948 | } |
|
1914 | goto done; |
1949 | goto done; |
1915 | } |
1950 | } |
1916 | #endif |
- | |
1917 | 1951 | ||
1918 | #define CHECK_PROPERTY(name, NAME) \ |
1952 | #define CHECK_PROPERTY(name, NAME) \ |
1919 | if (intel_sdvo_connector->name == property) { \ |
1953 | if (intel_sdvo_connector->name == property) { \ |
1920 | if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ |
1954 | if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ |
1921 | if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ |
1955 | if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ |
1922 | cmd = SDVO_CMD_SET_##NAME; \ |
1956 | cmd = SDVO_CMD_SET_##NAME; \ |
1923 | intel_sdvo_connector->cur_##name = temp_value; \ |
1957 | intel_sdvo_connector->cur_##name = temp_value; \ |
1924 | goto set_value; \ |
1958 | goto set_value; \ |
1925 | } |
1959 | } |
1926 | 1960 | ||
1927 | if (property == intel_sdvo_connector->tv_format) { |
1961 | if (property == intel_sdvo_connector->tv_format) { |
1928 | if (val >= TV_FORMAT_NUM) |
1962 | if (val >= TV_FORMAT_NUM) |
1929 | return -EINVAL; |
1963 | return -EINVAL; |
1930 | 1964 | ||
1931 | if (intel_sdvo->tv_format_index == |
1965 | if (intel_sdvo->tv_format_index == |
1932 | intel_sdvo_connector->tv_format_supported[val]) |
1966 | intel_sdvo_connector->tv_format_supported[val]) |
1933 | return 0; |
1967 | return 0; |
1934 | 1968 | ||
1935 | intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val]; |
1969 | intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val]; |
1936 | goto done; |
1970 | goto done; |
1937 | } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) { |
1971 | } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) { |
1938 | temp_value = val; |
1972 | temp_value = val; |
1939 | if (intel_sdvo_connector->left == property) { |
1973 | if (intel_sdvo_connector->left == property) { |
1940 | drm_object_property_set_value(&connector->base, |
1974 | drm_object_property_set_value(&connector->base, |
1941 | intel_sdvo_connector->right, val); |
1975 | intel_sdvo_connector->right, val); |
1942 | if (intel_sdvo_connector->left_margin == temp_value) |
1976 | if (intel_sdvo_connector->left_margin == temp_value) |
1943 | return 0; |
1977 | return 0; |
1944 | 1978 | ||
1945 | intel_sdvo_connector->left_margin = temp_value; |
1979 | intel_sdvo_connector->left_margin = temp_value; |
1946 | intel_sdvo_connector->right_margin = temp_value; |
1980 | intel_sdvo_connector->right_margin = temp_value; |
1947 | temp_value = intel_sdvo_connector->max_hscan - |
1981 | temp_value = intel_sdvo_connector->max_hscan - |
1948 | intel_sdvo_connector->left_margin; |
1982 | intel_sdvo_connector->left_margin; |
1949 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
1983 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
1950 | goto set_value; |
1984 | goto set_value; |
1951 | } else if (intel_sdvo_connector->right == property) { |
1985 | } else if (intel_sdvo_connector->right == property) { |
1952 | drm_object_property_set_value(&connector->base, |
1986 | drm_object_property_set_value(&connector->base, |
1953 | intel_sdvo_connector->left, val); |
1987 | intel_sdvo_connector->left, val); |
1954 | if (intel_sdvo_connector->right_margin == temp_value) |
1988 | if (intel_sdvo_connector->right_margin == temp_value) |
1955 | return 0; |
1989 | return 0; |
1956 | 1990 | ||
1957 | intel_sdvo_connector->left_margin = temp_value; |
1991 | intel_sdvo_connector->left_margin = temp_value; |
1958 | intel_sdvo_connector->right_margin = temp_value; |
1992 | intel_sdvo_connector->right_margin = temp_value; |
1959 | temp_value = intel_sdvo_connector->max_hscan - |
1993 | temp_value = intel_sdvo_connector->max_hscan - |
1960 | intel_sdvo_connector->left_margin; |
1994 | intel_sdvo_connector->left_margin; |
1961 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
1995 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
1962 | goto set_value; |
1996 | goto set_value; |
1963 | } else if (intel_sdvo_connector->top == property) { |
1997 | } else if (intel_sdvo_connector->top == property) { |
1964 | drm_object_property_set_value(&connector->base, |
1998 | drm_object_property_set_value(&connector->base, |
1965 | intel_sdvo_connector->bottom, val); |
1999 | intel_sdvo_connector->bottom, val); |
1966 | if (intel_sdvo_connector->top_margin == temp_value) |
2000 | if (intel_sdvo_connector->top_margin == temp_value) |
1967 | return 0; |
2001 | return 0; |
1968 | 2002 | ||
1969 | intel_sdvo_connector->top_margin = temp_value; |
2003 | intel_sdvo_connector->top_margin = temp_value; |
1970 | intel_sdvo_connector->bottom_margin = temp_value; |
2004 | intel_sdvo_connector->bottom_margin = temp_value; |
1971 | temp_value = intel_sdvo_connector->max_vscan - |
2005 | temp_value = intel_sdvo_connector->max_vscan - |
1972 | intel_sdvo_connector->top_margin; |
2006 | intel_sdvo_connector->top_margin; |
1973 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
2007 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
1974 | goto set_value; |
2008 | goto set_value; |
1975 | } else if (intel_sdvo_connector->bottom == property) { |
2009 | } else if (intel_sdvo_connector->bottom == property) { |
1976 | drm_object_property_set_value(&connector->base, |
2010 | drm_object_property_set_value(&connector->base, |
1977 | intel_sdvo_connector->top, val); |
2011 | intel_sdvo_connector->top, val); |
1978 | if (intel_sdvo_connector->bottom_margin == temp_value) |
2012 | if (intel_sdvo_connector->bottom_margin == temp_value) |
1979 | return 0; |
2013 | return 0; |
1980 | 2014 | ||
1981 | intel_sdvo_connector->top_margin = temp_value; |
2015 | intel_sdvo_connector->top_margin = temp_value; |
1982 | intel_sdvo_connector->bottom_margin = temp_value; |
2016 | intel_sdvo_connector->bottom_margin = temp_value; |
1983 | temp_value = intel_sdvo_connector->max_vscan - |
2017 | temp_value = intel_sdvo_connector->max_vscan - |
1984 | intel_sdvo_connector->top_margin; |
2018 | intel_sdvo_connector->top_margin; |
1985 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
2019 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
1986 | goto set_value; |
2020 | goto set_value; |
1987 | } |
2021 | } |
1988 | CHECK_PROPERTY(hpos, HPOS) |
2022 | CHECK_PROPERTY(hpos, HPOS) |
1989 | CHECK_PROPERTY(vpos, VPOS) |
2023 | CHECK_PROPERTY(vpos, VPOS) |
1990 | CHECK_PROPERTY(saturation, SATURATION) |
2024 | CHECK_PROPERTY(saturation, SATURATION) |
1991 | CHECK_PROPERTY(contrast, CONTRAST) |
2025 | CHECK_PROPERTY(contrast, CONTRAST) |
1992 | CHECK_PROPERTY(hue, HUE) |
2026 | CHECK_PROPERTY(hue, HUE) |
1993 | CHECK_PROPERTY(brightness, BRIGHTNESS) |
2027 | CHECK_PROPERTY(brightness, BRIGHTNESS) |
1994 | CHECK_PROPERTY(sharpness, SHARPNESS) |
2028 | CHECK_PROPERTY(sharpness, SHARPNESS) |
1995 | CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) |
2029 | CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) |
1996 | CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) |
2030 | CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) |
1997 | CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) |
2031 | CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) |
1998 | CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) |
2032 | CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) |
1999 | CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) |
2033 | CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) |
2000 | CHECK_PROPERTY(dot_crawl, DOT_CRAWL) |
2034 | CHECK_PROPERTY(dot_crawl, DOT_CRAWL) |
2001 | } |
2035 | } |
2002 | 2036 | ||
2003 | return -EINVAL; /* unknown property */ |
2037 | return -EINVAL; /* unknown property */ |
2004 | 2038 | ||
2005 | set_value: |
2039 | set_value: |
2006 | if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2)) |
2040 | if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2)) |
2007 | return -EIO; |
2041 | return -EIO; |
2008 | 2042 | ||
2009 | 2043 | ||
2010 | done: |
2044 | done: |
2011 | if (intel_sdvo->base.base.crtc) { |
2045 | if (intel_sdvo->base.base.crtc) |
2012 | struct drm_crtc *crtc = intel_sdvo->base.base.crtc; |
2046 | intel_crtc_restore_mode(intel_sdvo->base.base.crtc); |
2013 | intel_set_mode(crtc, &crtc->mode, |
- | |
2014 | crtc->x, crtc->y, crtc->fb); |
- | |
2015 | } |
- | |
2016 | 2047 | ||
2017 | return 0; |
2048 | return 0; |
2018 | #undef CHECK_PROPERTY |
2049 | #undef CHECK_PROPERTY |
2019 | } |
2050 | } |
2020 | 2051 | ||
2021 | static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = { |
2052 | static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = { |
2022 | .mode_fixup = intel_sdvo_mode_fixup, |
2053 | .mode_fixup = intel_sdvo_mode_fixup, |
2023 | .mode_set = intel_sdvo_mode_set, |
2054 | .mode_set = intel_sdvo_mode_set, |
2024 | .disable = intel_encoder_noop, |
- | |
2025 | }; |
2055 | }; |
2026 | 2056 | ||
2027 | static const struct drm_connector_funcs intel_sdvo_connector_funcs = { |
2057 | static const struct drm_connector_funcs intel_sdvo_connector_funcs = { |
2028 | .dpms = intel_sdvo_dpms, |
2058 | .dpms = intel_sdvo_dpms, |
2029 | .detect = intel_sdvo_detect, |
2059 | .detect = intel_sdvo_detect, |
2030 | .fill_modes = drm_helper_probe_single_connector_modes, |
2060 | .fill_modes = drm_helper_probe_single_connector_modes, |
2031 | .set_property = intel_sdvo_set_property, |
2061 | .set_property = intel_sdvo_set_property, |
2032 | .destroy = intel_sdvo_destroy, |
2062 | .destroy = intel_sdvo_destroy, |
2033 | }; |
2063 | }; |
2034 | 2064 | ||
2035 | static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { |
2065 | static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { |
2036 | .get_modes = intel_sdvo_get_modes, |
2066 | .get_modes = intel_sdvo_get_modes, |
2037 | .mode_valid = intel_sdvo_mode_valid, |
2067 | .mode_valid = intel_sdvo_mode_valid, |
2038 | .best_encoder = intel_best_encoder, |
2068 | .best_encoder = intel_best_encoder, |
2039 | }; |
2069 | }; |
2040 | 2070 | ||
2041 | static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) |
2071 | static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) |
2042 | { |
2072 | { |
2043 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); |
2073 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); |
2044 | 2074 | ||
2045 | if (intel_sdvo->sdvo_lvds_fixed_mode != NULL) |
2075 | if (intel_sdvo->sdvo_lvds_fixed_mode != NULL) |
2046 | drm_mode_destroy(encoder->dev, |
2076 | drm_mode_destroy(encoder->dev, |
2047 | intel_sdvo->sdvo_lvds_fixed_mode); |
2077 | intel_sdvo->sdvo_lvds_fixed_mode); |
2048 | 2078 | ||
2049 | i2c_del_adapter(&intel_sdvo->ddc); |
2079 | i2c_del_adapter(&intel_sdvo->ddc); |
2050 | intel_encoder_destroy(encoder); |
2080 | intel_encoder_destroy(encoder); |
2051 | } |
2081 | } |
2052 | 2082 | ||
2053 | static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { |
2083 | static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { |
2054 | .destroy = intel_sdvo_enc_destroy, |
2084 | .destroy = intel_sdvo_enc_destroy, |
2055 | }; |
2085 | }; |
2056 | 2086 | ||
2057 | static void |
2087 | static void |
2058 | intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) |
2088 | intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) |
2059 | { |
2089 | { |
2060 | uint16_t mask = 0; |
2090 | uint16_t mask = 0; |
2061 | unsigned int num_bits; |
2091 | unsigned int num_bits; |
2062 | 2092 | ||
2063 | /* Make a mask of outputs less than or equal to our own priority in the |
2093 | /* Make a mask of outputs less than or equal to our own priority in the |
2064 | * list. |
2094 | * list. |
2065 | */ |
2095 | */ |
2066 | switch (sdvo->controlled_output) { |
2096 | switch (sdvo->controlled_output) { |
2067 | case SDVO_OUTPUT_LVDS1: |
2097 | case SDVO_OUTPUT_LVDS1: |
2068 | mask |= SDVO_OUTPUT_LVDS1; |
2098 | mask |= SDVO_OUTPUT_LVDS1; |
2069 | case SDVO_OUTPUT_LVDS0: |
2099 | case SDVO_OUTPUT_LVDS0: |
2070 | mask |= SDVO_OUTPUT_LVDS0; |
2100 | mask |= SDVO_OUTPUT_LVDS0; |
2071 | case SDVO_OUTPUT_TMDS1: |
2101 | case SDVO_OUTPUT_TMDS1: |
2072 | mask |= SDVO_OUTPUT_TMDS1; |
2102 | mask |= SDVO_OUTPUT_TMDS1; |
2073 | case SDVO_OUTPUT_TMDS0: |
2103 | case SDVO_OUTPUT_TMDS0: |
2074 | mask |= SDVO_OUTPUT_TMDS0; |
2104 | mask |= SDVO_OUTPUT_TMDS0; |
2075 | case SDVO_OUTPUT_RGB1: |
2105 | case SDVO_OUTPUT_RGB1: |
2076 | mask |= SDVO_OUTPUT_RGB1; |
2106 | mask |= SDVO_OUTPUT_RGB1; |
2077 | case SDVO_OUTPUT_RGB0: |
2107 | case SDVO_OUTPUT_RGB0: |
2078 | mask |= SDVO_OUTPUT_RGB0; |
2108 | mask |= SDVO_OUTPUT_RGB0; |
2079 | break; |
2109 | break; |
2080 | } |
2110 | } |
2081 | 2111 | ||
2082 | /* Count bits to find what number we are in the priority list. */ |
2112 | /* Count bits to find what number we are in the priority list. */ |
2083 | mask &= sdvo->caps.output_flags; |
2113 | mask &= sdvo->caps.output_flags; |
2084 | num_bits = hweight16(mask); |
2114 | num_bits = hweight16(mask); |
2085 | /* If more than 3 outputs, default to DDC bus 3 for now. */ |
2115 | /* If more than 3 outputs, default to DDC bus 3 for now. */ |
2086 | if (num_bits > 3) |
2116 | if (num_bits > 3) |
2087 | num_bits = 3; |
2117 | num_bits = 3; |
2088 | 2118 | ||
2089 | /* Corresponds to SDVO_CONTROL_BUS_DDCx */ |
2119 | /* Corresponds to SDVO_CONTROL_BUS_DDCx */ |
2090 | sdvo->ddc_bus = 1 << num_bits; |
2120 | sdvo->ddc_bus = 1 << num_bits; |
2091 | } |
2121 | } |
2092 | 2122 | ||
2093 | /** |
2123 | /** |
2094 | * Choose the appropriate DDC bus for control bus switch command for this |
2124 | * Choose the appropriate DDC bus for control bus switch command for this |
2095 | * SDVO output based on the controlled output. |
2125 | * SDVO output based on the controlled output. |
2096 | * |
2126 | * |
2097 | * DDC bus number assignment is in a priority order of RGB outputs, then TMDS |
2127 | * DDC bus number assignment is in a priority order of RGB outputs, then TMDS |
2098 | * outputs, then LVDS outputs. |
2128 | * outputs, then LVDS outputs. |
2099 | */ |
2129 | */ |
2100 | static void |
2130 | static void |
2101 | intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, |
2131 | intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, |
2102 | struct intel_sdvo *sdvo, u32 reg) |
2132 | struct intel_sdvo *sdvo, u32 reg) |
2103 | { |
2133 | { |
2104 | struct sdvo_device_mapping *mapping; |
2134 | struct sdvo_device_mapping *mapping; |
2105 | 2135 | ||
2106 | if (sdvo->is_sdvob) |
2136 | if (sdvo->is_sdvob) |
2107 | mapping = &(dev_priv->sdvo_mappings[0]); |
2137 | mapping = &(dev_priv->sdvo_mappings[0]); |
2108 | else |
2138 | else |
2109 | mapping = &(dev_priv->sdvo_mappings[1]); |
2139 | mapping = &(dev_priv->sdvo_mappings[1]); |
2110 | 2140 | ||
2111 | if (mapping->initialized) |
2141 | if (mapping->initialized) |
2112 | sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); |
2142 | sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); |
2113 | else |
2143 | else |
2114 | intel_sdvo_guess_ddc_bus(sdvo); |
2144 | intel_sdvo_guess_ddc_bus(sdvo); |
2115 | } |
2145 | } |
2116 | 2146 | ||
2117 | static void |
2147 | static void |
2118 | intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, |
2148 | intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, |
2119 | struct intel_sdvo *sdvo, u32 reg) |
2149 | struct intel_sdvo *sdvo, u32 reg) |
2120 | { |
2150 | { |
2121 | struct sdvo_device_mapping *mapping; |
2151 | struct sdvo_device_mapping *mapping; |
2122 | u8 pin; |
2152 | u8 pin; |
2123 | 2153 | ||
2124 | if (sdvo->is_sdvob) |
2154 | if (sdvo->is_sdvob) |
2125 | mapping = &dev_priv->sdvo_mappings[0]; |
2155 | mapping = &dev_priv->sdvo_mappings[0]; |
2126 | else |
2156 | else |
2127 | mapping = &dev_priv->sdvo_mappings[1]; |
2157 | mapping = &dev_priv->sdvo_mappings[1]; |
2128 | 2158 | ||
2129 | if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin)) |
2159 | if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin)) |
2130 | pin = mapping->i2c_pin; |
2160 | pin = mapping->i2c_pin; |
2131 | else |
2161 | else |
2132 | pin = GMBUS_PORT_DPB; |
2162 | pin = GMBUS_PORT_DPB; |
2133 | 2163 | ||
2134 | sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); |
2164 | sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); |
2135 | 2165 | ||
2136 | /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow |
2166 | /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow |
2137 | * our code totally fails once we start using gmbus. Hence fall back to |
2167 | * our code totally fails once we start using gmbus. Hence fall back to |
2138 | * bit banging for now. */ |
2168 | * bit banging for now. */ |
2139 | intel_gmbus_force_bit(sdvo->i2c, true); |
2169 | intel_gmbus_force_bit(sdvo->i2c, true); |
2140 | } |
2170 | } |
2141 | 2171 | ||
2142 | /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */ |
2172 | /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */ |
2143 | static void |
2173 | static void |
2144 | intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo) |
2174 | intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo) |
2145 | { |
2175 | { |
2146 | intel_gmbus_force_bit(sdvo->i2c, false); |
2176 | intel_gmbus_force_bit(sdvo->i2c, false); |
2147 | } |
2177 | } |
2148 | 2178 | ||
2149 | static bool |
2179 | static bool |
2150 | intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) |
2180 | intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) |
2151 | { |
2181 | { |
2152 | return intel_sdvo_check_supp_encode(intel_sdvo); |
2182 | return intel_sdvo_check_supp_encode(intel_sdvo); |
2153 | } |
2183 | } |
2154 | 2184 | ||
2155 | static u8 |
2185 | static u8 |
2156 | intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo) |
2186 | intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo) |
2157 | { |
2187 | { |
2158 | struct drm_i915_private *dev_priv = dev->dev_private; |
2188 | struct drm_i915_private *dev_priv = dev->dev_private; |
2159 | struct sdvo_device_mapping *my_mapping, *other_mapping; |
2189 | struct sdvo_device_mapping *my_mapping, *other_mapping; |
2160 | 2190 | ||
2161 | if (sdvo->is_sdvob) { |
2191 | if (sdvo->is_sdvob) { |
2162 | my_mapping = &dev_priv->sdvo_mappings[0]; |
2192 | my_mapping = &dev_priv->sdvo_mappings[0]; |
2163 | other_mapping = &dev_priv->sdvo_mappings[1]; |
2193 | other_mapping = &dev_priv->sdvo_mappings[1]; |
2164 | } else { |
2194 | } else { |
2165 | my_mapping = &dev_priv->sdvo_mappings[1]; |
2195 | my_mapping = &dev_priv->sdvo_mappings[1]; |
2166 | other_mapping = &dev_priv->sdvo_mappings[0]; |
2196 | other_mapping = &dev_priv->sdvo_mappings[0]; |
2167 | } |
2197 | } |
2168 | 2198 | ||
2169 | /* If the BIOS described our SDVO device, take advantage of it. */ |
2199 | /* If the BIOS described our SDVO device, take advantage of it. */ |
2170 | if (my_mapping->slave_addr) |
2200 | if (my_mapping->slave_addr) |
2171 | return my_mapping->slave_addr; |
2201 | return my_mapping->slave_addr; |
2172 | 2202 | ||
2173 | /* If the BIOS only described a different SDVO device, use the |
2203 | /* If the BIOS only described a different SDVO device, use the |
2174 | * address that it isn't using. |
2204 | * address that it isn't using. |
2175 | */ |
2205 | */ |
2176 | if (other_mapping->slave_addr) { |
2206 | if (other_mapping->slave_addr) { |
2177 | if (other_mapping->slave_addr == 0x70) |
2207 | if (other_mapping->slave_addr == 0x70) |
2178 | return 0x72; |
2208 | return 0x72; |
2179 | else |
2209 | else |
2180 | return 0x70; |
2210 | return 0x70; |
2181 | } |
2211 | } |
2182 | 2212 | ||
2183 | /* No SDVO device info is found for another DVO port, |
2213 | /* No SDVO device info is found for another DVO port, |
2184 | * so use mapping assumption we had before BIOS parsing. |
2214 | * so use mapping assumption we had before BIOS parsing. |
2185 | */ |
2215 | */ |
2186 | if (sdvo->is_sdvob) |
2216 | if (sdvo->is_sdvob) |
2187 | return 0x70; |
2217 | return 0x70; |
2188 | else |
2218 | else |
2189 | return 0x72; |
2219 | return 0x72; |
2190 | } |
2220 | } |
2191 | 2221 | ||
2192 | static void |
2222 | static void |
2193 | intel_sdvo_connector_init(struct intel_sdvo_connector *connector, |
2223 | intel_sdvo_connector_init(struct intel_sdvo_connector *connector, |
2194 | struct intel_sdvo *encoder) |
2224 | struct intel_sdvo *encoder) |
2195 | { |
2225 | { |
2196 | drm_connector_init(encoder->base.base.dev, |
2226 | drm_connector_init(encoder->base.base.dev, |
2197 | &connector->base.base, |
2227 | &connector->base.base, |
2198 | &intel_sdvo_connector_funcs, |
2228 | &intel_sdvo_connector_funcs, |
2199 | connector->base.base.connector_type); |
2229 | connector->base.base.connector_type); |
2200 | 2230 | ||
2201 | drm_connector_helper_add(&connector->base.base, |
2231 | drm_connector_helper_add(&connector->base.base, |
2202 | &intel_sdvo_connector_helper_funcs); |
2232 | &intel_sdvo_connector_helper_funcs); |
2203 | 2233 | ||
2204 | connector->base.base.interlace_allowed = 1; |
2234 | connector->base.base.interlace_allowed = 1; |
2205 | connector->base.base.doublescan_allowed = 0; |
2235 | connector->base.base.doublescan_allowed = 0; |
2206 | connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; |
2236 | connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; |
2207 | connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; |
2237 | connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; |
2208 | 2238 | ||
2209 | intel_connector_attach_encoder(&connector->base, &encoder->base); |
2239 | intel_connector_attach_encoder(&connector->base, &encoder->base); |
2210 | drm_sysfs_connector_add(&connector->base.base); |
2240 | drm_sysfs_connector_add(&connector->base.base); |
2211 | } |
2241 | } |
2212 | 2242 | ||
2213 | static void |
2243 | static void |
2214 | intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector) |
2244 | intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo, |
- | 2245 | struct intel_sdvo_connector *connector) |
|
2215 | { |
2246 | { |
2216 | struct drm_device *dev = connector->base.base.dev; |
2247 | struct drm_device *dev = connector->base.base.dev; |
2217 | 2248 | ||
2218 | intel_attach_force_audio_property(&connector->base.base); |
2249 | intel_attach_force_audio_property(&connector->base.base); |
2219 | if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) |
2250 | if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) { |
2220 | intel_attach_broadcast_rgb_property(&connector->base.base); |
2251 | intel_attach_broadcast_rgb_property(&connector->base.base); |
- | 2252 | intel_sdvo->color_range_auto = true; |
|
- | 2253 | } |
|
2221 | } |
2254 | } |
2222 | 2255 | ||
2223 | static bool |
2256 | static bool |
2224 | intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) |
2257 | intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) |
2225 | { |
2258 | { |
2226 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2259 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2227 | struct drm_connector *connector; |
2260 | struct drm_connector *connector; |
2228 | struct intel_encoder *intel_encoder = to_intel_encoder(encoder); |
2261 | struct intel_encoder *intel_encoder = to_intel_encoder(encoder); |
2229 | struct intel_connector *intel_connector; |
2262 | struct intel_connector *intel_connector; |
2230 | struct intel_sdvo_connector *intel_sdvo_connector; |
2263 | struct intel_sdvo_connector *intel_sdvo_connector; |
2231 | 2264 | ||
2232 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2265 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2233 | if (!intel_sdvo_connector) |
2266 | if (!intel_sdvo_connector) |
2234 | return false; |
2267 | return false; |
2235 | 2268 | ||
2236 | if (device == 0) { |
2269 | if (device == 0) { |
2237 | intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; |
2270 | intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; |
2238 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; |
2271 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; |
2239 | } else if (device == 1) { |
2272 | } else if (device == 1) { |
2240 | intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; |
2273 | intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; |
2241 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; |
2274 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; |
2242 | } |
2275 | } |
2243 | 2276 | ||
2244 | intel_connector = &intel_sdvo_connector->base; |
2277 | intel_connector = &intel_sdvo_connector->base; |
2245 | connector = &intel_connector->base; |
2278 | connector = &intel_connector->base; |
2246 | if (intel_sdvo_get_hotplug_support(intel_sdvo) & |
2279 | if (intel_sdvo_get_hotplug_support(intel_sdvo) & |
2247 | intel_sdvo_connector->output_flag) { |
2280 | intel_sdvo_connector->output_flag) { |
2248 | connector->polled = DRM_CONNECTOR_POLL_HPD; |
2281 | connector->polled = DRM_CONNECTOR_POLL_HPD; |
2249 | intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag; |
2282 | intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag; |
2250 | /* Some SDVO devices have one-shot hotplug interrupts. |
2283 | /* Some SDVO devices have one-shot hotplug interrupts. |
2251 | * Ensure that they get re-enabled when an interrupt happens. |
2284 | * Ensure that they get re-enabled when an interrupt happens. |
2252 | */ |
2285 | */ |
2253 | intel_encoder->hot_plug = intel_sdvo_enable_hotplug; |
2286 | intel_encoder->hot_plug = intel_sdvo_enable_hotplug; |
2254 | intel_sdvo_enable_hotplug(intel_encoder); |
2287 | intel_sdvo_enable_hotplug(intel_encoder); |
2255 | } else { |
2288 | } else { |
2256 | connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; |
2289 | connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; |
2257 | } |
2290 | } |
2258 | encoder->encoder_type = DRM_MODE_ENCODER_TMDS; |
2291 | encoder->encoder_type = DRM_MODE_ENCODER_TMDS; |
2259 | connector->connector_type = DRM_MODE_CONNECTOR_DVID; |
2292 | connector->connector_type = DRM_MODE_CONNECTOR_DVID; |
2260 | 2293 | ||
2261 | if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { |
2294 | if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { |
2262 | connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; |
2295 | connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; |
2263 | intel_sdvo->is_hdmi = true; |
2296 | intel_sdvo->is_hdmi = true; |
2264 | } |
2297 | } |
2265 | 2298 | ||
2266 | intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); |
2299 | intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); |
2267 | if (intel_sdvo->is_hdmi) |
2300 | if (intel_sdvo->is_hdmi) |
2268 | intel_sdvo_add_hdmi_properties(intel_sdvo_connector); |
2301 | intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector); |
2269 | 2302 | ||
2270 | return true; |
2303 | return true; |
2271 | } |
2304 | } |
2272 | 2305 | ||
2273 | static bool |
2306 | static bool |
2274 | intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) |
2307 | intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) |
2275 | { |
2308 | { |
2276 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2309 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2277 | struct drm_connector *connector; |
2310 | struct drm_connector *connector; |
2278 | struct intel_connector *intel_connector; |
2311 | struct intel_connector *intel_connector; |
2279 | struct intel_sdvo_connector *intel_sdvo_connector; |
2312 | struct intel_sdvo_connector *intel_sdvo_connector; |
2280 | 2313 | ||
2281 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2314 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2282 | if (!intel_sdvo_connector) |
2315 | if (!intel_sdvo_connector) |
2283 | return false; |
2316 | return false; |
2284 | 2317 | ||
2285 | intel_connector = &intel_sdvo_connector->base; |
2318 | intel_connector = &intel_sdvo_connector->base; |
2286 | connector = &intel_connector->base; |
2319 | connector = &intel_connector->base; |
2287 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; |
2320 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; |
2288 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; |
2321 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; |
2289 | 2322 | ||
2290 | intel_sdvo->controlled_output |= type; |
2323 | intel_sdvo->controlled_output |= type; |
2291 | intel_sdvo_connector->output_flag = type; |
2324 | intel_sdvo_connector->output_flag = type; |
2292 | 2325 | ||
2293 | intel_sdvo->is_tv = true; |
2326 | intel_sdvo->is_tv = true; |
2294 | intel_sdvo->base.needs_tv_clock = true; |
2327 | intel_sdvo->base.needs_tv_clock = true; |
2295 | 2328 | ||
2296 | intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); |
2329 | intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); |
2297 | 2330 | ||
2298 | if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) |
2331 | if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) |
2299 | goto err; |
2332 | goto err; |
2300 | 2333 | ||
2301 | if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) |
2334 | if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) |
2302 | goto err; |
2335 | goto err; |
2303 | 2336 | ||
2304 | return true; |
2337 | return true; |
2305 | 2338 | ||
2306 | err: |
2339 | err: |
2307 | intel_sdvo_destroy(connector); |
2340 | intel_sdvo_destroy(connector); |
2308 | return false; |
2341 | return false; |
2309 | } |
2342 | } |
2310 | 2343 | ||
2311 | static bool |
2344 | static bool |
2312 | intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) |
2345 | intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) |
2313 | { |
2346 | { |
2314 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2347 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2315 | struct drm_connector *connector; |
2348 | struct drm_connector *connector; |
2316 | struct intel_connector *intel_connector; |
2349 | struct intel_connector *intel_connector; |
2317 | struct intel_sdvo_connector *intel_sdvo_connector; |
2350 | struct intel_sdvo_connector *intel_sdvo_connector; |
2318 | 2351 | ||
2319 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2352 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2320 | if (!intel_sdvo_connector) |
2353 | if (!intel_sdvo_connector) |
2321 | return false; |
2354 | return false; |
2322 | 2355 | ||
2323 | intel_connector = &intel_sdvo_connector->base; |
2356 | intel_connector = &intel_sdvo_connector->base; |
2324 | connector = &intel_connector->base; |
2357 | connector = &intel_connector->base; |
2325 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
2358 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
2326 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; |
2359 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; |
2327 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; |
2360 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; |
2328 | 2361 | ||
2329 | if (device == 0) { |
2362 | if (device == 0) { |
2330 | intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; |
2363 | intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; |
2331 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; |
2364 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; |
2332 | } else if (device == 1) { |
2365 | } else if (device == 1) { |
2333 | intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; |
2366 | intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; |
2334 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; |
2367 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; |
2335 | } |
2368 | } |
2336 | 2369 | ||
2337 | intel_sdvo_connector_init(intel_sdvo_connector, |
2370 | intel_sdvo_connector_init(intel_sdvo_connector, |
2338 | intel_sdvo); |
2371 | intel_sdvo); |
2339 | return true; |
2372 | return true; |
2340 | } |
2373 | } |
2341 | 2374 | ||
2342 | static bool |
2375 | static bool |
2343 | intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) |
2376 | intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) |
2344 | { |
2377 | { |
2345 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2378 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2346 | struct drm_connector *connector; |
2379 | struct drm_connector *connector; |
2347 | struct intel_connector *intel_connector; |
2380 | struct intel_connector *intel_connector; |
2348 | struct intel_sdvo_connector *intel_sdvo_connector; |
2381 | struct intel_sdvo_connector *intel_sdvo_connector; |
2349 | 2382 | ||
2350 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2383 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2351 | if (!intel_sdvo_connector) |
2384 | if (!intel_sdvo_connector) |
2352 | return false; |
2385 | return false; |
2353 | 2386 | ||
2354 | intel_connector = &intel_sdvo_connector->base; |
2387 | intel_connector = &intel_sdvo_connector->base; |
2355 | connector = &intel_connector->base; |
2388 | connector = &intel_connector->base; |
2356 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; |
2389 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; |
2357 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; |
2390 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; |
2358 | 2391 | ||
2359 | if (device == 0) { |
2392 | if (device == 0) { |
2360 | intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; |
2393 | intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; |
2361 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; |
2394 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; |
2362 | } else if (device == 1) { |
2395 | } else if (device == 1) { |
2363 | intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; |
2396 | intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; |
2364 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; |
2397 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; |
2365 | } |
2398 | } |
2366 | 2399 | ||
2367 | intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); |
2400 | intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); |
2368 | if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) |
2401 | if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) |
2369 | goto err; |
2402 | goto err; |
2370 | 2403 | ||
2371 | return true; |
2404 | return true; |
2372 | 2405 | ||
2373 | err: |
2406 | err: |
2374 | intel_sdvo_destroy(connector); |
2407 | intel_sdvo_destroy(connector); |
2375 | return false; |
2408 | return false; |
2376 | } |
2409 | } |
2377 | 2410 | ||
2378 | static bool |
2411 | static bool |
2379 | intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) |
2412 | intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) |
2380 | { |
2413 | { |
2381 | intel_sdvo->is_tv = false; |
2414 | intel_sdvo->is_tv = false; |
2382 | intel_sdvo->base.needs_tv_clock = false; |
2415 | intel_sdvo->base.needs_tv_clock = false; |
2383 | intel_sdvo->is_lvds = false; |
2416 | intel_sdvo->is_lvds = false; |
2384 | 2417 | ||
2385 | /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ |
2418 | /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ |
2386 | 2419 | ||
2387 | if (flags & SDVO_OUTPUT_TMDS0) |
2420 | if (flags & SDVO_OUTPUT_TMDS0) |
2388 | if (!intel_sdvo_dvi_init(intel_sdvo, 0)) |
2421 | if (!intel_sdvo_dvi_init(intel_sdvo, 0)) |
2389 | return false; |
2422 | return false; |
2390 | 2423 | ||
2391 | if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) |
2424 | if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) |
2392 | if (!intel_sdvo_dvi_init(intel_sdvo, 1)) |
2425 | if (!intel_sdvo_dvi_init(intel_sdvo, 1)) |
2393 | return false; |
2426 | return false; |
2394 | 2427 | ||
2395 | /* TV has no XXX1 function block */ |
2428 | /* TV has no XXX1 function block */ |
2396 | if (flags & SDVO_OUTPUT_SVID0) |
2429 | if (flags & SDVO_OUTPUT_SVID0) |
2397 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) |
2430 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) |
2398 | return false; |
2431 | return false; |
2399 | 2432 | ||
2400 | if (flags & SDVO_OUTPUT_CVBS0) |
2433 | if (flags & SDVO_OUTPUT_CVBS0) |
2401 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) |
2434 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) |
2402 | return false; |
2435 | return false; |
2403 | 2436 | ||
2404 | if (flags & SDVO_OUTPUT_YPRPB0) |
2437 | if (flags & SDVO_OUTPUT_YPRPB0) |
2405 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) |
2438 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) |
2406 | return false; |
2439 | return false; |
2407 | 2440 | ||
2408 | if (flags & SDVO_OUTPUT_RGB0) |
2441 | if (flags & SDVO_OUTPUT_RGB0) |
2409 | if (!intel_sdvo_analog_init(intel_sdvo, 0)) |
2442 | if (!intel_sdvo_analog_init(intel_sdvo, 0)) |
2410 | return false; |
2443 | return false; |
2411 | 2444 | ||
2412 | if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) |
2445 | if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) |
2413 | if (!intel_sdvo_analog_init(intel_sdvo, 1)) |
2446 | if (!intel_sdvo_analog_init(intel_sdvo, 1)) |
2414 | return false; |
2447 | return false; |
2415 | 2448 | ||
2416 | if (flags & SDVO_OUTPUT_LVDS0) |
2449 | if (flags & SDVO_OUTPUT_LVDS0) |
2417 | if (!intel_sdvo_lvds_init(intel_sdvo, 0)) |
2450 | if (!intel_sdvo_lvds_init(intel_sdvo, 0)) |
2418 | return false; |
2451 | return false; |
2419 | 2452 | ||
2420 | if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) |
2453 | if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) |
2421 | if (!intel_sdvo_lvds_init(intel_sdvo, 1)) |
2454 | if (!intel_sdvo_lvds_init(intel_sdvo, 1)) |
2422 | return false; |
2455 | return false; |
2423 | 2456 | ||
2424 | if ((flags & SDVO_OUTPUT_MASK) == 0) { |
2457 | if ((flags & SDVO_OUTPUT_MASK) == 0) { |
2425 | unsigned char bytes[2]; |
2458 | unsigned char bytes[2]; |
2426 | 2459 | ||
2427 | intel_sdvo->controlled_output = 0; |
2460 | intel_sdvo->controlled_output = 0; |
2428 | memcpy(bytes, &intel_sdvo->caps.output_flags, 2); |
2461 | memcpy(bytes, &intel_sdvo->caps.output_flags, 2); |
2429 | DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", |
2462 | DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", |
2430 | SDVO_NAME(intel_sdvo), |
2463 | SDVO_NAME(intel_sdvo), |
2431 | bytes[0], bytes[1]); |
2464 | bytes[0], bytes[1]); |
2432 | return false; |
2465 | return false; |
2433 | } |
2466 | } |
2434 | intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
2467 | intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
2435 | 2468 | ||
2436 | return true; |
2469 | return true; |
2437 | } |
2470 | } |
2438 | 2471 | ||
2439 | static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) |
2472 | static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) |
2440 | { |
2473 | { |
2441 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2474 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2442 | struct drm_connector *connector, *tmp; |
2475 | struct drm_connector *connector, *tmp; |
2443 | 2476 | ||
2444 | list_for_each_entry_safe(connector, tmp, |
2477 | list_for_each_entry_safe(connector, tmp, |
2445 | &dev->mode_config.connector_list, head) { |
2478 | &dev->mode_config.connector_list, head) { |
2446 | if (intel_attached_encoder(connector) == &intel_sdvo->base) |
2479 | if (intel_attached_encoder(connector) == &intel_sdvo->base) |
2447 | intel_sdvo_destroy(connector); |
2480 | intel_sdvo_destroy(connector); |
2448 | } |
2481 | } |
2449 | } |
2482 | } |
2450 | 2483 | ||
2451 | static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, |
2484 | static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, |
2452 | struct intel_sdvo_connector *intel_sdvo_connector, |
2485 | struct intel_sdvo_connector *intel_sdvo_connector, |
2453 | int type) |
2486 | int type) |
2454 | { |
2487 | { |
2455 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2488 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2456 | struct intel_sdvo_tv_format format; |
2489 | struct intel_sdvo_tv_format format; |
2457 | uint32_t format_map, i; |
2490 | uint32_t format_map, i; |
2458 | 2491 | ||
2459 | if (!intel_sdvo_set_target_output(intel_sdvo, type)) |
2492 | if (!intel_sdvo_set_target_output(intel_sdvo, type)) |
2460 | return false; |
2493 | return false; |
2461 | 2494 | ||
2462 | BUILD_BUG_ON(sizeof(format) != 6); |
2495 | BUILD_BUG_ON(sizeof(format) != 6); |
2463 | if (!intel_sdvo_get_value(intel_sdvo, |
2496 | if (!intel_sdvo_get_value(intel_sdvo, |
2464 | SDVO_CMD_GET_SUPPORTED_TV_FORMATS, |
2497 | SDVO_CMD_GET_SUPPORTED_TV_FORMATS, |
2465 | &format, sizeof(format))) |
2498 | &format, sizeof(format))) |
2466 | return false; |
2499 | return false; |
2467 | 2500 | ||
2468 | memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); |
2501 | memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); |
2469 | 2502 | ||
2470 | if (format_map == 0) |
2503 | if (format_map == 0) |
2471 | return false; |
2504 | return false; |
2472 | 2505 | ||
2473 | intel_sdvo_connector->format_supported_num = 0; |
2506 | intel_sdvo_connector->format_supported_num = 0; |
2474 | for (i = 0 ; i < TV_FORMAT_NUM; i++) |
2507 | for (i = 0 ; i < TV_FORMAT_NUM; i++) |
2475 | if (format_map & (1 << i)) |
2508 | if (format_map & (1 << i)) |
2476 | intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; |
2509 | intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; |
2477 | 2510 | ||
2478 | 2511 | ||
2479 | intel_sdvo_connector->tv_format = |
2512 | intel_sdvo_connector->tv_format = |
2480 | drm_property_create(dev, DRM_MODE_PROP_ENUM, |
2513 | drm_property_create(dev, DRM_MODE_PROP_ENUM, |
2481 | "mode", intel_sdvo_connector->format_supported_num); |
2514 | "mode", intel_sdvo_connector->format_supported_num); |
2482 | if (!intel_sdvo_connector->tv_format) |
2515 | if (!intel_sdvo_connector->tv_format) |
2483 | return false; |
2516 | return false; |
2484 | 2517 | ||
2485 | for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) |
2518 | for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) |
2486 | drm_property_add_enum( |
2519 | drm_property_add_enum( |
2487 | intel_sdvo_connector->tv_format, i, |
2520 | intel_sdvo_connector->tv_format, i, |
2488 | i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); |
2521 | i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); |
2489 | 2522 | ||
2490 | intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0]; |
2523 | intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0]; |
2491 | drm_object_attach_property(&intel_sdvo_connector->base.base.base, |
2524 | drm_object_attach_property(&intel_sdvo_connector->base.base.base, |
2492 | intel_sdvo_connector->tv_format, 0); |
2525 | intel_sdvo_connector->tv_format, 0); |
2493 | return true; |
2526 | return true; |
2494 | 2527 | ||
2495 | } |
2528 | } |
2496 | 2529 | ||
2497 | #define ENHANCEMENT(name, NAME) do { \ |
2530 | #define ENHANCEMENT(name, NAME) do { \ |
2498 | if (enhancements.name) { \ |
2531 | if (enhancements.name) { \ |
2499 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ |
2532 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ |
2500 | !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ |
2533 | !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ |
2501 | return false; \ |
2534 | return false; \ |
2502 | intel_sdvo_connector->max_##name = data_value[0]; \ |
2535 | intel_sdvo_connector->max_##name = data_value[0]; \ |
2503 | intel_sdvo_connector->cur_##name = response; \ |
2536 | intel_sdvo_connector->cur_##name = response; \ |
2504 | intel_sdvo_connector->name = \ |
2537 | intel_sdvo_connector->name = \ |
2505 | drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ |
2538 | drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ |
2506 | if (!intel_sdvo_connector->name) return false; \ |
2539 | if (!intel_sdvo_connector->name) return false; \ |
2507 | drm_object_attach_property(&connector->base, \ |
2540 | drm_object_attach_property(&connector->base, \ |
2508 | intel_sdvo_connector->name, \ |
2541 | intel_sdvo_connector->name, \ |
2509 | intel_sdvo_connector->cur_##name); \ |
2542 | intel_sdvo_connector->cur_##name); \ |
2510 | DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ |
2543 | DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ |
2511 | data_value[0], data_value[1], response); \ |
2544 | data_value[0], data_value[1], response); \ |
2512 | } \ |
2545 | } \ |
2513 | } while (0) |
2546 | } while (0) |
2514 | 2547 | ||
2515 | static bool |
2548 | static bool |
2516 | intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, |
2549 | intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, |
2517 | struct intel_sdvo_connector *intel_sdvo_connector, |
2550 | struct intel_sdvo_connector *intel_sdvo_connector, |
2518 | struct intel_sdvo_enhancements_reply enhancements) |
2551 | struct intel_sdvo_enhancements_reply enhancements) |
2519 | { |
2552 | { |
2520 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2553 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2521 | struct drm_connector *connector = &intel_sdvo_connector->base.base; |
2554 | struct drm_connector *connector = &intel_sdvo_connector->base.base; |
2522 | uint16_t response, data_value[2]; |
2555 | uint16_t response, data_value[2]; |
2523 | 2556 | ||
2524 | /* when horizontal overscan is supported, Add the left/right property */ |
2557 | /* when horizontal overscan is supported, Add the left/right property */ |
2525 | if (enhancements.overscan_h) { |
2558 | if (enhancements.overscan_h) { |
2526 | if (!intel_sdvo_get_value(intel_sdvo, |
2559 | if (!intel_sdvo_get_value(intel_sdvo, |
2527 | SDVO_CMD_GET_MAX_OVERSCAN_H, |
2560 | SDVO_CMD_GET_MAX_OVERSCAN_H, |
2528 | &data_value, 4)) |
2561 | &data_value, 4)) |
2529 | return false; |
2562 | return false; |
2530 | 2563 | ||
2531 | if (!intel_sdvo_get_value(intel_sdvo, |
2564 | if (!intel_sdvo_get_value(intel_sdvo, |
2532 | SDVO_CMD_GET_OVERSCAN_H, |
2565 | SDVO_CMD_GET_OVERSCAN_H, |
2533 | &response, 2)) |
2566 | &response, 2)) |
2534 | return false; |
2567 | return false; |
2535 | 2568 | ||
2536 | intel_sdvo_connector->max_hscan = data_value[0]; |
2569 | intel_sdvo_connector->max_hscan = data_value[0]; |
2537 | intel_sdvo_connector->left_margin = data_value[0] - response; |
2570 | intel_sdvo_connector->left_margin = data_value[0] - response; |
2538 | intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin; |
2571 | intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin; |
2539 | intel_sdvo_connector->left = |
2572 | intel_sdvo_connector->left = |
2540 | drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); |
2573 | drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); |
2541 | if (!intel_sdvo_connector->left) |
2574 | if (!intel_sdvo_connector->left) |
2542 | return false; |
2575 | return false; |
2543 | 2576 | ||
2544 | drm_object_attach_property(&connector->base, |
2577 | drm_object_attach_property(&connector->base, |
2545 | intel_sdvo_connector->left, |
2578 | intel_sdvo_connector->left, |
2546 | intel_sdvo_connector->left_margin); |
2579 | intel_sdvo_connector->left_margin); |
2547 | 2580 | ||
2548 | intel_sdvo_connector->right = |
2581 | intel_sdvo_connector->right = |
2549 | drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); |
2582 | drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); |
2550 | if (!intel_sdvo_connector->right) |
2583 | if (!intel_sdvo_connector->right) |
2551 | return false; |
2584 | return false; |
2552 | 2585 | ||
2553 | drm_object_attach_property(&connector->base, |
2586 | drm_object_attach_property(&connector->base, |
2554 | intel_sdvo_connector->right, |
2587 | intel_sdvo_connector->right, |
2555 | intel_sdvo_connector->right_margin); |
2588 | intel_sdvo_connector->right_margin); |
2556 | DRM_DEBUG_KMS("h_overscan: max %d, " |
2589 | DRM_DEBUG_KMS("h_overscan: max %d, " |
2557 | "default %d, current %d\n", |
2590 | "default %d, current %d\n", |
2558 | data_value[0], data_value[1], response); |
2591 | data_value[0], data_value[1], response); |
2559 | } |
2592 | } |
2560 | 2593 | ||
2561 | if (enhancements.overscan_v) { |
2594 | if (enhancements.overscan_v) { |
2562 | if (!intel_sdvo_get_value(intel_sdvo, |
2595 | if (!intel_sdvo_get_value(intel_sdvo, |
2563 | SDVO_CMD_GET_MAX_OVERSCAN_V, |
2596 | SDVO_CMD_GET_MAX_OVERSCAN_V, |
2564 | &data_value, 4)) |
2597 | &data_value, 4)) |
2565 | return false; |
2598 | return false; |
2566 | 2599 | ||
2567 | if (!intel_sdvo_get_value(intel_sdvo, |
2600 | if (!intel_sdvo_get_value(intel_sdvo, |
2568 | SDVO_CMD_GET_OVERSCAN_V, |
2601 | SDVO_CMD_GET_OVERSCAN_V, |
2569 | &response, 2)) |
2602 | &response, 2)) |
2570 | return false; |
2603 | return false; |
2571 | 2604 | ||
2572 | intel_sdvo_connector->max_vscan = data_value[0]; |
2605 | intel_sdvo_connector->max_vscan = data_value[0]; |
2573 | intel_sdvo_connector->top_margin = data_value[0] - response; |
2606 | intel_sdvo_connector->top_margin = data_value[0] - response; |
2574 | intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin; |
2607 | intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin; |
2575 | intel_sdvo_connector->top = |
2608 | intel_sdvo_connector->top = |
2576 | drm_property_create_range(dev, 0, |
2609 | drm_property_create_range(dev, 0, |
2577 | "top_margin", 0, data_value[0]); |
2610 | "top_margin", 0, data_value[0]); |
2578 | if (!intel_sdvo_connector->top) |
2611 | if (!intel_sdvo_connector->top) |
2579 | return false; |
2612 | return false; |
2580 | 2613 | ||
2581 | drm_object_attach_property(&connector->base, |
2614 | drm_object_attach_property(&connector->base, |
2582 | intel_sdvo_connector->top, |
2615 | intel_sdvo_connector->top, |
2583 | intel_sdvo_connector->top_margin); |
2616 | intel_sdvo_connector->top_margin); |
2584 | 2617 | ||
2585 | intel_sdvo_connector->bottom = |
2618 | intel_sdvo_connector->bottom = |
2586 | drm_property_create_range(dev, 0, |
2619 | drm_property_create_range(dev, 0, |
2587 | "bottom_margin", 0, data_value[0]); |
2620 | "bottom_margin", 0, data_value[0]); |
2588 | if (!intel_sdvo_connector->bottom) |
2621 | if (!intel_sdvo_connector->bottom) |
2589 | return false; |
2622 | return false; |
2590 | 2623 | ||
2591 | drm_object_attach_property(&connector->base, |
2624 | drm_object_attach_property(&connector->base, |
2592 | intel_sdvo_connector->bottom, |
2625 | intel_sdvo_connector->bottom, |
2593 | intel_sdvo_connector->bottom_margin); |
2626 | intel_sdvo_connector->bottom_margin); |
2594 | DRM_DEBUG_KMS("v_overscan: max %d, " |
2627 | DRM_DEBUG_KMS("v_overscan: max %d, " |
2595 | "default %d, current %d\n", |
2628 | "default %d, current %d\n", |
2596 | data_value[0], data_value[1], response); |
2629 | data_value[0], data_value[1], response); |
2597 | } |
2630 | } |
2598 | 2631 | ||
2599 | ENHANCEMENT(hpos, HPOS); |
2632 | ENHANCEMENT(hpos, HPOS); |
2600 | ENHANCEMENT(vpos, VPOS); |
2633 | ENHANCEMENT(vpos, VPOS); |
2601 | ENHANCEMENT(saturation, SATURATION); |
2634 | ENHANCEMENT(saturation, SATURATION); |
2602 | ENHANCEMENT(contrast, CONTRAST); |
2635 | ENHANCEMENT(contrast, CONTRAST); |
2603 | ENHANCEMENT(hue, HUE); |
2636 | ENHANCEMENT(hue, HUE); |
2604 | ENHANCEMENT(sharpness, SHARPNESS); |
2637 | ENHANCEMENT(sharpness, SHARPNESS); |
2605 | ENHANCEMENT(brightness, BRIGHTNESS); |
2638 | ENHANCEMENT(brightness, BRIGHTNESS); |
2606 | ENHANCEMENT(flicker_filter, FLICKER_FILTER); |
2639 | ENHANCEMENT(flicker_filter, FLICKER_FILTER); |
2607 | ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); |
2640 | ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); |
2608 | ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); |
2641 | ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); |
2609 | ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); |
2642 | ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); |
2610 | ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); |
2643 | ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); |
2611 | 2644 | ||
2612 | if (enhancements.dot_crawl) { |
2645 | if (enhancements.dot_crawl) { |
2613 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) |
2646 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) |
2614 | return false; |
2647 | return false; |
2615 | 2648 | ||
2616 | intel_sdvo_connector->max_dot_crawl = 1; |
2649 | intel_sdvo_connector->max_dot_crawl = 1; |
2617 | intel_sdvo_connector->cur_dot_crawl = response & 0x1; |
2650 | intel_sdvo_connector->cur_dot_crawl = response & 0x1; |
2618 | intel_sdvo_connector->dot_crawl = |
2651 | intel_sdvo_connector->dot_crawl = |
2619 | drm_property_create_range(dev, 0, "dot_crawl", 0, 1); |
2652 | drm_property_create_range(dev, 0, "dot_crawl", 0, 1); |
2620 | if (!intel_sdvo_connector->dot_crawl) |
2653 | if (!intel_sdvo_connector->dot_crawl) |
2621 | return false; |
2654 | return false; |
2622 | 2655 | ||
2623 | drm_object_attach_property(&connector->base, |
2656 | drm_object_attach_property(&connector->base, |
2624 | intel_sdvo_connector->dot_crawl, |
2657 | intel_sdvo_connector->dot_crawl, |
2625 | intel_sdvo_connector->cur_dot_crawl); |
2658 | intel_sdvo_connector->cur_dot_crawl); |
2626 | DRM_DEBUG_KMS("dot crawl: current %d\n", response); |
2659 | DRM_DEBUG_KMS("dot crawl: current %d\n", response); |
2627 | } |
2660 | } |
2628 | 2661 | ||
2629 | return true; |
2662 | return true; |
2630 | } |
2663 | } |
2631 | 2664 | ||
2632 | static bool |
2665 | static bool |
2633 | intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, |
2666 | intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, |
2634 | struct intel_sdvo_connector *intel_sdvo_connector, |
2667 | struct intel_sdvo_connector *intel_sdvo_connector, |
2635 | struct intel_sdvo_enhancements_reply enhancements) |
2668 | struct intel_sdvo_enhancements_reply enhancements) |
2636 | { |
2669 | { |
2637 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2670 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2638 | struct drm_connector *connector = &intel_sdvo_connector->base.base; |
2671 | struct drm_connector *connector = &intel_sdvo_connector->base.base; |
2639 | uint16_t response, data_value[2]; |
2672 | uint16_t response, data_value[2]; |
2640 | 2673 | ||
2641 | ENHANCEMENT(brightness, BRIGHTNESS); |
2674 | ENHANCEMENT(brightness, BRIGHTNESS); |
2642 | 2675 | ||
2643 | return true; |
2676 | return true; |
2644 | } |
2677 | } |
2645 | #undef ENHANCEMENT |
2678 | #undef ENHANCEMENT |
2646 | 2679 | ||
2647 | static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, |
2680 | static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, |
2648 | struct intel_sdvo_connector *intel_sdvo_connector) |
2681 | struct intel_sdvo_connector *intel_sdvo_connector) |
2649 | { |
2682 | { |
2650 | union { |
2683 | union { |
2651 | struct intel_sdvo_enhancements_reply reply; |
2684 | struct intel_sdvo_enhancements_reply reply; |
2652 | uint16_t response; |
2685 | uint16_t response; |
2653 | } enhancements; |
2686 | } enhancements; |
2654 | 2687 | ||
2655 | BUILD_BUG_ON(sizeof(enhancements) != 2); |
2688 | BUILD_BUG_ON(sizeof(enhancements) != 2); |
2656 | 2689 | ||
2657 | enhancements.response = 0; |
2690 | enhancements.response = 0; |
2658 | intel_sdvo_get_value(intel_sdvo, |
2691 | intel_sdvo_get_value(intel_sdvo, |
2659 | SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, |
2692 | SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, |
2660 | &enhancements, sizeof(enhancements)); |
2693 | &enhancements, sizeof(enhancements)); |
2661 | if (enhancements.response == 0) { |
2694 | if (enhancements.response == 0) { |
2662 | DRM_DEBUG_KMS("No enhancement is supported\n"); |
2695 | DRM_DEBUG_KMS("No enhancement is supported\n"); |
2663 | return true; |
2696 | return true; |
2664 | } |
2697 | } |
2665 | 2698 | ||
2666 | if (IS_TV(intel_sdvo_connector)) |
2699 | if (IS_TV(intel_sdvo_connector)) |
2667 | return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); |
2700 | return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); |
2668 | else if (IS_LVDS(intel_sdvo_connector)) |
2701 | else if (IS_LVDS(intel_sdvo_connector)) |
2669 | return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); |
2702 | return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); |
2670 | else |
2703 | else |
2671 | return true; |
2704 | return true; |
2672 | } |
2705 | } |
2673 | 2706 | ||
2674 | static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, |
2707 | static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, |
2675 | struct i2c_msg *msgs, |
2708 | struct i2c_msg *msgs, |
2676 | int num) |
2709 | int num) |
2677 | { |
2710 | { |
2678 | struct intel_sdvo *sdvo = adapter->algo_data; |
2711 | struct intel_sdvo *sdvo = adapter->algo_data; |
2679 | 2712 | ||
2680 | if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) |
2713 | if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) |
2681 | return -EIO; |
2714 | return -EIO; |
2682 | 2715 | ||
2683 | return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); |
2716 | return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); |
2684 | } |
2717 | } |
2685 | 2718 | ||
2686 | static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) |
2719 | static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) |
2687 | { |
2720 | { |
2688 | struct intel_sdvo *sdvo = adapter->algo_data; |
2721 | struct intel_sdvo *sdvo = adapter->algo_data; |
2689 | return sdvo->i2c->algo->functionality(sdvo->i2c); |
2722 | return sdvo->i2c->algo->functionality(sdvo->i2c); |
2690 | } |
2723 | } |
2691 | 2724 | ||
2692 | static const struct i2c_algorithm intel_sdvo_ddc_proxy = { |
2725 | static const struct i2c_algorithm intel_sdvo_ddc_proxy = { |
2693 | .master_xfer = intel_sdvo_ddc_proxy_xfer, |
2726 | .master_xfer = intel_sdvo_ddc_proxy_xfer, |
2694 | .functionality = intel_sdvo_ddc_proxy_func |
2727 | .functionality = intel_sdvo_ddc_proxy_func |
2695 | }; |
2728 | }; |
2696 | 2729 | ||
2697 | static bool |
2730 | static bool |
2698 | intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, |
2731 | intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, |
2699 | struct drm_device *dev) |
2732 | struct drm_device *dev) |
2700 | { |
2733 | { |
2701 | sdvo->ddc.owner = THIS_MODULE; |
2734 | sdvo->ddc.owner = THIS_MODULE; |
2702 | sdvo->ddc.class = I2C_CLASS_DDC; |
2735 | sdvo->ddc.class = I2C_CLASS_DDC; |
2703 | snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); |
2736 | snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); |
2704 | sdvo->ddc.dev.parent = &dev->pdev->dev; |
2737 | sdvo->ddc.dev.parent = &dev->pdev->dev; |
2705 | sdvo->ddc.algo_data = sdvo; |
2738 | sdvo->ddc.algo_data = sdvo; |
2706 | sdvo->ddc.algo = &intel_sdvo_ddc_proxy; |
2739 | sdvo->ddc.algo = &intel_sdvo_ddc_proxy; |
2707 | 2740 | ||
2708 | return i2c_add_adapter(&sdvo->ddc) == 0; |
2741 | return i2c_add_adapter(&sdvo->ddc) == 0; |
2709 | } |
2742 | } |
2710 | 2743 | ||
2711 | bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) |
2744 | bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) |
2712 | { |
2745 | { |
2713 | struct drm_i915_private *dev_priv = dev->dev_private; |
2746 | struct drm_i915_private *dev_priv = dev->dev_private; |
2714 | struct intel_encoder *intel_encoder; |
2747 | struct intel_encoder *intel_encoder; |
2715 | struct intel_sdvo *intel_sdvo; |
2748 | struct intel_sdvo *intel_sdvo; |
2716 | u32 hotplug_mask; |
2749 | u32 hotplug_mask; |
2717 | int i; |
2750 | int i; |
2718 | 2751 | ||
2719 | intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL); |
2752 | intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL); |
2720 | if (!intel_sdvo) |
2753 | if (!intel_sdvo) |
2721 | return false; |
2754 | return false; |
2722 | 2755 | ||
2723 | intel_sdvo->sdvo_reg = sdvo_reg; |
2756 | intel_sdvo->sdvo_reg = sdvo_reg; |
2724 | intel_sdvo->is_sdvob = is_sdvob; |
2757 | intel_sdvo->is_sdvob = is_sdvob; |
2725 | intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1; |
2758 | intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1; |
2726 | intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg); |
2759 | intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg); |
2727 | if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) |
2760 | if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) |
2728 | goto err_i2c_bus; |
2761 | goto err_i2c_bus; |
2729 | 2762 | ||
2730 | /* encoder type will be decided later */ |
2763 | /* encoder type will be decided later */ |
2731 | intel_encoder = &intel_sdvo->base; |
2764 | intel_encoder = &intel_sdvo->base; |
2732 | intel_encoder->type = INTEL_OUTPUT_SDVO; |
2765 | intel_encoder->type = INTEL_OUTPUT_SDVO; |
2733 | drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); |
2766 | drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); |
2734 | 2767 | ||
2735 | /* Read the regs to test if we can talk to the device */ |
2768 | /* Read the regs to test if we can talk to the device */ |
2736 | for (i = 0; i < 0x40; i++) { |
2769 | for (i = 0; i < 0x40; i++) { |
2737 | u8 byte; |
2770 | u8 byte; |
2738 | 2771 | ||
2739 | if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { |
2772 | if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { |
2740 | DRM_DEBUG_KMS("No SDVO device found on %s\n", |
2773 | DRM_DEBUG_KMS("No SDVO device found on %s\n", |
2741 | SDVO_NAME(intel_sdvo)); |
2774 | SDVO_NAME(intel_sdvo)); |
2742 | goto err; |
2775 | goto err; |
2743 | } |
2776 | } |
2744 | } |
2777 | } |
2745 | 2778 | ||
2746 | hotplug_mask = 0; |
2779 | hotplug_mask = 0; |
2747 | if (IS_G4X(dev)) { |
2780 | if (IS_G4X(dev)) { |
2748 | hotplug_mask = intel_sdvo->is_sdvob ? |
2781 | hotplug_mask = intel_sdvo->is_sdvob ? |
2749 | SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X; |
2782 | SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X; |
2750 | } else if (IS_GEN4(dev)) { |
2783 | } else if (IS_GEN4(dev)) { |
2751 | hotplug_mask = intel_sdvo->is_sdvob ? |
2784 | hotplug_mask = intel_sdvo->is_sdvob ? |
2752 | SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965; |
2785 | SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965; |
2753 | } else { |
2786 | } else { |
2754 | hotplug_mask = intel_sdvo->is_sdvob ? |
2787 | hotplug_mask = intel_sdvo->is_sdvob ? |
2755 | SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915; |
2788 | SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915; |
2756 | } |
2789 | } |
2757 | 2790 | ||
2758 | drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs); |
2791 | drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs); |
2759 | 2792 | ||
2760 | intel_encoder->disable = intel_disable_sdvo; |
2793 | intel_encoder->disable = intel_disable_sdvo; |
2761 | intel_encoder->enable = intel_enable_sdvo; |
2794 | intel_encoder->enable = intel_enable_sdvo; |
2762 | intel_encoder->get_hw_state = intel_sdvo_get_hw_state; |
2795 | intel_encoder->get_hw_state = intel_sdvo_get_hw_state; |
2763 | 2796 | ||
2764 | /* In default case sdvo lvds is false */ |
2797 | /* In default case sdvo lvds is false */ |
2765 | if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) |
2798 | if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) |
2766 | goto err; |
2799 | goto err; |
2767 | 2800 | ||
2768 | if (intel_sdvo_output_setup(intel_sdvo, |
2801 | if (intel_sdvo_output_setup(intel_sdvo, |
2769 | intel_sdvo->caps.output_flags) != true) { |
2802 | intel_sdvo->caps.output_flags) != true) { |
2770 | DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", |
2803 | DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", |
2771 | SDVO_NAME(intel_sdvo)); |
2804 | SDVO_NAME(intel_sdvo)); |
2772 | /* Output_setup can leave behind connectors! */ |
2805 | /* Output_setup can leave behind connectors! */ |
2773 | goto err_output; |
2806 | goto err_output; |
2774 | } |
2807 | } |
2775 | 2808 | ||
2776 | /* |
2809 | /* |
2777 | * Cloning SDVO with anything is often impossible, since the SDVO |
2810 | * Cloning SDVO with anything is often impossible, since the SDVO |
2778 | * encoder can request a special input timing mode. And even if that's |
2811 | * encoder can request a special input timing mode. And even if that's |
2779 | * not the case we have evidence that cloning a plain unscaled mode with |
2812 | * not the case we have evidence that cloning a plain unscaled mode with |
2780 | * VGA doesn't really work. Furthermore the cloning flags are way too |
2813 | * VGA doesn't really work. Furthermore the cloning flags are way too |
2781 | * simplistic anyway to express such constraints, so just give up on |
2814 | * simplistic anyway to express such constraints, so just give up on |
2782 | * cloning for SDVO encoders. |
2815 | * cloning for SDVO encoders. |
2783 | */ |
2816 | */ |
2784 | intel_sdvo->base.cloneable = false; |
2817 | intel_sdvo->base.cloneable = false; |
2785 | 2818 | ||
2786 | /* Only enable the hotplug irq if we need it, to work around noisy |
2819 | /* Only enable the hotplug irq if we need it, to work around noisy |
2787 | * hotplug lines. |
2820 | * hotplug lines. |
2788 | */ |
2821 | */ |
2789 | if (intel_sdvo->hotplug_active) |
2822 | if (intel_sdvo->hotplug_active) |
2790 | dev_priv->hotplug_supported_mask |= hotplug_mask; |
2823 | dev_priv->hotplug_supported_mask |= hotplug_mask; |
2791 | 2824 | ||
2792 | intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); |
2825 | intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); |
2793 | 2826 | ||
2794 | /* Set the input timing to the screen. Assume always input 0. */ |
2827 | /* Set the input timing to the screen. Assume always input 0. */ |
2795 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
2828 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
2796 | goto err_output; |
2829 | goto err_output; |
2797 | 2830 | ||
2798 | if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, |
2831 | if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, |
2799 | &intel_sdvo->pixel_clock_min, |
2832 | &intel_sdvo->pixel_clock_min, |
2800 | &intel_sdvo->pixel_clock_max)) |
2833 | &intel_sdvo->pixel_clock_max)) |
2801 | goto err_output; |
2834 | goto err_output; |
2802 | 2835 | ||
2803 | DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " |
2836 | DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " |
2804 | "clock range %dMHz - %dMHz, " |
2837 | "clock range %dMHz - %dMHz, " |
2805 | "input 1: %c, input 2: %c, " |
2838 | "input 1: %c, input 2: %c, " |
2806 | "output 1: %c, output 2: %c\n", |
2839 | "output 1: %c, output 2: %c\n", |
2807 | SDVO_NAME(intel_sdvo), |
2840 | SDVO_NAME(intel_sdvo), |
2808 | intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, |
2841 | intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, |
2809 | intel_sdvo->caps.device_rev_id, |
2842 | intel_sdvo->caps.device_rev_id, |
2810 | intel_sdvo->pixel_clock_min / 1000, |
2843 | intel_sdvo->pixel_clock_min / 1000, |
2811 | intel_sdvo->pixel_clock_max / 1000, |
2844 | intel_sdvo->pixel_clock_max / 1000, |
2812 | (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', |
2845 | (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', |
2813 | (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', |
2846 | (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', |
2814 | /* check currently supported outputs */ |
2847 | /* check currently supported outputs */ |
2815 | intel_sdvo->caps.output_flags & |
2848 | intel_sdvo->caps.output_flags & |
2816 | (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', |
2849 | (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', |
2817 | intel_sdvo->caps.output_flags & |
2850 | intel_sdvo->caps.output_flags & |
2818 | (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); |
2851 | (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); |
2819 | return true; |
2852 | return true; |
2820 | 2853 | ||
2821 | err_output: |
2854 | err_output: |
2822 | intel_sdvo_output_cleanup(intel_sdvo); |
2855 | intel_sdvo_output_cleanup(intel_sdvo); |
2823 | 2856 | ||
2824 | err: |
2857 | err: |
2825 | drm_encoder_cleanup(&intel_encoder->base); |
2858 | drm_encoder_cleanup(&intel_encoder->base); |
2826 | i2c_del_adapter(&intel_sdvo->ddc); |
2859 | i2c_del_adapter(&intel_sdvo->ddc); |
2827 | err_i2c_bus: |
2860 | err_i2c_bus: |
2828 | intel_sdvo_unselect_i2c_bus(intel_sdvo); |
2861 | intel_sdvo_unselect_i2c_bus(intel_sdvo); |
2829 | kfree(intel_sdvo); |
2862 | kfree(intel_sdvo); |
2830 | 2863 | ||
2831 | return false; |
2864 | return false; |
2832 | }>>><>>><>><>><>><>><>>><>>><>>>>><>><>>><>>>=>=>><>><>><>><>><>><>><>><>><>><>><>>=>>>>>>>> |
2865 | }>>><>>><>><>><>><>><>>><>>><>>>>><>><>>><>>>=>=>><>><>><>><>><>><>><>><>><>><>><>>=>>>>>>>> |