Rev 3031 | Rev 3243 | Go to most recent revision | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 3031 | Rev 3120 | ||
---|---|---|---|
1 | /* |
1 | /* |
2 | * Copyright 2006 Dave Airlie |
2 | * Copyright 2006 Dave Airlie |
3 | * Copyright © 2006-2007 Intel Corporation |
3 | * Copyright © 2006-2007 Intel Corporation |
4 | * Jesse Barnes |
4 | * Jesse Barnes |
5 | * |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), |
7 | * copy of this software and associated documentation files (the "Software"), |
8 | * to deal in the Software without restriction, including without limitation |
8 | * to deal in the Software without restriction, including without limitation |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
11 | * Software is furnished to do so, subject to the following conditions: |
11 | * Software is furnished to do so, subject to the following conditions: |
12 | * |
12 | * |
13 | * The above copyright notice and this permission notice (including the next |
13 | * The above copyright notice and this permission notice (including the next |
14 | * paragraph) shall be included in all copies or substantial portions of the |
14 | * paragraph) shall be included in all copies or substantial portions of the |
15 | * Software. |
15 | * Software. |
16 | * |
16 | * |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
23 | * DEALINGS IN THE SOFTWARE. |
23 | * DEALINGS IN THE SOFTWARE. |
24 | * |
24 | * |
25 | * Authors: |
25 | * Authors: |
26 | * Eric Anholt |
26 | * Eric Anholt |
27 | */ |
27 | */ |
28 | #include |
28 | #include |
29 | #include |
29 | #include |
30 | //#include |
30 | //#include |
31 | #include |
31 | #include |
32 | #include |
32 | #include |
33 | #include |
33 | #include |
34 | #include |
34 | #include |
35 | #include "intel_drv.h" |
35 | #include "intel_drv.h" |
36 | #include |
36 | #include |
37 | #include "i915_drv.h" |
37 | #include "i915_drv.h" |
38 | #include "intel_sdvo_regs.h" |
38 | #include "intel_sdvo_regs.h" |
39 | 39 | ||
40 | unsigned int hweight16(unsigned int w) |
40 | unsigned int hweight16(unsigned int w) |
41 | { |
41 | { |
42 | unsigned int res = w - ((w >> 1) & 0x5555); |
42 | unsigned int res = w - ((w >> 1) & 0x5555); |
43 | res = (res & 0x3333) + ((res >> 2) & 0x3333); |
43 | res = (res & 0x3333) + ((res >> 2) & 0x3333); |
44 | res = (res + (res >> 4)) & 0x0F0F; |
44 | res = (res + (res >> 4)) & 0x0F0F; |
45 | return (res + (res >> 8)) & 0x00FF; |
45 | return (res + (res >> 8)) & 0x00FF; |
46 | } |
46 | } |
47 | 47 | ||
48 | 48 | ||
49 | #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) |
49 | #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) |
50 | #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) |
50 | #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) |
51 | #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) |
51 | #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) |
52 | #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) |
52 | #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) |
53 | 53 | ||
54 | #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ |
54 | #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ |
55 | SDVO_TV_MASK) |
55 | SDVO_TV_MASK) |
56 | 56 | ||
57 | #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) |
57 | #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) |
58 | #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) |
58 | #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) |
59 | #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) |
59 | #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) |
60 | #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) |
60 | #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) |
61 | #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) |
61 | #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) |
62 | 62 | ||
63 | 63 | ||
64 | static const char *tv_format_names[] = { |
64 | static const char *tv_format_names[] = { |
65 | "NTSC_M" , "NTSC_J" , "NTSC_443", |
65 | "NTSC_M" , "NTSC_J" , "NTSC_443", |
66 | "PAL_B" , "PAL_D" , "PAL_G" , |
66 | "PAL_B" , "PAL_D" , "PAL_G" , |
67 | "PAL_H" , "PAL_I" , "PAL_M" , |
67 | "PAL_H" , "PAL_I" , "PAL_M" , |
68 | "PAL_N" , "PAL_NC" , "PAL_60" , |
68 | "PAL_N" , "PAL_NC" , "PAL_60" , |
69 | "SECAM_B" , "SECAM_D" , "SECAM_G" , |
69 | "SECAM_B" , "SECAM_D" , "SECAM_G" , |
70 | "SECAM_K" , "SECAM_K1", "SECAM_L" , |
70 | "SECAM_K" , "SECAM_K1", "SECAM_L" , |
71 | "SECAM_60" |
71 | "SECAM_60" |
72 | }; |
72 | }; |
73 | 73 | ||
74 | #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) |
74 | #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) |
75 | 75 | ||
76 | struct intel_sdvo { |
76 | struct intel_sdvo { |
77 | struct intel_encoder base; |
77 | struct intel_encoder base; |
78 | 78 | ||
79 | struct i2c_adapter *i2c; |
79 | struct i2c_adapter *i2c; |
80 | u8 slave_addr; |
80 | u8 slave_addr; |
81 | 81 | ||
82 | struct i2c_adapter ddc; |
82 | struct i2c_adapter ddc; |
83 | 83 | ||
84 | /* Register for the SDVO device: SDVOB or SDVOC */ |
84 | /* Register for the SDVO device: SDVOB or SDVOC */ |
85 | uint32_t sdvo_reg; |
85 | uint32_t sdvo_reg; |
86 | 86 | ||
87 | /* Active outputs controlled by this SDVO output */ |
87 | /* Active outputs controlled by this SDVO output */ |
88 | uint16_t controlled_output; |
88 | uint16_t controlled_output; |
89 | 89 | ||
90 | /* |
90 | /* |
91 | * Capabilities of the SDVO device returned by |
91 | * Capabilities of the SDVO device returned by |
92 | * i830_sdvo_get_capabilities() |
92 | * i830_sdvo_get_capabilities() |
93 | */ |
93 | */ |
94 | struct intel_sdvo_caps caps; |
94 | struct intel_sdvo_caps caps; |
95 | 95 | ||
96 | /* Pixel clock limitations reported by the SDVO device, in kHz */ |
96 | /* Pixel clock limitations reported by the SDVO device, in kHz */ |
97 | int pixel_clock_min, pixel_clock_max; |
97 | int pixel_clock_min, pixel_clock_max; |
98 | 98 | ||
99 | /* |
99 | /* |
100 | * For multiple function SDVO device, |
100 | * For multiple function SDVO device, |
101 | * this is for current attached outputs. |
101 | * this is for current attached outputs. |
102 | */ |
102 | */ |
103 | uint16_t attached_output; |
103 | uint16_t attached_output; |
104 | 104 | ||
105 | /* |
105 | /* |
106 | * Hotplug activation bits for this device |
106 | * Hotplug activation bits for this device |
107 | */ |
107 | */ |
108 | uint16_t hotplug_active; |
108 | uint16_t hotplug_active; |
109 | 109 | ||
110 | /** |
110 | /** |
111 | * This is used to select the color range of RBG outputs in HDMI mode. |
111 | * This is used to select the color range of RBG outputs in HDMI mode. |
112 | * It is only valid when using TMDS encoding and 8 bit per color mode. |
112 | * It is only valid when using TMDS encoding and 8 bit per color mode. |
113 | */ |
113 | */ |
114 | uint32_t color_range; |
114 | uint32_t color_range; |
115 | 115 | ||
116 | /** |
116 | /** |
117 | * This is set if we're going to treat the device as TV-out. |
117 | * This is set if we're going to treat the device as TV-out. |
118 | * |
118 | * |
119 | * While we have these nice friendly flags for output types that ought |
119 | * While we have these nice friendly flags for output types that ought |
120 | * to decide this for us, the S-Video output on our HDMI+S-Video card |
120 | * to decide this for us, the S-Video output on our HDMI+S-Video card |
121 | * shows up as RGB1 (VGA). |
121 | * shows up as RGB1 (VGA). |
122 | */ |
122 | */ |
123 | bool is_tv; |
123 | bool is_tv; |
124 | 124 | ||
125 | /* On different gens SDVOB is at different places. */ |
125 | /* On different gens SDVOB is at different places. */ |
126 | bool is_sdvob; |
126 | bool is_sdvob; |
127 | 127 | ||
128 | /* This is for current tv format name */ |
128 | /* This is for current tv format name */ |
129 | int tv_format_index; |
129 | int tv_format_index; |
130 | 130 | ||
131 | /** |
131 | /** |
132 | * This is set if we treat the device as HDMI, instead of DVI. |
132 | * This is set if we treat the device as HDMI, instead of DVI. |
133 | */ |
133 | */ |
134 | bool is_hdmi; |
134 | bool is_hdmi; |
135 | bool has_hdmi_monitor; |
135 | bool has_hdmi_monitor; |
136 | bool has_hdmi_audio; |
136 | bool has_hdmi_audio; |
137 | 137 | ||
138 | /** |
138 | /** |
139 | * This is set if we detect output of sdvo device as LVDS and |
139 | * This is set if we detect output of sdvo device as LVDS and |
140 | * have a valid fixed mode to use with the panel. |
140 | * have a valid fixed mode to use with the panel. |
141 | */ |
141 | */ |
142 | bool is_lvds; |
142 | bool is_lvds; |
143 | 143 | ||
144 | /** |
144 | /** |
145 | * This is sdvo fixed pannel mode pointer |
145 | * This is sdvo fixed pannel mode pointer |
146 | */ |
146 | */ |
147 | struct drm_display_mode *sdvo_lvds_fixed_mode; |
147 | struct drm_display_mode *sdvo_lvds_fixed_mode; |
148 | 148 | ||
149 | /* DDC bus used by this SDVO encoder */ |
149 | /* DDC bus used by this SDVO encoder */ |
150 | uint8_t ddc_bus; |
150 | uint8_t ddc_bus; |
151 | 151 | ||
152 | /* |
152 | /* |
153 | * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd |
153 | * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd |
154 | */ |
154 | */ |
155 | uint8_t dtd_sdvo_flags; |
155 | uint8_t dtd_sdvo_flags; |
156 | }; |
156 | }; |
157 | 157 | ||
158 | struct intel_sdvo_connector { |
158 | struct intel_sdvo_connector { |
159 | struct intel_connector base; |
159 | struct intel_connector base; |
160 | 160 | ||
161 | /* Mark the type of connector */ |
161 | /* Mark the type of connector */ |
162 | uint16_t output_flag; |
162 | uint16_t output_flag; |
163 | 163 | ||
164 | enum hdmi_force_audio force_audio; |
164 | enum hdmi_force_audio force_audio; |
165 | 165 | ||
166 | /* This contains all current supported TV format */ |
166 | /* This contains all current supported TV format */ |
167 | u8 tv_format_supported[TV_FORMAT_NUM]; |
167 | u8 tv_format_supported[TV_FORMAT_NUM]; |
168 | int format_supported_num; |
168 | int format_supported_num; |
169 | struct drm_property *tv_format; |
169 | struct drm_property *tv_format; |
170 | 170 | ||
171 | /* add the property for the SDVO-TV */ |
171 | /* add the property for the SDVO-TV */ |
172 | struct drm_property *left; |
172 | struct drm_property *left; |
173 | struct drm_property *right; |
173 | struct drm_property *right; |
174 | struct drm_property *top; |
174 | struct drm_property *top; |
175 | struct drm_property *bottom; |
175 | struct drm_property *bottom; |
176 | struct drm_property *hpos; |
176 | struct drm_property *hpos; |
177 | struct drm_property *vpos; |
177 | struct drm_property *vpos; |
178 | struct drm_property *contrast; |
178 | struct drm_property *contrast; |
179 | struct drm_property *saturation; |
179 | struct drm_property *saturation; |
180 | struct drm_property *hue; |
180 | struct drm_property *hue; |
181 | struct drm_property *sharpness; |
181 | struct drm_property *sharpness; |
182 | struct drm_property *flicker_filter; |
182 | struct drm_property *flicker_filter; |
183 | struct drm_property *flicker_filter_adaptive; |
183 | struct drm_property *flicker_filter_adaptive; |
184 | struct drm_property *flicker_filter_2d; |
184 | struct drm_property *flicker_filter_2d; |
185 | struct drm_property *tv_chroma_filter; |
185 | struct drm_property *tv_chroma_filter; |
186 | struct drm_property *tv_luma_filter; |
186 | struct drm_property *tv_luma_filter; |
187 | struct drm_property *dot_crawl; |
187 | struct drm_property *dot_crawl; |
188 | 188 | ||
189 | /* add the property for the SDVO-TV/LVDS */ |
189 | /* add the property for the SDVO-TV/LVDS */ |
190 | struct drm_property *brightness; |
190 | struct drm_property *brightness; |
191 | 191 | ||
192 | /* Add variable to record current setting for the above property */ |
192 | /* Add variable to record current setting for the above property */ |
193 | u32 left_margin, right_margin, top_margin, bottom_margin; |
193 | u32 left_margin, right_margin, top_margin, bottom_margin; |
194 | 194 | ||
195 | /* this is to get the range of margin.*/ |
195 | /* this is to get the range of margin.*/ |
196 | u32 max_hscan, max_vscan; |
196 | u32 max_hscan, max_vscan; |
197 | u32 max_hpos, cur_hpos; |
197 | u32 max_hpos, cur_hpos; |
198 | u32 max_vpos, cur_vpos; |
198 | u32 max_vpos, cur_vpos; |
199 | u32 cur_brightness, max_brightness; |
199 | u32 cur_brightness, max_brightness; |
200 | u32 cur_contrast, max_contrast; |
200 | u32 cur_contrast, max_contrast; |
201 | u32 cur_saturation, max_saturation; |
201 | u32 cur_saturation, max_saturation; |
202 | u32 cur_hue, max_hue; |
202 | u32 cur_hue, max_hue; |
203 | u32 cur_sharpness, max_sharpness; |
203 | u32 cur_sharpness, max_sharpness; |
204 | u32 cur_flicker_filter, max_flicker_filter; |
204 | u32 cur_flicker_filter, max_flicker_filter; |
205 | u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; |
205 | u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; |
206 | u32 cur_flicker_filter_2d, max_flicker_filter_2d; |
206 | u32 cur_flicker_filter_2d, max_flicker_filter_2d; |
207 | u32 cur_tv_chroma_filter, max_tv_chroma_filter; |
207 | u32 cur_tv_chroma_filter, max_tv_chroma_filter; |
208 | u32 cur_tv_luma_filter, max_tv_luma_filter; |
208 | u32 cur_tv_luma_filter, max_tv_luma_filter; |
209 | u32 cur_dot_crawl, max_dot_crawl; |
209 | u32 cur_dot_crawl, max_dot_crawl; |
210 | }; |
210 | }; |
211 | 211 | ||
212 | static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder) |
212 | static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder) |
213 | { |
213 | { |
214 | return container_of(encoder, struct intel_sdvo, base.base); |
214 | return container_of(encoder, struct intel_sdvo, base.base); |
215 | } |
215 | } |
216 | 216 | ||
217 | static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) |
217 | static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) |
218 | { |
218 | { |
219 | return container_of(intel_attached_encoder(connector), |
219 | return container_of(intel_attached_encoder(connector), |
220 | struct intel_sdvo, base); |
220 | struct intel_sdvo, base); |
221 | } |
221 | } |
222 | 222 | ||
223 | static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector) |
223 | static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector) |
224 | { |
224 | { |
225 | return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base); |
225 | return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base); |
226 | } |
226 | } |
227 | 227 | ||
228 | static bool |
228 | static bool |
229 | intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags); |
229 | intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags); |
230 | static bool |
230 | static bool |
231 | intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, |
231 | intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, |
232 | struct intel_sdvo_connector *intel_sdvo_connector, |
232 | struct intel_sdvo_connector *intel_sdvo_connector, |
233 | int type); |
233 | int type); |
234 | static bool |
234 | static bool |
235 | intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, |
235 | intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, |
236 | struct intel_sdvo_connector *intel_sdvo_connector); |
236 | struct intel_sdvo_connector *intel_sdvo_connector); |
237 | 237 | ||
238 | /** |
238 | /** |
239 | * Writes the SDVOB or SDVOC with the given value, but always writes both |
239 | * Writes the SDVOB or SDVOC with the given value, but always writes both |
240 | * SDVOB and SDVOC to work around apparent hardware issues (according to |
240 | * SDVOB and SDVOC to work around apparent hardware issues (according to |
241 | * comments in the BIOS). |
241 | * comments in the BIOS). |
242 | */ |
242 | */ |
243 | static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) |
243 | static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) |
244 | { |
244 | { |
245 | struct drm_device *dev = intel_sdvo->base.base.dev; |
245 | struct drm_device *dev = intel_sdvo->base.base.dev; |
246 | struct drm_i915_private *dev_priv = dev->dev_private; |
246 | struct drm_i915_private *dev_priv = dev->dev_private; |
247 | u32 bval = val, cval = val; |
247 | u32 bval = val, cval = val; |
248 | int i; |
248 | int i; |
249 | 249 | ||
250 | if (intel_sdvo->sdvo_reg == PCH_SDVOB) { |
250 | if (intel_sdvo->sdvo_reg == PCH_SDVOB) { |
251 | I915_WRITE(intel_sdvo->sdvo_reg, val); |
251 | I915_WRITE(intel_sdvo->sdvo_reg, val); |
252 | I915_READ(intel_sdvo->sdvo_reg); |
252 | I915_READ(intel_sdvo->sdvo_reg); |
253 | return; |
253 | return; |
254 | } |
254 | } |
255 | 255 | ||
256 | if (intel_sdvo->sdvo_reg == SDVOB) { |
256 | if (intel_sdvo->sdvo_reg == SDVOB) { |
257 | cval = I915_READ(SDVOC); |
257 | cval = I915_READ(SDVOC); |
258 | } else { |
258 | } else { |
259 | bval = I915_READ(SDVOB); |
259 | bval = I915_READ(SDVOB); |
260 | } |
260 | } |
261 | /* |
261 | /* |
262 | * Write the registers twice for luck. Sometimes, |
262 | * Write the registers twice for luck. Sometimes, |
263 | * writing them only once doesn't appear to 'stick'. |
263 | * writing them only once doesn't appear to 'stick'. |
264 | * The BIOS does this too. Yay, magic |
264 | * The BIOS does this too. Yay, magic |
265 | */ |
265 | */ |
266 | for (i = 0; i < 2; i++) |
266 | for (i = 0; i < 2; i++) |
267 | { |
267 | { |
268 | I915_WRITE(SDVOB, bval); |
268 | I915_WRITE(SDVOB, bval); |
269 | I915_READ(SDVOB); |
269 | I915_READ(SDVOB); |
270 | I915_WRITE(SDVOC, cval); |
270 | I915_WRITE(SDVOC, cval); |
271 | I915_READ(SDVOC); |
271 | I915_READ(SDVOC); |
272 | } |
272 | } |
273 | } |
273 | } |
274 | 274 | ||
275 | static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) |
275 | static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) |
276 | { |
276 | { |
277 | struct i2c_msg msgs[] = { |
277 | struct i2c_msg msgs[] = { |
278 | { |
278 | { |
279 | .addr = intel_sdvo->slave_addr, |
279 | .addr = intel_sdvo->slave_addr, |
280 | .flags = 0, |
280 | .flags = 0, |
281 | .len = 1, |
281 | .len = 1, |
282 | .buf = &addr, |
282 | .buf = &addr, |
283 | }, |
283 | }, |
284 | { |
284 | { |
285 | .addr = intel_sdvo->slave_addr, |
285 | .addr = intel_sdvo->slave_addr, |
286 | .flags = I2C_M_RD, |
286 | .flags = I2C_M_RD, |
287 | .len = 1, |
287 | .len = 1, |
288 | .buf = ch, |
288 | .buf = ch, |
289 | } |
289 | } |
290 | }; |
290 | }; |
291 | int ret; |
291 | int ret; |
292 | 292 | ||
293 | if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2) |
293 | if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2) |
294 | return true; |
294 | return true; |
295 | 295 | ||
296 | DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); |
296 | DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); |
297 | return false; |
297 | return false; |
298 | } |
298 | } |
299 | 299 | ||
300 | #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} |
300 | #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} |
301 | /** Mapping of command numbers to names, for debug output */ |
301 | /** Mapping of command numbers to names, for debug output */ |
302 | static const struct _sdvo_cmd_name { |
302 | static const struct _sdvo_cmd_name { |
303 | u8 cmd; |
303 | u8 cmd; |
304 | const char *name; |
304 | const char *name; |
305 | } sdvo_cmd_names[] = { |
305 | } sdvo_cmd_names[] = { |
306 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), |
306 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), |
307 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), |
307 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), |
308 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), |
308 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), |
309 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), |
309 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), |
310 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), |
310 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), |
311 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), |
311 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), |
312 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), |
312 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), |
313 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), |
313 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), |
314 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), |
314 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), |
315 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), |
315 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), |
316 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), |
316 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), |
317 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), |
317 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), |
318 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), |
318 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), |
319 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), |
319 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), |
320 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), |
320 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), |
321 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), |
321 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), |
322 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), |
322 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), |
323 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
323 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
324 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), |
324 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), |
325 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
325 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
326 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), |
326 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), |
327 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), |
327 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), |
328 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), |
328 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), |
329 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), |
329 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), |
330 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), |
330 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), |
331 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), |
331 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), |
332 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), |
332 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), |
333 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), |
333 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), |
334 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), |
334 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), |
335 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), |
335 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), |
336 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), |
336 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), |
337 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), |
337 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), |
338 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), |
338 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), |
339 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), |
339 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), |
340 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), |
340 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), |
341 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), |
341 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), |
342 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), |
342 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), |
343 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), |
343 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), |
344 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), |
344 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), |
345 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), |
345 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), |
346 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), |
346 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), |
347 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), |
347 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), |
348 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), |
348 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), |
349 | 349 | ||
350 | /* Add the op code for SDVO enhancements */ |
350 | /* Add the op code for SDVO enhancements */ |
351 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), |
351 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), |
352 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), |
352 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), |
353 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), |
353 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), |
354 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), |
354 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), |
355 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), |
355 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), |
356 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), |
356 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), |
357 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), |
357 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), |
358 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), |
358 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), |
359 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), |
359 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), |
360 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), |
360 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), |
361 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), |
361 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), |
362 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), |
362 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), |
363 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), |
363 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), |
364 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), |
364 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), |
365 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), |
365 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), |
366 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), |
366 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), |
367 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), |
367 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), |
368 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), |
368 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), |
369 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), |
369 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), |
370 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), |
370 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), |
371 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), |
371 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), |
372 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), |
372 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), |
373 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), |
373 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), |
374 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), |
374 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), |
375 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), |
375 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), |
376 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), |
376 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), |
377 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), |
377 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), |
378 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), |
378 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), |
379 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), |
379 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), |
380 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), |
380 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), |
381 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), |
381 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), |
382 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), |
382 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), |
383 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), |
383 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), |
384 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), |
384 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), |
385 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), |
385 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), |
386 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), |
386 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), |
387 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), |
387 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), |
388 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), |
388 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), |
389 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), |
389 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), |
390 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), |
390 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), |
391 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), |
391 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), |
392 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), |
392 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), |
393 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), |
393 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), |
394 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), |
394 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), |
395 | 395 | ||
396 | /* HDMI op code */ |
396 | /* HDMI op code */ |
397 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), |
397 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), |
398 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), |
398 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), |
399 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), |
399 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), |
400 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), |
400 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), |
401 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), |
401 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), |
402 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), |
402 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), |
403 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), |
403 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), |
404 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), |
404 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), |
405 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), |
405 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), |
406 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), |
406 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), |
407 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), |
407 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), |
408 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), |
408 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), |
409 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), |
409 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), |
410 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), |
410 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), |
411 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), |
411 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), |
412 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), |
412 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), |
413 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), |
413 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), |
414 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), |
414 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), |
415 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), |
415 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), |
416 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), |
416 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), |
417 | }; |
417 | }; |
418 | 418 | ||
419 | #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC") |
419 | #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC") |
420 | 420 | ||
421 | static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, |
421 | static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, |
422 | const void *args, int args_len) |
422 | const void *args, int args_len) |
423 | { |
423 | { |
424 | int i; |
424 | int i; |
425 | 425 | ||
426 | DRM_DEBUG_KMS("%s: W: %02X ", |
426 | DRM_DEBUG_KMS("%s: W: %02X ", |
427 | SDVO_NAME(intel_sdvo), cmd); |
427 | SDVO_NAME(intel_sdvo), cmd); |
428 | for (i = 0; i < args_len; i++) |
428 | for (i = 0; i < args_len; i++) |
429 | DRM_LOG_KMS("%02X ", ((u8 *)args)[i]); |
429 | DRM_LOG_KMS("%02X ", ((u8 *)args)[i]); |
430 | for (; i < 8; i++) |
430 | for (; i < 8; i++) |
431 | DRM_LOG_KMS(" "); |
431 | DRM_LOG_KMS(" "); |
432 | for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { |
432 | for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { |
433 | if (cmd == sdvo_cmd_names[i].cmd) { |
433 | if (cmd == sdvo_cmd_names[i].cmd) { |
434 | DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name); |
434 | DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name); |
435 | break; |
435 | break; |
436 | } |
436 | } |
437 | } |
437 | } |
438 | if (i == ARRAY_SIZE(sdvo_cmd_names)) |
438 | if (i == ARRAY_SIZE(sdvo_cmd_names)) |
439 | DRM_LOG_KMS("(%02X)", cmd); |
439 | DRM_LOG_KMS("(%02X)", cmd); |
440 | DRM_LOG_KMS("\n"); |
440 | DRM_LOG_KMS("\n"); |
441 | } |
441 | } |
442 | 442 | ||
443 | static const char *cmd_status_names[] = { |
443 | static const char *cmd_status_names[] = { |
444 | "Power on", |
444 | "Power on", |
445 | "Success", |
445 | "Success", |
446 | "Not supported", |
446 | "Not supported", |
447 | "Invalid arg", |
447 | "Invalid arg", |
448 | "Pending", |
448 | "Pending", |
449 | "Target not specified", |
449 | "Target not specified", |
450 | "Scaling not supported" |
450 | "Scaling not supported" |
451 | }; |
451 | }; |
452 | 452 | ||
453 | static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, |
453 | static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, |
454 | const void *args, int args_len) |
454 | const void *args, int args_len) |
455 | { |
455 | { |
456 | u8 *buf, status; |
456 | u8 *buf, status; |
457 | struct i2c_msg *msgs; |
457 | struct i2c_msg *msgs; |
458 | int i, ret = true; |
458 | int i, ret = true; |
459 | 459 | ||
460 | /* Would be simpler to allocate both in one go ? */ |
460 | /* Would be simpler to allocate both in one go ? */ |
461 | buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL); |
461 | buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL); |
462 | if (!buf) |
462 | if (!buf) |
463 | return false; |
463 | return false; |
464 | 464 | ||
465 | msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL); |
465 | msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL); |
466 | if (!msgs) { |
466 | if (!msgs) { |
467 | kfree(buf); |
467 | kfree(buf); |
468 | return false; |
468 | return false; |
469 | } |
469 | } |
470 | 470 | ||
471 | intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); |
471 | intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); |
472 | 472 | ||
473 | for (i = 0; i < args_len; i++) { |
473 | for (i = 0; i < args_len; i++) { |
474 | msgs[i].addr = intel_sdvo->slave_addr; |
474 | msgs[i].addr = intel_sdvo->slave_addr; |
475 | msgs[i].flags = 0; |
475 | msgs[i].flags = 0; |
476 | msgs[i].len = 2; |
476 | msgs[i].len = 2; |
477 | msgs[i].buf = buf + 2 *i; |
477 | msgs[i].buf = buf + 2 *i; |
478 | buf[2*i + 0] = SDVO_I2C_ARG_0 - i; |
478 | buf[2*i + 0] = SDVO_I2C_ARG_0 - i; |
479 | buf[2*i + 1] = ((u8*)args)[i]; |
479 | buf[2*i + 1] = ((u8*)args)[i]; |
480 | } |
480 | } |
481 | msgs[i].addr = intel_sdvo->slave_addr; |
481 | msgs[i].addr = intel_sdvo->slave_addr; |
482 | msgs[i].flags = 0; |
482 | msgs[i].flags = 0; |
483 | msgs[i].len = 2; |
483 | msgs[i].len = 2; |
484 | msgs[i].buf = buf + 2*i; |
484 | msgs[i].buf = buf + 2*i; |
485 | buf[2*i + 0] = SDVO_I2C_OPCODE; |
485 | buf[2*i + 0] = SDVO_I2C_OPCODE; |
486 | buf[2*i + 1] = cmd; |
486 | buf[2*i + 1] = cmd; |
487 | 487 | ||
488 | /* the following two are to read the response */ |
488 | /* the following two are to read the response */ |
489 | status = SDVO_I2C_CMD_STATUS; |
489 | status = SDVO_I2C_CMD_STATUS; |
490 | msgs[i+1].addr = intel_sdvo->slave_addr; |
490 | msgs[i+1].addr = intel_sdvo->slave_addr; |
491 | msgs[i+1].flags = 0; |
491 | msgs[i+1].flags = 0; |
492 | msgs[i+1].len = 1; |
492 | msgs[i+1].len = 1; |
493 | msgs[i+1].buf = &status; |
493 | msgs[i+1].buf = &status; |
494 | 494 | ||
495 | msgs[i+2].addr = intel_sdvo->slave_addr; |
495 | msgs[i+2].addr = intel_sdvo->slave_addr; |
496 | msgs[i+2].flags = I2C_M_RD; |
496 | msgs[i+2].flags = I2C_M_RD; |
497 | msgs[i+2].len = 1; |
497 | msgs[i+2].len = 1; |
498 | msgs[i+2].buf = &status; |
498 | msgs[i+2].buf = &status; |
499 | 499 | ||
500 | ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3); |
500 | ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3); |
501 | if (ret < 0) { |
501 | if (ret < 0) { |
502 | DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); |
502 | DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); |
503 | ret = false; |
503 | ret = false; |
504 | goto out; |
504 | goto out; |
505 | } |
505 | } |
506 | if (ret != i+3) { |
506 | if (ret != i+3) { |
507 | /* failure in I2C transfer */ |
507 | /* failure in I2C transfer */ |
508 | DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); |
508 | DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); |
509 | ret = false; |
509 | ret = false; |
510 | } |
510 | } |
511 | 511 | ||
512 | out: |
512 | out: |
513 | kfree(msgs); |
513 | kfree(msgs); |
514 | kfree(buf); |
514 | kfree(buf); |
515 | return ret; |
515 | return ret; |
516 | } |
516 | } |
517 | 517 | ||
518 | static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, |
518 | static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, |
519 | void *response, int response_len) |
519 | void *response, int response_len) |
520 | { |
520 | { |
521 | u8 retry = 5; |
521 | u8 retry = 5; |
522 | u8 status; |
522 | u8 status; |
523 | int i; |
523 | int i; |
524 | 524 | ||
525 | DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo)); |
525 | DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo)); |
526 | 526 | ||
527 | /* |
527 | /* |
528 | * The documentation states that all commands will be |
528 | * The documentation states that all commands will be |
529 | * processed within 15µs, and that we need only poll |
529 | * processed within 15µs, and that we need only poll |
530 | * the status byte a maximum of 3 times in order for the |
530 | * the status byte a maximum of 3 times in order for the |
531 | * command to be complete. |
531 | * command to be complete. |
532 | * |
532 | * |
533 | * Check 5 times in case the hardware failed to read the docs. |
533 | * Check 5 times in case the hardware failed to read the docs. |
534 | */ |
534 | */ |
535 | if (!intel_sdvo_read_byte(intel_sdvo, |
535 | if (!intel_sdvo_read_byte(intel_sdvo, |
536 | SDVO_I2C_CMD_STATUS, |
536 | SDVO_I2C_CMD_STATUS, |
537 | &status)) |
537 | &status)) |
538 | goto log_fail; |
538 | goto log_fail; |
539 | 539 | ||
540 | while (status == SDVO_CMD_STATUS_PENDING && retry--) { |
540 | while (status == SDVO_CMD_STATUS_PENDING && retry--) { |
541 | udelay(15); |
541 | udelay(15); |
542 | if (!intel_sdvo_read_byte(intel_sdvo, |
542 | if (!intel_sdvo_read_byte(intel_sdvo, |
543 | SDVO_I2C_CMD_STATUS, |
543 | SDVO_I2C_CMD_STATUS, |
544 | &status)) |
544 | &status)) |
545 | goto log_fail; |
545 | goto log_fail; |
546 | } |
546 | } |
547 | 547 | ||
548 | if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) |
548 | if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) |
549 | DRM_LOG_KMS("(%s)", cmd_status_names[status]); |
549 | DRM_LOG_KMS("(%s)", cmd_status_names[status]); |
550 | else |
550 | else |
551 | DRM_LOG_KMS("(??? %d)", status); |
551 | DRM_LOG_KMS("(??? %d)", status); |
552 | 552 | ||
553 | if (status != SDVO_CMD_STATUS_SUCCESS) |
553 | if (status != SDVO_CMD_STATUS_SUCCESS) |
554 | goto log_fail; |
554 | goto log_fail; |
555 | 555 | ||
556 | /* Read the command response */ |
556 | /* Read the command response */ |
557 | for (i = 0; i < response_len; i++) { |
557 | for (i = 0; i < response_len; i++) { |
558 | if (!intel_sdvo_read_byte(intel_sdvo, |
558 | if (!intel_sdvo_read_byte(intel_sdvo, |
559 | SDVO_I2C_RETURN_0 + i, |
559 | SDVO_I2C_RETURN_0 + i, |
560 | &((u8 *)response)[i])) |
560 | &((u8 *)response)[i])) |
561 | goto log_fail; |
561 | goto log_fail; |
562 | DRM_LOG_KMS(" %02X", ((u8 *)response)[i]); |
562 | DRM_LOG_KMS(" %02X", ((u8 *)response)[i]); |
563 | } |
563 | } |
564 | DRM_LOG_KMS("\n"); |
564 | DRM_LOG_KMS("\n"); |
565 | return true; |
565 | return true; |
566 | 566 | ||
567 | log_fail: |
567 | log_fail: |
568 | DRM_LOG_KMS("... failed\n"); |
568 | DRM_LOG_KMS("... failed\n"); |
569 | return false; |
569 | return false; |
570 | } |
570 | } |
571 | 571 | ||
572 | static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) |
572 | static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) |
573 | { |
573 | { |
574 | if (mode->clock >= 100000) |
574 | if (mode->clock >= 100000) |
575 | return 1; |
575 | return 1; |
576 | else if (mode->clock >= 50000) |
576 | else if (mode->clock >= 50000) |
577 | return 2; |
577 | return 2; |
578 | else |
578 | else |
579 | return 4; |
579 | return 4; |
580 | } |
580 | } |
581 | 581 | ||
582 | static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, |
582 | static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, |
583 | u8 ddc_bus) |
583 | u8 ddc_bus) |
584 | { |
584 | { |
585 | /* This must be the immediately preceding write before the i2c xfer */ |
585 | /* This must be the immediately preceding write before the i2c xfer */ |
586 | return intel_sdvo_write_cmd(intel_sdvo, |
586 | return intel_sdvo_write_cmd(intel_sdvo, |
587 | SDVO_CMD_SET_CONTROL_BUS_SWITCH, |
587 | SDVO_CMD_SET_CONTROL_BUS_SWITCH, |
588 | &ddc_bus, 1); |
588 | &ddc_bus, 1); |
589 | } |
589 | } |
590 | 590 | ||
591 | static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) |
591 | static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) |
592 | { |
592 | { |
593 | if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) |
593 | if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) |
594 | return false; |
594 | return false; |
595 | 595 | ||
596 | return intel_sdvo_read_response(intel_sdvo, NULL, 0); |
596 | return intel_sdvo_read_response(intel_sdvo, NULL, 0); |
597 | } |
597 | } |
598 | 598 | ||
599 | static bool |
599 | static bool |
600 | intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) |
600 | intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) |
601 | { |
601 | { |
602 | if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) |
602 | if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) |
603 | return false; |
603 | return false; |
604 | 604 | ||
605 | return intel_sdvo_read_response(intel_sdvo, value, len); |
605 | return intel_sdvo_read_response(intel_sdvo, value, len); |
606 | } |
606 | } |
607 | 607 | ||
608 | static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) |
608 | static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) |
609 | { |
609 | { |
610 | struct intel_sdvo_set_target_input_args targets = {0}; |
610 | struct intel_sdvo_set_target_input_args targets = {0}; |
611 | return intel_sdvo_set_value(intel_sdvo, |
611 | return intel_sdvo_set_value(intel_sdvo, |
612 | SDVO_CMD_SET_TARGET_INPUT, |
612 | SDVO_CMD_SET_TARGET_INPUT, |
613 | &targets, sizeof(targets)); |
613 | &targets, sizeof(targets)); |
614 | } |
614 | } |
615 | 615 | ||
616 | /** |
616 | /** |
617 | * Return whether each input is trained. |
617 | * Return whether each input is trained. |
618 | * |
618 | * |
619 | * This function is making an assumption about the layout of the response, |
619 | * This function is making an assumption about the layout of the response, |
620 | * which should be checked against the docs. |
620 | * which should be checked against the docs. |
621 | */ |
621 | */ |
622 | static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) |
622 | static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) |
623 | { |
623 | { |
624 | struct intel_sdvo_get_trained_inputs_response response; |
624 | struct intel_sdvo_get_trained_inputs_response response; |
625 | 625 | ||
626 | BUILD_BUG_ON(sizeof(response) != 1); |
626 | BUILD_BUG_ON(sizeof(response) != 1); |
627 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, |
627 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, |
628 | &response, sizeof(response))) |
628 | &response, sizeof(response))) |
629 | return false; |
629 | return false; |
630 | 630 | ||
631 | *input_1 = response.input0_trained; |
631 | *input_1 = response.input0_trained; |
632 | *input_2 = response.input1_trained; |
632 | *input_2 = response.input1_trained; |
633 | return true; |
633 | return true; |
634 | } |
634 | } |
635 | 635 | ||
636 | static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, |
636 | static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, |
637 | u16 outputs) |
637 | u16 outputs) |
638 | { |
638 | { |
639 | return intel_sdvo_set_value(intel_sdvo, |
639 | return intel_sdvo_set_value(intel_sdvo, |
640 | SDVO_CMD_SET_ACTIVE_OUTPUTS, |
640 | SDVO_CMD_SET_ACTIVE_OUTPUTS, |
641 | &outputs, sizeof(outputs)); |
641 | &outputs, sizeof(outputs)); |
642 | } |
642 | } |
643 | 643 | ||
644 | static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, |
644 | static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, |
645 | u16 *outputs) |
645 | u16 *outputs) |
646 | { |
646 | { |
647 | return intel_sdvo_get_value(intel_sdvo, |
647 | return intel_sdvo_get_value(intel_sdvo, |
648 | SDVO_CMD_GET_ACTIVE_OUTPUTS, |
648 | SDVO_CMD_GET_ACTIVE_OUTPUTS, |
649 | outputs, sizeof(*outputs)); |
649 | outputs, sizeof(*outputs)); |
650 | } |
650 | } |
651 | 651 | ||
652 | static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, |
652 | static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, |
653 | int mode) |
653 | int mode) |
654 | { |
654 | { |
655 | u8 state = SDVO_ENCODER_STATE_ON; |
655 | u8 state = SDVO_ENCODER_STATE_ON; |
656 | 656 | ||
657 | switch (mode) { |
657 | switch (mode) { |
658 | case DRM_MODE_DPMS_ON: |
658 | case DRM_MODE_DPMS_ON: |
659 | state = SDVO_ENCODER_STATE_ON; |
659 | state = SDVO_ENCODER_STATE_ON; |
660 | break; |
660 | break; |
661 | case DRM_MODE_DPMS_STANDBY: |
661 | case DRM_MODE_DPMS_STANDBY: |
662 | state = SDVO_ENCODER_STATE_STANDBY; |
662 | state = SDVO_ENCODER_STATE_STANDBY; |
663 | break; |
663 | break; |
664 | case DRM_MODE_DPMS_SUSPEND: |
664 | case DRM_MODE_DPMS_SUSPEND: |
665 | state = SDVO_ENCODER_STATE_SUSPEND; |
665 | state = SDVO_ENCODER_STATE_SUSPEND; |
666 | break; |
666 | break; |
667 | case DRM_MODE_DPMS_OFF: |
667 | case DRM_MODE_DPMS_OFF: |
668 | state = SDVO_ENCODER_STATE_OFF; |
668 | state = SDVO_ENCODER_STATE_OFF; |
669 | break; |
669 | break; |
670 | } |
670 | } |
671 | 671 | ||
672 | return intel_sdvo_set_value(intel_sdvo, |
672 | return intel_sdvo_set_value(intel_sdvo, |
673 | SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); |
673 | SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); |
674 | } |
674 | } |
675 | 675 | ||
676 | static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, |
676 | static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, |
677 | int *clock_min, |
677 | int *clock_min, |
678 | int *clock_max) |
678 | int *clock_max) |
679 | { |
679 | { |
680 | struct intel_sdvo_pixel_clock_range clocks; |
680 | struct intel_sdvo_pixel_clock_range clocks; |
681 | 681 | ||
682 | BUILD_BUG_ON(sizeof(clocks) != 4); |
682 | BUILD_BUG_ON(sizeof(clocks) != 4); |
683 | if (!intel_sdvo_get_value(intel_sdvo, |
683 | if (!intel_sdvo_get_value(intel_sdvo, |
684 | SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, |
684 | SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, |
685 | &clocks, sizeof(clocks))) |
685 | &clocks, sizeof(clocks))) |
686 | return false; |
686 | return false; |
687 | 687 | ||
688 | /* Convert the values from units of 10 kHz to kHz. */ |
688 | /* Convert the values from units of 10 kHz to kHz. */ |
689 | *clock_min = clocks.min * 10; |
689 | *clock_min = clocks.min * 10; |
690 | *clock_max = clocks.max * 10; |
690 | *clock_max = clocks.max * 10; |
691 | return true; |
691 | return true; |
692 | } |
692 | } |
693 | 693 | ||
694 | static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, |
694 | static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, |
695 | u16 outputs) |
695 | u16 outputs) |
696 | { |
696 | { |
697 | return intel_sdvo_set_value(intel_sdvo, |
697 | return intel_sdvo_set_value(intel_sdvo, |
698 | SDVO_CMD_SET_TARGET_OUTPUT, |
698 | SDVO_CMD_SET_TARGET_OUTPUT, |
699 | &outputs, sizeof(outputs)); |
699 | &outputs, sizeof(outputs)); |
700 | } |
700 | } |
701 | 701 | ||
702 | static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, |
702 | static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, |
703 | struct intel_sdvo_dtd *dtd) |
703 | struct intel_sdvo_dtd *dtd) |
704 | { |
704 | { |
705 | return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && |
705 | return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && |
706 | intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); |
706 | intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); |
707 | } |
707 | } |
708 | 708 | ||
709 | static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, |
709 | static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, |
710 | struct intel_sdvo_dtd *dtd) |
710 | struct intel_sdvo_dtd *dtd) |
711 | { |
711 | { |
712 | return intel_sdvo_set_timing(intel_sdvo, |
712 | return intel_sdvo_set_timing(intel_sdvo, |
713 | SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); |
713 | SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); |
714 | } |
714 | } |
715 | 715 | ||
716 | static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, |
716 | static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, |
717 | struct intel_sdvo_dtd *dtd) |
717 | struct intel_sdvo_dtd *dtd) |
718 | { |
718 | { |
719 | return intel_sdvo_set_timing(intel_sdvo, |
719 | return intel_sdvo_set_timing(intel_sdvo, |
720 | SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); |
720 | SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); |
721 | } |
721 | } |
722 | 722 | ||
723 | static bool |
723 | static bool |
724 | intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, |
724 | intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, |
725 | uint16_t clock, |
725 | uint16_t clock, |
726 | uint16_t width, |
726 | uint16_t width, |
727 | uint16_t height) |
727 | uint16_t height) |
728 | { |
728 | { |
729 | struct intel_sdvo_preferred_input_timing_args args; |
729 | struct intel_sdvo_preferred_input_timing_args args; |
730 | 730 | ||
731 | memset(&args, 0, sizeof(args)); |
731 | memset(&args, 0, sizeof(args)); |
732 | args.clock = clock; |
732 | args.clock = clock; |
733 | args.width = width; |
733 | args.width = width; |
734 | args.height = height; |
734 | args.height = height; |
735 | args.interlace = 0; |
735 | args.interlace = 0; |
736 | 736 | ||
737 | if (intel_sdvo->is_lvds && |
737 | if (intel_sdvo->is_lvds && |
738 | (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || |
738 | (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || |
739 | intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) |
739 | intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) |
740 | args.scaled = 1; |
740 | args.scaled = 1; |
741 | 741 | ||
742 | return intel_sdvo_set_value(intel_sdvo, |
742 | return intel_sdvo_set_value(intel_sdvo, |
743 | SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, |
743 | SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, |
744 | &args, sizeof(args)); |
744 | &args, sizeof(args)); |
745 | } |
745 | } |
746 | 746 | ||
747 | static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, |
747 | static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, |
748 | struct intel_sdvo_dtd *dtd) |
748 | struct intel_sdvo_dtd *dtd) |
749 | { |
749 | { |
750 | BUILD_BUG_ON(sizeof(dtd->part1) != 8); |
750 | BUILD_BUG_ON(sizeof(dtd->part1) != 8); |
751 | BUILD_BUG_ON(sizeof(dtd->part2) != 8); |
751 | BUILD_BUG_ON(sizeof(dtd->part2) != 8); |
752 | return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, |
752 | return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, |
753 | &dtd->part1, sizeof(dtd->part1)) && |
753 | &dtd->part1, sizeof(dtd->part1)) && |
754 | intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, |
754 | intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, |
755 | &dtd->part2, sizeof(dtd->part2)); |
755 | &dtd->part2, sizeof(dtd->part2)); |
756 | } |
756 | } |
757 | 757 | ||
758 | static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) |
758 | static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) |
759 | { |
759 | { |
760 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); |
760 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); |
761 | } |
761 | } |
762 | 762 | ||
763 | static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, |
763 | static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, |
764 | const struct drm_display_mode *mode) |
764 | const struct drm_display_mode *mode) |
765 | { |
765 | { |
766 | uint16_t width, height; |
766 | uint16_t width, height; |
767 | uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; |
767 | uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; |
768 | uint16_t h_sync_offset, v_sync_offset; |
768 | uint16_t h_sync_offset, v_sync_offset; |
769 | int mode_clock; |
769 | int mode_clock; |
770 | 770 | ||
771 | width = mode->hdisplay; |
771 | width = mode->hdisplay; |
772 | height = mode->vdisplay; |
772 | height = mode->vdisplay; |
773 | 773 | ||
774 | /* do some mode translations */ |
774 | /* do some mode translations */ |
775 | h_blank_len = mode->htotal - mode->hdisplay; |
775 | h_blank_len = mode->htotal - mode->hdisplay; |
776 | h_sync_len = mode->hsync_end - mode->hsync_start; |
776 | h_sync_len = mode->hsync_end - mode->hsync_start; |
777 | 777 | ||
778 | v_blank_len = mode->vtotal - mode->vdisplay; |
778 | v_blank_len = mode->vtotal - mode->vdisplay; |
779 | v_sync_len = mode->vsync_end - mode->vsync_start; |
779 | v_sync_len = mode->vsync_end - mode->vsync_start; |
780 | 780 | ||
781 | h_sync_offset = mode->hsync_start - mode->hdisplay; |
781 | h_sync_offset = mode->hsync_start - mode->hdisplay; |
782 | v_sync_offset = mode->vsync_start - mode->vdisplay; |
782 | v_sync_offset = mode->vsync_start - mode->vdisplay; |
783 | 783 | ||
784 | mode_clock = mode->clock; |
784 | mode_clock = mode->clock; |
785 | mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1; |
785 | mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1; |
786 | mode_clock /= 10; |
786 | mode_clock /= 10; |
787 | dtd->part1.clock = mode_clock; |
787 | dtd->part1.clock = mode_clock; |
788 | 788 | ||
789 | dtd->part1.h_active = width & 0xff; |
789 | dtd->part1.h_active = width & 0xff; |
790 | dtd->part1.h_blank = h_blank_len & 0xff; |
790 | dtd->part1.h_blank = h_blank_len & 0xff; |
791 | dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | |
791 | dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | |
792 | ((h_blank_len >> 8) & 0xf); |
792 | ((h_blank_len >> 8) & 0xf); |
793 | dtd->part1.v_active = height & 0xff; |
793 | dtd->part1.v_active = height & 0xff; |
794 | dtd->part1.v_blank = v_blank_len & 0xff; |
794 | dtd->part1.v_blank = v_blank_len & 0xff; |
795 | dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | |
795 | dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | |
796 | ((v_blank_len >> 8) & 0xf); |
796 | ((v_blank_len >> 8) & 0xf); |
797 | 797 | ||
798 | dtd->part2.h_sync_off = h_sync_offset & 0xff; |
798 | dtd->part2.h_sync_off = h_sync_offset & 0xff; |
799 | dtd->part2.h_sync_width = h_sync_len & 0xff; |
799 | dtd->part2.h_sync_width = h_sync_len & 0xff; |
800 | dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | |
800 | dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | |
801 | (v_sync_len & 0xf); |
801 | (v_sync_len & 0xf); |
802 | dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | |
802 | dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | |
803 | ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | |
803 | ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | |
804 | ((v_sync_len & 0x30) >> 4); |
804 | ((v_sync_len & 0x30) >> 4); |
805 | 805 | ||
806 | dtd->part2.dtd_flags = 0x18; |
806 | dtd->part2.dtd_flags = 0x18; |
807 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
807 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
808 | dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE; |
808 | dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE; |
809 | if (mode->flags & DRM_MODE_FLAG_PHSYNC) |
809 | if (mode->flags & DRM_MODE_FLAG_PHSYNC) |
810 | dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE; |
810 | dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE; |
811 | if (mode->flags & DRM_MODE_FLAG_PVSYNC) |
811 | if (mode->flags & DRM_MODE_FLAG_PVSYNC) |
812 | dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; |
812 | dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; |
813 | 813 | ||
814 | dtd->part2.sdvo_flags = 0; |
814 | dtd->part2.sdvo_flags = 0; |
815 | dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; |
815 | dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; |
816 | dtd->part2.reserved = 0; |
816 | dtd->part2.reserved = 0; |
817 | } |
817 | } |
818 | 818 | ||
819 | static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, |
819 | static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, |
820 | const struct intel_sdvo_dtd *dtd) |
820 | const struct intel_sdvo_dtd *dtd) |
821 | { |
821 | { |
822 | mode->hdisplay = dtd->part1.h_active; |
822 | mode->hdisplay = dtd->part1.h_active; |
823 | mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; |
823 | mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; |
824 | mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; |
824 | mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; |
825 | mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; |
825 | mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; |
826 | mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; |
826 | mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; |
827 | mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; |
827 | mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; |
828 | mode->htotal = mode->hdisplay + dtd->part1.h_blank; |
828 | mode->htotal = mode->hdisplay + dtd->part1.h_blank; |
829 | mode->htotal += (dtd->part1.h_high & 0xf) << 8; |
829 | mode->htotal += (dtd->part1.h_high & 0xf) << 8; |
830 | 830 | ||
831 | mode->vdisplay = dtd->part1.v_active; |
831 | mode->vdisplay = dtd->part1.v_active; |
832 | mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; |
832 | mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; |
833 | mode->vsync_start = mode->vdisplay; |
833 | mode->vsync_start = mode->vdisplay; |
834 | mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; |
834 | mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; |
835 | mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; |
835 | mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; |
836 | mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; |
836 | mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; |
837 | mode->vsync_end = mode->vsync_start + |
837 | mode->vsync_end = mode->vsync_start + |
838 | (dtd->part2.v_sync_off_width & 0xf); |
838 | (dtd->part2.v_sync_off_width & 0xf); |
839 | mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; |
839 | mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; |
840 | mode->vtotal = mode->vdisplay + dtd->part1.v_blank; |
840 | mode->vtotal = mode->vdisplay + dtd->part1.v_blank; |
841 | mode->vtotal += (dtd->part1.v_high & 0xf) << 8; |
841 | mode->vtotal += (dtd->part1.v_high & 0xf) << 8; |
842 | 842 | ||
843 | mode->clock = dtd->part1.clock * 10; |
843 | mode->clock = dtd->part1.clock * 10; |
844 | 844 | ||
845 | mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); |
845 | mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); |
846 | if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) |
846 | if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) |
847 | mode->flags |= DRM_MODE_FLAG_INTERLACE; |
847 | mode->flags |= DRM_MODE_FLAG_INTERLACE; |
848 | if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) |
848 | if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) |
849 | mode->flags |= DRM_MODE_FLAG_PHSYNC; |
849 | mode->flags |= DRM_MODE_FLAG_PHSYNC; |
850 | if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) |
850 | if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) |
851 | mode->flags |= DRM_MODE_FLAG_PVSYNC; |
851 | mode->flags |= DRM_MODE_FLAG_PVSYNC; |
852 | } |
852 | } |
853 | 853 | ||
854 | static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) |
854 | static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) |
855 | { |
855 | { |
856 | struct intel_sdvo_encode encode; |
856 | struct intel_sdvo_encode encode; |
857 | 857 | ||
858 | BUILD_BUG_ON(sizeof(encode) != 2); |
858 | BUILD_BUG_ON(sizeof(encode) != 2); |
859 | return intel_sdvo_get_value(intel_sdvo, |
859 | return intel_sdvo_get_value(intel_sdvo, |
860 | SDVO_CMD_GET_SUPP_ENCODE, |
860 | SDVO_CMD_GET_SUPP_ENCODE, |
861 | &encode, sizeof(encode)); |
861 | &encode, sizeof(encode)); |
862 | } |
862 | } |
863 | 863 | ||
864 | static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, |
864 | static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, |
865 | uint8_t mode) |
865 | uint8_t mode) |
866 | { |
866 | { |
867 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); |
867 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); |
868 | } |
868 | } |
869 | 869 | ||
870 | static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, |
870 | static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, |
871 | uint8_t mode) |
871 | uint8_t mode) |
872 | { |
872 | { |
873 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); |
873 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); |
874 | } |
874 | } |
875 | 875 | ||
876 | #if 0 |
876 | #if 0 |
877 | static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) |
877 | static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) |
878 | { |
878 | { |
879 | int i, j; |
879 | int i, j; |
880 | uint8_t set_buf_index[2]; |
880 | uint8_t set_buf_index[2]; |
881 | uint8_t av_split; |
881 | uint8_t av_split; |
882 | uint8_t buf_size; |
882 | uint8_t buf_size; |
883 | uint8_t buf[48]; |
883 | uint8_t buf[48]; |
884 | uint8_t *pos; |
884 | uint8_t *pos; |
885 | 885 | ||
886 | intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); |
886 | intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); |
887 | 887 | ||
888 | for (i = 0; i <= av_split; i++) { |
888 | for (i = 0; i <= av_split; i++) { |
889 | set_buf_index[0] = i; set_buf_index[1] = 0; |
889 | set_buf_index[0] = i; set_buf_index[1] = 0; |
890 | intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, |
890 | intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, |
891 | set_buf_index, 2); |
891 | set_buf_index, 2); |
892 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); |
892 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); |
893 | intel_sdvo_read_response(encoder, &buf_size, 1); |
893 | intel_sdvo_read_response(encoder, &buf_size, 1); |
894 | 894 | ||
895 | pos = buf; |
895 | pos = buf; |
896 | for (j = 0; j <= buf_size; j += 8) { |
896 | for (j = 0; j <= buf_size; j += 8) { |
897 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, |
897 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, |
898 | NULL, 0); |
898 | NULL, 0); |
899 | intel_sdvo_read_response(encoder, pos, 8); |
899 | intel_sdvo_read_response(encoder, pos, 8); |
900 | pos += 8; |
900 | pos += 8; |
901 | } |
901 | } |
902 | } |
902 | } |
903 | } |
903 | } |
904 | #endif |
904 | #endif |
905 | 905 | ||
906 | static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, |
906 | static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, |
907 | unsigned if_index, uint8_t tx_rate, |
907 | unsigned if_index, uint8_t tx_rate, |
908 | uint8_t *data, unsigned length) |
908 | uint8_t *data, unsigned length) |
909 | { |
909 | { |
910 | uint8_t set_buf_index[2] = { if_index, 0 }; |
910 | uint8_t set_buf_index[2] = { if_index, 0 }; |
911 | uint8_t hbuf_size, tmp[8]; |
911 | uint8_t hbuf_size, tmp[8]; |
912 | int i; |
912 | int i; |
913 | 913 | ||
914 | if (!intel_sdvo_set_value(intel_sdvo, |
914 | if (!intel_sdvo_set_value(intel_sdvo, |
915 | SDVO_CMD_SET_HBUF_INDEX, |
915 | SDVO_CMD_SET_HBUF_INDEX, |
916 | set_buf_index, 2)) |
916 | set_buf_index, 2)) |
917 | return false; |
917 | return false; |
918 | 918 | ||
919 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, |
919 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, |
920 | &hbuf_size, 1)) |
920 | &hbuf_size, 1)) |
921 | return false; |
921 | return false; |
922 | 922 | ||
923 | /* Buffer size is 0 based, hooray! */ |
923 | /* Buffer size is 0 based, hooray! */ |
924 | hbuf_size++; |
924 | hbuf_size++; |
925 | 925 | ||
926 | DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n", |
926 | DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n", |
927 | if_index, length, hbuf_size); |
927 | if_index, length, hbuf_size); |
928 | 928 | ||
929 | for (i = 0; i < hbuf_size; i += 8) { |
929 | for (i = 0; i < hbuf_size; i += 8) { |
930 | memset(tmp, 0, 8); |
930 | memset(tmp, 0, 8); |
931 | if (i < length) |
931 | if (i < length) |
932 | memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); |
932 | memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); |
933 | 933 | ||
934 | if (!intel_sdvo_set_value(intel_sdvo, |
934 | if (!intel_sdvo_set_value(intel_sdvo, |
935 | SDVO_CMD_SET_HBUF_DATA, |
935 | SDVO_CMD_SET_HBUF_DATA, |
936 | tmp, 8)) |
936 | tmp, 8)) |
937 | return false; |
937 | return false; |
938 | } |
938 | } |
939 | 939 | ||
940 | return intel_sdvo_set_value(intel_sdvo, |
940 | return intel_sdvo_set_value(intel_sdvo, |
941 | SDVO_CMD_SET_HBUF_TXRATE, |
941 | SDVO_CMD_SET_HBUF_TXRATE, |
942 | &tx_rate, 1); |
942 | &tx_rate, 1); |
943 | } |
943 | } |
944 | 944 | ||
945 | static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) |
945 | static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) |
946 | { |
946 | { |
947 | struct dip_infoframe avi_if = { |
947 | struct dip_infoframe avi_if = { |
948 | .type = DIP_TYPE_AVI, |
948 | .type = DIP_TYPE_AVI, |
949 | .ver = DIP_VERSION_AVI, |
949 | .ver = DIP_VERSION_AVI, |
950 | .len = DIP_LEN_AVI, |
950 | .len = DIP_LEN_AVI, |
951 | }; |
951 | }; |
952 | uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; |
952 | uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; |
953 | 953 | ||
954 | intel_dip_infoframe_csum(&avi_if); |
954 | intel_dip_infoframe_csum(&avi_if); |
955 | 955 | ||
956 | /* sdvo spec says that the ecc is handled by the hw, and it looks like |
956 | /* sdvo spec says that the ecc is handled by the hw, and it looks like |
957 | * we must not send the ecc field, either. */ |
957 | * we must not send the ecc field, either. */ |
958 | memcpy(sdvo_data, &avi_if, 3); |
958 | memcpy(sdvo_data, &avi_if, 3); |
959 | sdvo_data[3] = avi_if.checksum; |
959 | sdvo_data[3] = avi_if.checksum; |
960 | memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi)); |
960 | memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi)); |
961 | 961 | ||
962 | return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, |
962 | return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, |
963 | SDVO_HBUF_TX_VSYNC, |
963 | SDVO_HBUF_TX_VSYNC, |
964 | sdvo_data, sizeof(sdvo_data)); |
964 | sdvo_data, sizeof(sdvo_data)); |
965 | } |
965 | } |
966 | 966 | ||
967 | static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) |
967 | static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) |
968 | { |
968 | { |
969 | struct intel_sdvo_tv_format format; |
969 | struct intel_sdvo_tv_format format; |
970 | uint32_t format_map; |
970 | uint32_t format_map; |
971 | 971 | ||
972 | format_map = 1 << intel_sdvo->tv_format_index; |
972 | format_map = 1 << intel_sdvo->tv_format_index; |
973 | memset(&format, 0, sizeof(format)); |
973 | memset(&format, 0, sizeof(format)); |
974 | memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); |
974 | memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); |
975 | 975 | ||
976 | BUILD_BUG_ON(sizeof(format) != 6); |
976 | BUILD_BUG_ON(sizeof(format) != 6); |
977 | return intel_sdvo_set_value(intel_sdvo, |
977 | return intel_sdvo_set_value(intel_sdvo, |
978 | SDVO_CMD_SET_TV_FORMAT, |
978 | SDVO_CMD_SET_TV_FORMAT, |
979 | &format, sizeof(format)); |
979 | &format, sizeof(format)); |
980 | } |
980 | } |
981 | 981 | ||
982 | static bool |
982 | static bool |
983 | intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, |
983 | intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, |
984 | const struct drm_display_mode *mode) |
984 | const struct drm_display_mode *mode) |
985 | { |
985 | { |
986 | struct intel_sdvo_dtd output_dtd; |
986 | struct intel_sdvo_dtd output_dtd; |
987 | 987 | ||
988 | if (!intel_sdvo_set_target_output(intel_sdvo, |
988 | if (!intel_sdvo_set_target_output(intel_sdvo, |
989 | intel_sdvo->attached_output)) |
989 | intel_sdvo->attached_output)) |
990 | return false; |
990 | return false; |
991 | 991 | ||
992 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
992 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
993 | if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) |
993 | if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) |
994 | return false; |
994 | return false; |
995 | 995 | ||
996 | return true; |
996 | return true; |
997 | } |
997 | } |
998 | 998 | ||
999 | /* Asks the sdvo controller for the preferred input mode given the output mode. |
999 | /* Asks the sdvo controller for the preferred input mode given the output mode. |
1000 | * Unfortunately we have to set up the full output mode to do that. */ |
1000 | * Unfortunately we have to set up the full output mode to do that. */ |
1001 | static bool |
1001 | static bool |
1002 | intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo, |
1002 | intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo, |
1003 | const struct drm_display_mode *mode, |
1003 | const struct drm_display_mode *mode, |
1004 | struct drm_display_mode *adjusted_mode) |
1004 | struct drm_display_mode *adjusted_mode) |
1005 | { |
1005 | { |
1006 | struct intel_sdvo_dtd input_dtd; |
1006 | struct intel_sdvo_dtd input_dtd; |
1007 | 1007 | ||
1008 | /* Reset the input timing to the screen. Assume always input 0. */ |
1008 | /* Reset the input timing to the screen. Assume always input 0. */ |
1009 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1009 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1010 | return false; |
1010 | return false; |
1011 | 1011 | ||
1012 | if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, |
1012 | if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, |
1013 | mode->clock / 10, |
1013 | mode->clock / 10, |
1014 | mode->hdisplay, |
1014 | mode->hdisplay, |
1015 | mode->vdisplay)) |
1015 | mode->vdisplay)) |
1016 | return false; |
1016 | return false; |
1017 | 1017 | ||
1018 | if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, |
1018 | if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, |
1019 | &input_dtd)) |
1019 | &input_dtd)) |
1020 | return false; |
1020 | return false; |
1021 | 1021 | ||
1022 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); |
1022 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); |
1023 | intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; |
1023 | intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; |
1024 | 1024 | ||
1025 | return true; |
1025 | return true; |
1026 | } |
1026 | } |
1027 | 1027 | ||
1028 | static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, |
1028 | static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, |
1029 | const struct drm_display_mode *mode, |
1029 | const struct drm_display_mode *mode, |
1030 | struct drm_display_mode *adjusted_mode) |
1030 | struct drm_display_mode *adjusted_mode) |
1031 | { |
1031 | { |
1032 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); |
1032 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); |
1033 | int multiplier; |
1033 | int multiplier; |
1034 | 1034 | ||
1035 | /* We need to construct preferred input timings based on our |
1035 | /* We need to construct preferred input timings based on our |
1036 | * output timings. To do that, we have to set the output |
1036 | * output timings. To do that, we have to set the output |
1037 | * timings, even though this isn't really the right place in |
1037 | * timings, even though this isn't really the right place in |
1038 | * the sequence to do it. Oh well. |
1038 | * the sequence to do it. Oh well. |
1039 | */ |
1039 | */ |
1040 | if (intel_sdvo->is_tv) { |
1040 | if (intel_sdvo->is_tv) { |
1041 | if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) |
1041 | if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) |
1042 | return false; |
1042 | return false; |
1043 | 1043 | ||
1044 | (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, |
1044 | (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, |
1045 | mode, |
1045 | mode, |
1046 | adjusted_mode); |
1046 | adjusted_mode); |
1047 | } else if (intel_sdvo->is_lvds) { |
1047 | } else if (intel_sdvo->is_lvds) { |
1048 | if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, |
1048 | if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, |
1049 | intel_sdvo->sdvo_lvds_fixed_mode)) |
1049 | intel_sdvo->sdvo_lvds_fixed_mode)) |
1050 | return false; |
1050 | return false; |
1051 | 1051 | ||
1052 | (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, |
1052 | (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, |
1053 | mode, |
1053 | mode, |
1054 | adjusted_mode); |
1054 | adjusted_mode); |
1055 | } |
1055 | } |
1056 | 1056 | ||
1057 | /* Make the CRTC code factor in the SDVO pixel multiplier. The |
1057 | /* Make the CRTC code factor in the SDVO pixel multiplier. The |
1058 | * SDVO device will factor out the multiplier during mode_set. |
1058 | * SDVO device will factor out the multiplier during mode_set. |
1059 | */ |
1059 | */ |
1060 | multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode); |
1060 | multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode); |
1061 | intel_mode_set_pixel_multiplier(adjusted_mode, multiplier); |
1061 | intel_mode_set_pixel_multiplier(adjusted_mode, multiplier); |
1062 | 1062 | ||
1063 | return true; |
1063 | return true; |
1064 | } |
1064 | } |
1065 | 1065 | ||
1066 | static void intel_sdvo_mode_set(struct drm_encoder *encoder, |
1066 | static void intel_sdvo_mode_set(struct drm_encoder *encoder, |
1067 | struct drm_display_mode *mode, |
1067 | struct drm_display_mode *mode, |
1068 | struct drm_display_mode *adjusted_mode) |
1068 | struct drm_display_mode *adjusted_mode) |
1069 | { |
1069 | { |
1070 | struct drm_device *dev = encoder->dev; |
1070 | struct drm_device *dev = encoder->dev; |
1071 | struct drm_i915_private *dev_priv = dev->dev_private; |
1071 | struct drm_i915_private *dev_priv = dev->dev_private; |
1072 | struct drm_crtc *crtc = encoder->crtc; |
1072 | struct drm_crtc *crtc = encoder->crtc; |
1073 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
1073 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
1074 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); |
1074 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); |
1075 | u32 sdvox; |
1075 | u32 sdvox; |
1076 | struct intel_sdvo_in_out_map in_out; |
1076 | struct intel_sdvo_in_out_map in_out; |
1077 | struct intel_sdvo_dtd input_dtd, output_dtd; |
1077 | struct intel_sdvo_dtd input_dtd, output_dtd; |
1078 | int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode); |
1078 | int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode); |
1079 | int rate; |
1079 | int rate; |
1080 | 1080 | ||
1081 | if (!mode) |
1081 | if (!mode) |
1082 | return; |
1082 | return; |
1083 | 1083 | ||
1084 | /* First, set the input mapping for the first input to our controlled |
1084 | /* First, set the input mapping for the first input to our controlled |
1085 | * output. This is only correct if we're a single-input device, in |
1085 | * output. This is only correct if we're a single-input device, in |
1086 | * which case the first input is the output from the appropriate SDVO |
1086 | * which case the first input is the output from the appropriate SDVO |
1087 | * channel on the motherboard. In a two-input device, the first input |
1087 | * channel on the motherboard. In a two-input device, the first input |
1088 | * will be SDVOB and the second SDVOC. |
1088 | * will be SDVOB and the second SDVOC. |
1089 | */ |
1089 | */ |
1090 | in_out.in0 = intel_sdvo->attached_output; |
1090 | in_out.in0 = intel_sdvo->attached_output; |
1091 | in_out.in1 = 0; |
1091 | in_out.in1 = 0; |
1092 | 1092 | ||
1093 | intel_sdvo_set_value(intel_sdvo, |
1093 | intel_sdvo_set_value(intel_sdvo, |
1094 | SDVO_CMD_SET_IN_OUT_MAP, |
1094 | SDVO_CMD_SET_IN_OUT_MAP, |
1095 | &in_out, sizeof(in_out)); |
1095 | &in_out, sizeof(in_out)); |
1096 | 1096 | ||
1097 | /* Set the output timings to the screen */ |
1097 | /* Set the output timings to the screen */ |
1098 | if (!intel_sdvo_set_target_output(intel_sdvo, |
1098 | if (!intel_sdvo_set_target_output(intel_sdvo, |
1099 | intel_sdvo->attached_output)) |
1099 | intel_sdvo->attached_output)) |
1100 | return; |
1100 | return; |
1101 | 1101 | ||
1102 | /* lvds has a special fixed output timing. */ |
1102 | /* lvds has a special fixed output timing. */ |
1103 | if (intel_sdvo->is_lvds) |
1103 | if (intel_sdvo->is_lvds) |
1104 | intel_sdvo_get_dtd_from_mode(&output_dtd, |
1104 | intel_sdvo_get_dtd_from_mode(&output_dtd, |
1105 | intel_sdvo->sdvo_lvds_fixed_mode); |
1105 | intel_sdvo->sdvo_lvds_fixed_mode); |
1106 | else |
1106 | else |
1107 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
1107 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
1108 | if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) |
1108 | if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) |
1109 | DRM_INFO("Setting output timings on %s failed\n", |
1109 | DRM_INFO("Setting output timings on %s failed\n", |
1110 | SDVO_NAME(intel_sdvo)); |
1110 | SDVO_NAME(intel_sdvo)); |
1111 | 1111 | ||
1112 | /* Set the input timing to the screen. Assume always input 0. */ |
1112 | /* Set the input timing to the screen. Assume always input 0. */ |
1113 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1113 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1114 | return; |
1114 | return; |
1115 | 1115 | ||
1116 | if (intel_sdvo->has_hdmi_monitor) { |
1116 | if (intel_sdvo->has_hdmi_monitor) { |
1117 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); |
1117 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); |
1118 | intel_sdvo_set_colorimetry(intel_sdvo, |
1118 | intel_sdvo_set_colorimetry(intel_sdvo, |
1119 | SDVO_COLORIMETRY_RGB256); |
1119 | SDVO_COLORIMETRY_RGB256); |
1120 | intel_sdvo_set_avi_infoframe(intel_sdvo); |
1120 | intel_sdvo_set_avi_infoframe(intel_sdvo); |
1121 | } else |
1121 | } else |
1122 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); |
1122 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); |
1123 | 1123 | ||
1124 | if (intel_sdvo->is_tv && |
1124 | if (intel_sdvo->is_tv && |
1125 | !intel_sdvo_set_tv_format(intel_sdvo)) |
1125 | !intel_sdvo_set_tv_format(intel_sdvo)) |
1126 | return; |
1126 | return; |
1127 | 1127 | ||
1128 | /* We have tried to get input timing in mode_fixup, and filled into |
1128 | /* We have tried to get input timing in mode_fixup, and filled into |
1129 | * adjusted_mode. |
1129 | * adjusted_mode. |
1130 | */ |
1130 | */ |
1131 | intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); |
1131 | intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); |
1132 | if (intel_sdvo->is_tv || intel_sdvo->is_lvds) |
1132 | if (intel_sdvo->is_tv || intel_sdvo->is_lvds) |
1133 | input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; |
1133 | input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; |
1134 | if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) |
1134 | if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) |
1135 | DRM_INFO("Setting input timings on %s failed\n", |
1135 | DRM_INFO("Setting input timings on %s failed\n", |
1136 | SDVO_NAME(intel_sdvo)); |
1136 | SDVO_NAME(intel_sdvo)); |
1137 | 1137 | ||
1138 | switch (pixel_multiplier) { |
1138 | switch (pixel_multiplier) { |
1139 | default: |
1139 | default: |
1140 | case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; |
1140 | case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; |
1141 | case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; |
1141 | case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; |
1142 | case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; |
1142 | case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; |
1143 | } |
1143 | } |
1144 | if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) |
1144 | if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) |
1145 | return; |
1145 | return; |
1146 | 1146 | ||
1147 | /* Set the SDVO control regs. */ |
1147 | /* Set the SDVO control regs. */ |
1148 | if (INTEL_INFO(dev)->gen >= 4) { |
1148 | if (INTEL_INFO(dev)->gen >= 4) { |
1149 | /* The real mode polarity is set by the SDVO commands, using |
1149 | /* The real mode polarity is set by the SDVO commands, using |
1150 | * struct intel_sdvo_dtd. */ |
1150 | * struct intel_sdvo_dtd. */ |
1151 | sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; |
1151 | sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; |
1152 | if (intel_sdvo->is_hdmi) |
1152 | if (intel_sdvo->is_hdmi) |
1153 | sdvox |= intel_sdvo->color_range; |
1153 | sdvox |= intel_sdvo->color_range; |
1154 | if (INTEL_INFO(dev)->gen < 5) |
1154 | if (INTEL_INFO(dev)->gen < 5) |
1155 | sdvox |= SDVO_BORDER_ENABLE; |
1155 | sdvox |= SDVO_BORDER_ENABLE; |
1156 | } else { |
1156 | } else { |
1157 | sdvox = I915_READ(intel_sdvo->sdvo_reg); |
1157 | sdvox = I915_READ(intel_sdvo->sdvo_reg); |
1158 | switch (intel_sdvo->sdvo_reg) { |
1158 | switch (intel_sdvo->sdvo_reg) { |
1159 | case SDVOB: |
1159 | case SDVOB: |
1160 | sdvox &= SDVOB_PRESERVE_MASK; |
1160 | sdvox &= SDVOB_PRESERVE_MASK; |
1161 | break; |
1161 | break; |
1162 | case SDVOC: |
1162 | case SDVOC: |
1163 | sdvox &= SDVOC_PRESERVE_MASK; |
1163 | sdvox &= SDVOC_PRESERVE_MASK; |
1164 | break; |
1164 | break; |
1165 | } |
1165 | } |
1166 | sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; |
1166 | sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; |
1167 | } |
1167 | } |
1168 | 1168 | ||
1169 | if (INTEL_PCH_TYPE(dev) >= PCH_CPT) |
1169 | if (INTEL_PCH_TYPE(dev) >= PCH_CPT) |
1170 | sdvox |= TRANSCODER_CPT(intel_crtc->pipe); |
1170 | sdvox |= TRANSCODER_CPT(intel_crtc->pipe); |
1171 | else |
1171 | else |
1172 | sdvox |= TRANSCODER(intel_crtc->pipe); |
1172 | sdvox |= TRANSCODER(intel_crtc->pipe); |
1173 | 1173 | ||
1174 | if (intel_sdvo->has_hdmi_audio) |
1174 | if (intel_sdvo->has_hdmi_audio) |
1175 | sdvox |= SDVO_AUDIO_ENABLE; |
1175 | sdvox |= SDVO_AUDIO_ENABLE; |
1176 | 1176 | ||
1177 | if (INTEL_INFO(dev)->gen >= 4) { |
1177 | if (INTEL_INFO(dev)->gen >= 4) { |
1178 | /* done in crtc_mode_set as the dpll_md reg must be written early */ |
1178 | /* done in crtc_mode_set as the dpll_md reg must be written early */ |
1179 | } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { |
1179 | } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { |
1180 | /* done in crtc_mode_set as it lives inside the dpll register */ |
1180 | /* done in crtc_mode_set as it lives inside the dpll register */ |
1181 | } else { |
1181 | } else { |
1182 | sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT; |
1182 | sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT; |
1183 | } |
1183 | } |
1184 | 1184 | ||
1185 | if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && |
1185 | if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && |
1186 | INTEL_INFO(dev)->gen < 5) |
1186 | INTEL_INFO(dev)->gen < 5) |
1187 | sdvox |= SDVO_STALL_SELECT; |
1187 | sdvox |= SDVO_STALL_SELECT; |
1188 | intel_sdvo_write_sdvox(intel_sdvo, sdvox); |
1188 | intel_sdvo_write_sdvox(intel_sdvo, sdvox); |
1189 | } |
1189 | } |
1190 | 1190 | ||
1191 | static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) |
1191 | static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) |
1192 | { |
1192 | { |
1193 | struct intel_sdvo_connector *intel_sdvo_connector = |
1193 | struct intel_sdvo_connector *intel_sdvo_connector = |
1194 | to_intel_sdvo_connector(&connector->base); |
1194 | to_intel_sdvo_connector(&connector->base); |
1195 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base); |
1195 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base); |
1196 | u16 active_outputs; |
1196 | u16 active_outputs; |
1197 | 1197 | ||
1198 | intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); |
1198 | intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); |
1199 | 1199 | ||
1200 | if (active_outputs & intel_sdvo_connector->output_flag) |
1200 | if (active_outputs & intel_sdvo_connector->output_flag) |
1201 | return true; |
1201 | return true; |
1202 | else |
1202 | else |
1203 | return false; |
1203 | return false; |
1204 | } |
1204 | } |
1205 | 1205 | ||
1206 | static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, |
1206 | static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, |
1207 | enum pipe *pipe) |
1207 | enum pipe *pipe) |
1208 | { |
1208 | { |
1209 | struct drm_device *dev = encoder->base.dev; |
1209 | struct drm_device *dev = encoder->base.dev; |
1210 | struct drm_i915_private *dev_priv = dev->dev_private; |
1210 | struct drm_i915_private *dev_priv = dev->dev_private; |
1211 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1211 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1212 | u32 tmp; |
1212 | u32 tmp; |
1213 | 1213 | ||
1214 | tmp = I915_READ(intel_sdvo->sdvo_reg); |
1214 | tmp = I915_READ(intel_sdvo->sdvo_reg); |
1215 | 1215 | ||
1216 | if (!(tmp & SDVO_ENABLE)) |
1216 | if (!(tmp & SDVO_ENABLE)) |
1217 | return false; |
1217 | return false; |
1218 | 1218 | ||
1219 | if (HAS_PCH_CPT(dev)) |
1219 | if (HAS_PCH_CPT(dev)) |
1220 | *pipe = PORT_TO_PIPE_CPT(tmp); |
1220 | *pipe = PORT_TO_PIPE_CPT(tmp); |
1221 | else |
1221 | else |
1222 | *pipe = PORT_TO_PIPE(tmp); |
1222 | *pipe = PORT_TO_PIPE(tmp); |
1223 | 1223 | ||
1224 | return true; |
1224 | return true; |
1225 | } |
1225 | } |
1226 | 1226 | ||
1227 | static void intel_disable_sdvo(struct intel_encoder *encoder) |
1227 | static void intel_disable_sdvo(struct intel_encoder *encoder) |
1228 | { |
1228 | { |
1229 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
1229 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
1230 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1230 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1231 | u32 temp; |
1231 | u32 temp; |
1232 | 1232 | ||
1233 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
1233 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
1234 | if (0) |
1234 | if (0) |
1235 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1235 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1236 | DRM_MODE_DPMS_OFF); |
1236 | DRM_MODE_DPMS_OFF); |
1237 | 1237 | ||
1238 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1238 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1239 | if ((temp & SDVO_ENABLE) != 0) { |
1239 | if ((temp & SDVO_ENABLE) != 0) { |
1240 | intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE); |
1240 | intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE); |
1241 | } |
1241 | } |
1242 | } |
1242 | } |
1243 | 1243 | ||
1244 | static void intel_enable_sdvo(struct intel_encoder *encoder) |
1244 | static void intel_enable_sdvo(struct intel_encoder *encoder) |
1245 | { |
1245 | { |
1246 | struct drm_device *dev = encoder->base.dev; |
1246 | struct drm_device *dev = encoder->base.dev; |
1247 | struct drm_i915_private *dev_priv = dev->dev_private; |
1247 | struct drm_i915_private *dev_priv = dev->dev_private; |
1248 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1248 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1249 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); |
1249 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); |
1250 | u32 temp; |
1250 | u32 temp; |
1251 | bool input1, input2; |
1251 | bool input1, input2; |
1252 | int i; |
1252 | int i; |
1253 | u8 status; |
1253 | u8 status; |
1254 | 1254 | ||
1255 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1255 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1256 | if ((temp & SDVO_ENABLE) == 0) |
1256 | if ((temp & SDVO_ENABLE) == 0) |
1257 | intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE); |
1257 | intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE); |
1258 | for (i = 0; i < 2; i++) |
1258 | for (i = 0; i < 2; i++) |
1259 | intel_wait_for_vblank(dev, intel_crtc->pipe); |
1259 | intel_wait_for_vblank(dev, intel_crtc->pipe); |
1260 | 1260 | ||
1261 | status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); |
1261 | status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); |
1262 | /* Warn if the device reported failure to sync. |
1262 | /* Warn if the device reported failure to sync. |
1263 | * A lot of SDVO devices fail to notify of sync, but it's |
1263 | * A lot of SDVO devices fail to notify of sync, but it's |
1264 | * a given it the status is a success, we succeeded. |
1264 | * a given it the status is a success, we succeeded. |
1265 | */ |
1265 | */ |
1266 | if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { |
1266 | if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { |
1267 | DRM_DEBUG_KMS("First %s output reported failure to " |
1267 | DRM_DEBUG_KMS("First %s output reported failure to " |
1268 | "sync\n", SDVO_NAME(intel_sdvo)); |
1268 | "sync\n", SDVO_NAME(intel_sdvo)); |
1269 | } |
1269 | } |
1270 | 1270 | ||
1271 | if (0) |
1271 | if (0) |
1272 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1272 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1273 | DRM_MODE_DPMS_ON); |
1273 | DRM_MODE_DPMS_ON); |
1274 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
1274 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
1275 | } |
1275 | } |
1276 | 1276 | ||
1277 | static void intel_sdvo_dpms(struct drm_connector *connector, int mode) |
1277 | static void intel_sdvo_dpms(struct drm_connector *connector, int mode) |
1278 | { |
1278 | { |
1279 | struct drm_crtc *crtc; |
1279 | struct drm_crtc *crtc; |
1280 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1280 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1281 | 1281 | ||
1282 | /* dvo supports only 2 dpms states. */ |
1282 | /* dvo supports only 2 dpms states. */ |
1283 | if (mode != DRM_MODE_DPMS_ON) |
1283 | if (mode != DRM_MODE_DPMS_ON) |
1284 | mode = DRM_MODE_DPMS_OFF; |
1284 | mode = DRM_MODE_DPMS_OFF; |
1285 | 1285 | ||
1286 | if (mode == connector->dpms) |
1286 | if (mode == connector->dpms) |
1287 | return; |
1287 | return; |
1288 | 1288 | ||
1289 | connector->dpms = mode; |
1289 | connector->dpms = mode; |
1290 | 1290 | ||
1291 | /* Only need to change hw state when actually enabled */ |
1291 | /* Only need to change hw state when actually enabled */ |
1292 | crtc = intel_sdvo->base.base.crtc; |
1292 | crtc = intel_sdvo->base.base.crtc; |
1293 | if (!crtc) { |
1293 | if (!crtc) { |
1294 | intel_sdvo->base.connectors_active = false; |
1294 | intel_sdvo->base.connectors_active = false; |
1295 | return; |
1295 | return; |
1296 | } |
1296 | } |
1297 | 1297 | ||
1298 | if (mode != DRM_MODE_DPMS_ON) { |
1298 | if (mode != DRM_MODE_DPMS_ON) { |
1299 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
1299 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
1300 | if (0) |
1300 | if (0) |
1301 | intel_sdvo_set_encoder_power_state(intel_sdvo, mode); |
1301 | intel_sdvo_set_encoder_power_state(intel_sdvo, mode); |
1302 | 1302 | ||
1303 | intel_sdvo->base.connectors_active = false; |
1303 | intel_sdvo->base.connectors_active = false; |
1304 | 1304 | ||
1305 | intel_crtc_update_dpms(crtc); |
1305 | intel_crtc_update_dpms(crtc); |
1306 | } else { |
1306 | } else { |
1307 | intel_sdvo->base.connectors_active = true; |
1307 | intel_sdvo->base.connectors_active = true; |
1308 | 1308 | ||
1309 | intel_crtc_update_dpms(crtc); |
1309 | intel_crtc_update_dpms(crtc); |
1310 | 1310 | ||
1311 | if (0) |
1311 | if (0) |
1312 | intel_sdvo_set_encoder_power_state(intel_sdvo, mode); |
1312 | intel_sdvo_set_encoder_power_state(intel_sdvo, mode); |
1313 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
1313 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
1314 | } |
1314 | } |
1315 | 1315 | ||
1316 | intel_modeset_check_state(connector->dev); |
1316 | intel_modeset_check_state(connector->dev); |
1317 | } |
1317 | } |
1318 | 1318 | ||
1319 | static int intel_sdvo_mode_valid(struct drm_connector *connector, |
1319 | static int intel_sdvo_mode_valid(struct drm_connector *connector, |
1320 | struct drm_display_mode *mode) |
1320 | struct drm_display_mode *mode) |
1321 | { |
1321 | { |
1322 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1322 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1323 | 1323 | ||
1324 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
1324 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
1325 | return MODE_NO_DBLESCAN; |
1325 | return MODE_NO_DBLESCAN; |
1326 | 1326 | ||
1327 | if (intel_sdvo->pixel_clock_min > mode->clock) |
1327 | if (intel_sdvo->pixel_clock_min > mode->clock) |
1328 | return MODE_CLOCK_LOW; |
1328 | return MODE_CLOCK_LOW; |
1329 | 1329 | ||
1330 | if (intel_sdvo->pixel_clock_max < mode->clock) |
1330 | if (intel_sdvo->pixel_clock_max < mode->clock) |
1331 | return MODE_CLOCK_HIGH; |
1331 | return MODE_CLOCK_HIGH; |
1332 | 1332 | ||
1333 | if (intel_sdvo->is_lvds) { |
1333 | if (intel_sdvo->is_lvds) { |
1334 | if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) |
1334 | if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) |
1335 | return MODE_PANEL; |
1335 | return MODE_PANEL; |
1336 | 1336 | ||
1337 | if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) |
1337 | if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) |
1338 | return MODE_PANEL; |
1338 | return MODE_PANEL; |
1339 | } |
1339 | } |
1340 | 1340 | ||
1341 | return MODE_OK; |
1341 | return MODE_OK; |
1342 | } |
1342 | } |
1343 | 1343 | ||
1344 | static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) |
1344 | static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) |
1345 | { |
1345 | { |
1346 | BUILD_BUG_ON(sizeof(*caps) != 8); |
1346 | BUILD_BUG_ON(sizeof(*caps) != 8); |
1347 | if (!intel_sdvo_get_value(intel_sdvo, |
1347 | if (!intel_sdvo_get_value(intel_sdvo, |
1348 | SDVO_CMD_GET_DEVICE_CAPS, |
1348 | SDVO_CMD_GET_DEVICE_CAPS, |
1349 | caps, sizeof(*caps))) |
1349 | caps, sizeof(*caps))) |
1350 | return false; |
1350 | return false; |
1351 | 1351 | ||
1352 | DRM_DEBUG_KMS("SDVO capabilities:\n" |
1352 | DRM_DEBUG_KMS("SDVO capabilities:\n" |
1353 | " vendor_id: %d\n" |
1353 | " vendor_id: %d\n" |
1354 | " device_id: %d\n" |
1354 | " device_id: %d\n" |
1355 | " device_rev_id: %d\n" |
1355 | " device_rev_id: %d\n" |
1356 | " sdvo_version_major: %d\n" |
1356 | " sdvo_version_major: %d\n" |
1357 | " sdvo_version_minor: %d\n" |
1357 | " sdvo_version_minor: %d\n" |
1358 | " sdvo_inputs_mask: %d\n" |
1358 | " sdvo_inputs_mask: %d\n" |
1359 | " smooth_scaling: %d\n" |
1359 | " smooth_scaling: %d\n" |
1360 | " sharp_scaling: %d\n" |
1360 | " sharp_scaling: %d\n" |
1361 | " up_scaling: %d\n" |
1361 | " up_scaling: %d\n" |
1362 | " down_scaling: %d\n" |
1362 | " down_scaling: %d\n" |
1363 | " stall_support: %d\n" |
1363 | " stall_support: %d\n" |
1364 | " output_flags: %d\n", |
1364 | " output_flags: %d\n", |
1365 | caps->vendor_id, |
1365 | caps->vendor_id, |
1366 | caps->device_id, |
1366 | caps->device_id, |
1367 | caps->device_rev_id, |
1367 | caps->device_rev_id, |
1368 | caps->sdvo_version_major, |
1368 | caps->sdvo_version_major, |
1369 | caps->sdvo_version_minor, |
1369 | caps->sdvo_version_minor, |
1370 | caps->sdvo_inputs_mask, |
1370 | caps->sdvo_inputs_mask, |
1371 | caps->smooth_scaling, |
1371 | caps->smooth_scaling, |
1372 | caps->sharp_scaling, |
1372 | caps->sharp_scaling, |
1373 | caps->up_scaling, |
1373 | caps->up_scaling, |
1374 | caps->down_scaling, |
1374 | caps->down_scaling, |
1375 | caps->stall_support, |
1375 | caps->stall_support, |
1376 | caps->output_flags); |
1376 | caps->output_flags); |
1377 | 1377 | ||
1378 | return true; |
1378 | return true; |
1379 | } |
1379 | } |
1380 | 1380 | ||
1381 | static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) |
1381 | static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) |
1382 | { |
1382 | { |
1383 | struct drm_device *dev = intel_sdvo->base.base.dev; |
1383 | struct drm_device *dev = intel_sdvo->base.base.dev; |
1384 | uint16_t hotplug; |
1384 | uint16_t hotplug; |
1385 | 1385 | ||
1386 | /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise |
1386 | /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise |
1387 | * on the line. */ |
1387 | * on the line. */ |
1388 | if (IS_I945G(dev) || IS_I945GM(dev)) |
1388 | if (IS_I945G(dev) || IS_I945GM(dev)) |
1389 | return 0; |
1389 | return 0; |
1390 | 1390 | ||
1391 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, |
1391 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, |
1392 | &hotplug, sizeof(hotplug))) |
1392 | &hotplug, sizeof(hotplug))) |
1393 | return 0; |
1393 | return 0; |
1394 | 1394 | ||
1395 | return hotplug; |
1395 | return hotplug; |
1396 | } |
1396 | } |
1397 | 1397 | ||
1398 | static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) |
1398 | static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) |
1399 | { |
1399 | { |
1400 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1400 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); |
1401 | 1401 | ||
1402 | intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, |
1402 | intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, |
1403 | &intel_sdvo->hotplug_active, 2); |
1403 | &intel_sdvo->hotplug_active, 2); |
1404 | } |
1404 | } |
1405 | 1405 | ||
1406 | static bool |
1406 | static bool |
1407 | intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) |
1407 | intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) |
1408 | { |
1408 | { |
1409 | /* Is there more than one type of output? */ |
1409 | /* Is there more than one type of output? */ |
1410 | return hweight16(intel_sdvo->caps.output_flags) > 1; |
1410 | return hweight16(intel_sdvo->caps.output_flags) > 1; |
1411 | } |
1411 | } |
1412 | 1412 | ||
1413 | static struct edid * |
1413 | static struct edid * |
1414 | intel_sdvo_get_edid(struct drm_connector *connector) |
1414 | intel_sdvo_get_edid(struct drm_connector *connector) |
1415 | { |
1415 | { |
1416 | struct intel_sdvo *sdvo = intel_attached_sdvo(connector); |
1416 | struct intel_sdvo *sdvo = intel_attached_sdvo(connector); |
1417 | return drm_get_edid(connector, &sdvo->ddc); |
1417 | return drm_get_edid(connector, &sdvo->ddc); |
1418 | } |
1418 | } |
1419 | 1419 | ||
1420 | /* Mac mini hack -- use the same DDC as the analog connector */ |
1420 | /* Mac mini hack -- use the same DDC as the analog connector */ |
1421 | static struct edid * |
1421 | static struct edid * |
1422 | intel_sdvo_get_analog_edid(struct drm_connector *connector) |
1422 | intel_sdvo_get_analog_edid(struct drm_connector *connector) |
1423 | { |
1423 | { |
1424 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1424 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1425 | 1425 | ||
1426 | return drm_get_edid(connector, |
1426 | return drm_get_edid(connector, |
1427 | intel_gmbus_get_adapter(dev_priv, |
1427 | intel_gmbus_get_adapter(dev_priv, |
1428 | dev_priv->crt_ddc_pin)); |
1428 | dev_priv->crt_ddc_pin)); |
1429 | } |
1429 | } |
1430 | 1430 | ||
1431 | static enum drm_connector_status |
1431 | static enum drm_connector_status |
1432 | intel_sdvo_tmds_sink_detect(struct drm_connector *connector) |
1432 | intel_sdvo_tmds_sink_detect(struct drm_connector *connector) |
1433 | { |
1433 | { |
1434 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1434 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1435 | enum drm_connector_status status; |
1435 | enum drm_connector_status status; |
1436 | struct edid *edid; |
1436 | struct edid *edid; |
1437 | 1437 | ||
1438 | edid = intel_sdvo_get_edid(connector); |
1438 | edid = intel_sdvo_get_edid(connector); |
1439 | 1439 | ||
1440 | if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { |
1440 | if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { |
1441 | u8 ddc, saved_ddc = intel_sdvo->ddc_bus; |
1441 | u8 ddc, saved_ddc = intel_sdvo->ddc_bus; |
1442 | 1442 | ||
1443 | /* |
1443 | /* |
1444 | * Don't use the 1 as the argument of DDC bus switch to get |
1444 | * Don't use the 1 as the argument of DDC bus switch to get |
1445 | * the EDID. It is used for SDVO SPD ROM. |
1445 | * the EDID. It is used for SDVO SPD ROM. |
1446 | */ |
1446 | */ |
1447 | for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { |
1447 | for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { |
1448 | intel_sdvo->ddc_bus = ddc; |
1448 | intel_sdvo->ddc_bus = ddc; |
1449 | edid = intel_sdvo_get_edid(connector); |
1449 | edid = intel_sdvo_get_edid(connector); |
1450 | if (edid) |
1450 | if (edid) |
1451 | break; |
1451 | break; |
1452 | } |
1452 | } |
1453 | /* |
1453 | /* |
1454 | * If we found the EDID on the other bus, |
1454 | * If we found the EDID on the other bus, |
1455 | * assume that is the correct DDC bus. |
1455 | * assume that is the correct DDC bus. |
1456 | */ |
1456 | */ |
1457 | if (edid == NULL) |
1457 | if (edid == NULL) |
1458 | intel_sdvo->ddc_bus = saved_ddc; |
1458 | intel_sdvo->ddc_bus = saved_ddc; |
1459 | } |
1459 | } |
1460 | 1460 | ||
1461 | /* |
1461 | /* |
1462 | * When there is no edid and no monitor is connected with VGA |
1462 | * When there is no edid and no monitor is connected with VGA |
1463 | * port, try to use the CRT ddc to read the EDID for DVI-connector. |
1463 | * port, try to use the CRT ddc to read the EDID for DVI-connector. |
1464 | */ |
1464 | */ |
1465 | if (edid == NULL) |
1465 | if (edid == NULL) |
1466 | edid = intel_sdvo_get_analog_edid(connector); |
1466 | edid = intel_sdvo_get_analog_edid(connector); |
1467 | 1467 | ||
1468 | status = connector_status_unknown; |
1468 | status = connector_status_unknown; |
1469 | if (edid != NULL) { |
1469 | if (edid != NULL) { |
1470 | /* DDC bus is shared, match EDID to connector type */ |
1470 | /* DDC bus is shared, match EDID to connector type */ |
1471 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { |
1471 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { |
1472 | status = connector_status_connected; |
1472 | status = connector_status_connected; |
1473 | if (intel_sdvo->is_hdmi) { |
1473 | if (intel_sdvo->is_hdmi) { |
1474 | intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); |
1474 | intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); |
1475 | intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); |
1475 | intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); |
1476 | } |
1476 | } |
1477 | } else |
1477 | } else |
1478 | status = connector_status_disconnected; |
1478 | status = connector_status_disconnected; |
1479 | kfree(edid); |
1479 | kfree(edid); |
1480 | } |
1480 | } |
1481 | 1481 | ||
1482 | if (status == connector_status_connected) { |
1482 | if (status == connector_status_connected) { |
1483 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1483 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1484 | if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO) |
1484 | if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO) |
1485 | intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON); |
1485 | intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON); |
1486 | } |
1486 | } |
1487 | 1487 | ||
1488 | return status; |
1488 | return status; |
1489 | } |
1489 | } |
1490 | 1490 | ||
1491 | static bool |
1491 | static bool |
1492 | intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, |
1492 | intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, |
1493 | struct edid *edid) |
1493 | struct edid *edid) |
1494 | { |
1494 | { |
1495 | bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); |
1495 | bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); |
1496 | bool connector_is_digital = !!IS_DIGITAL(sdvo); |
1496 | bool connector_is_digital = !!IS_DIGITAL(sdvo); |
1497 | 1497 | ||
1498 | DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", |
1498 | DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", |
1499 | connector_is_digital, monitor_is_digital); |
1499 | connector_is_digital, monitor_is_digital); |
1500 | return connector_is_digital == monitor_is_digital; |
1500 | return connector_is_digital == monitor_is_digital; |
1501 | } |
1501 | } |
1502 | 1502 | ||
1503 | static enum drm_connector_status |
1503 | static enum drm_connector_status |
1504 | intel_sdvo_detect(struct drm_connector *connector, bool force) |
1504 | intel_sdvo_detect(struct drm_connector *connector, bool force) |
1505 | { |
1505 | { |
1506 | uint16_t response; |
1506 | uint16_t response; |
1507 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1507 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1508 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1508 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1509 | enum drm_connector_status ret; |
1509 | enum drm_connector_status ret; |
1510 | 1510 | ||
1511 | if (!intel_sdvo_write_cmd(intel_sdvo, |
1511 | if (!intel_sdvo_write_cmd(intel_sdvo, |
1512 | SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0)) |
1512 | SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0)) |
1513 | return connector_status_unknown; |
1513 | return connector_status_unknown; |
1514 | 1514 | ||
1515 | /* add 30ms delay when the output type might be TV */ |
1515 | /* add 30ms delay when the output type might be TV */ |
1516 | if (intel_sdvo->caps.output_flags & SDVO_TV_MASK) |
1516 | if (intel_sdvo->caps.output_flags & SDVO_TV_MASK) |
1517 | msleep(30); |
1517 | msleep(30); |
1518 | 1518 | ||
1519 | if (!intel_sdvo_read_response(intel_sdvo, &response, 2)) |
1519 | if (!intel_sdvo_read_response(intel_sdvo, &response, 2)) |
1520 | return connector_status_unknown; |
1520 | return connector_status_unknown; |
1521 | 1521 | ||
1522 | DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", |
1522 | DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", |
1523 | response & 0xff, response >> 8, |
1523 | response & 0xff, response >> 8, |
1524 | intel_sdvo_connector->output_flag); |
1524 | intel_sdvo_connector->output_flag); |
1525 | 1525 | ||
1526 | if (response == 0) |
1526 | if (response == 0) |
1527 | return connector_status_disconnected; |
1527 | return connector_status_disconnected; |
1528 | 1528 | ||
1529 | intel_sdvo->attached_output = response; |
1529 | intel_sdvo->attached_output = response; |
1530 | 1530 | ||
1531 | intel_sdvo->has_hdmi_monitor = false; |
1531 | intel_sdvo->has_hdmi_monitor = false; |
1532 | intel_sdvo->has_hdmi_audio = false; |
1532 | intel_sdvo->has_hdmi_audio = false; |
1533 | 1533 | ||
1534 | if ((intel_sdvo_connector->output_flag & response) == 0) |
1534 | if ((intel_sdvo_connector->output_flag & response) == 0) |
1535 | ret = connector_status_disconnected; |
1535 | ret = connector_status_disconnected; |
1536 | else if (IS_TMDS(intel_sdvo_connector)) |
1536 | else if (IS_TMDS(intel_sdvo_connector)) |
1537 | ret = intel_sdvo_tmds_sink_detect(connector); |
1537 | ret = intel_sdvo_tmds_sink_detect(connector); |
1538 | else { |
1538 | else { |
1539 | struct edid *edid; |
1539 | struct edid *edid; |
1540 | 1540 | ||
1541 | /* if we have an edid check it matches the connection */ |
1541 | /* if we have an edid check it matches the connection */ |
1542 | edid = intel_sdvo_get_edid(connector); |
1542 | edid = intel_sdvo_get_edid(connector); |
1543 | if (edid == NULL) |
1543 | if (edid == NULL) |
1544 | edid = intel_sdvo_get_analog_edid(connector); |
1544 | edid = intel_sdvo_get_analog_edid(connector); |
1545 | if (edid != NULL) { |
1545 | if (edid != NULL) { |
1546 | if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, |
1546 | if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, |
1547 | edid)) |
1547 | edid)) |
1548 | ret = connector_status_connected; |
1548 | ret = connector_status_connected; |
1549 | else |
1549 | else |
1550 | ret = connector_status_disconnected; |
1550 | ret = connector_status_disconnected; |
1551 | 1551 | ||
1552 | kfree(edid); |
1552 | kfree(edid); |
1553 | } else |
1553 | } else |
1554 | ret = connector_status_connected; |
1554 | ret = connector_status_connected; |
1555 | } |
1555 | } |
1556 | 1556 | ||
1557 | /* May update encoder flag for like clock for SDVO TV, etc.*/ |
1557 | /* May update encoder flag for like clock for SDVO TV, etc.*/ |
1558 | if (ret == connector_status_connected) { |
1558 | if (ret == connector_status_connected) { |
1559 | intel_sdvo->is_tv = false; |
1559 | intel_sdvo->is_tv = false; |
1560 | intel_sdvo->is_lvds = false; |
1560 | intel_sdvo->is_lvds = false; |
1561 | intel_sdvo->base.needs_tv_clock = false; |
1561 | intel_sdvo->base.needs_tv_clock = false; |
1562 | 1562 | ||
1563 | if (response & SDVO_TV_MASK) { |
1563 | if (response & SDVO_TV_MASK) { |
1564 | intel_sdvo->is_tv = true; |
1564 | intel_sdvo->is_tv = true; |
1565 | intel_sdvo->base.needs_tv_clock = true; |
1565 | intel_sdvo->base.needs_tv_clock = true; |
1566 | } |
1566 | } |
1567 | if (response & SDVO_LVDS_MASK) |
1567 | if (response & SDVO_LVDS_MASK) |
1568 | intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; |
1568 | intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; |
1569 | } |
1569 | } |
1570 | 1570 | ||
1571 | return ret; |
1571 | return ret; |
1572 | } |
1572 | } |
1573 | 1573 | ||
1574 | static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) |
1574 | static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) |
1575 | { |
1575 | { |
1576 | struct edid *edid; |
1576 | struct edid *edid; |
1577 | 1577 | ||
1578 | /* set the bus switch and get the modes */ |
1578 | /* set the bus switch and get the modes */ |
1579 | edid = intel_sdvo_get_edid(connector); |
1579 | edid = intel_sdvo_get_edid(connector); |
1580 | 1580 | ||
1581 | /* |
1581 | /* |
1582 | * Mac mini hack. On this device, the DVI-I connector shares one DDC |
1582 | * Mac mini hack. On this device, the DVI-I connector shares one DDC |
1583 | * link between analog and digital outputs. So, if the regular SDVO |
1583 | * link between analog and digital outputs. So, if the regular SDVO |
1584 | * DDC fails, check to see if the analog output is disconnected, in |
1584 | * DDC fails, check to see if the analog output is disconnected, in |
1585 | * which case we'll look there for the digital DDC data. |
1585 | * which case we'll look there for the digital DDC data. |
1586 | */ |
1586 | */ |
1587 | if (edid == NULL) |
1587 | if (edid == NULL) |
1588 | edid = intel_sdvo_get_analog_edid(connector); |
1588 | edid = intel_sdvo_get_analog_edid(connector); |
1589 | 1589 | ||
1590 | if (edid != NULL) { |
1590 | if (edid != NULL) { |
1591 | if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), |
1591 | if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), |
1592 | edid)) { |
1592 | edid)) { |
1593 | drm_mode_connector_update_edid_property(connector, edid); |
1593 | drm_mode_connector_update_edid_property(connector, edid); |
1594 | drm_add_edid_modes(connector, edid); |
1594 | drm_add_edid_modes(connector, edid); |
1595 | } |
1595 | } |
1596 | 1596 | ||
1597 | kfree(edid); |
1597 | kfree(edid); |
1598 | } |
1598 | } |
1599 | } |
1599 | } |
1600 | 1600 | ||
1601 | /* |
1601 | /* |
1602 | * Set of SDVO TV modes. |
1602 | * Set of SDVO TV modes. |
1603 | * Note! This is in reply order (see loop in get_tv_modes). |
1603 | * Note! This is in reply order (see loop in get_tv_modes). |
1604 | * XXX: all 60Hz refresh? |
1604 | * XXX: all 60Hz refresh? |
1605 | */ |
1605 | */ |
1606 | static const struct drm_display_mode sdvo_tv_modes[] = { |
1606 | static const struct drm_display_mode sdvo_tv_modes[] = { |
1607 | { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, |
1607 | { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, |
1608 | 416, 0, 200, 201, 232, 233, 0, |
1608 | 416, 0, 200, 201, 232, 233, 0, |
1609 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1609 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1610 | { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, |
1610 | { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, |
1611 | 416, 0, 240, 241, 272, 273, 0, |
1611 | 416, 0, 240, 241, 272, 273, 0, |
1612 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1612 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1613 | { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, |
1613 | { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, |
1614 | 496, 0, 300, 301, 332, 333, 0, |
1614 | 496, 0, 300, 301, 332, 333, 0, |
1615 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1615 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1616 | { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, |
1616 | { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, |
1617 | 736, 0, 350, 351, 382, 383, 0, |
1617 | 736, 0, 350, 351, 382, 383, 0, |
1618 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1618 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1619 | { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, |
1619 | { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, |
1620 | 736, 0, 400, 401, 432, 433, 0, |
1620 | 736, 0, 400, 401, 432, 433, 0, |
1621 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1621 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1622 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, |
1622 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, |
1623 | 736, 0, 480, 481, 512, 513, 0, |
1623 | 736, 0, 480, 481, 512, 513, 0, |
1624 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1624 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1625 | { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, |
1625 | { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, |
1626 | 800, 0, 480, 481, 512, 513, 0, |
1626 | 800, 0, 480, 481, 512, 513, 0, |
1627 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1627 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1628 | { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, |
1628 | { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, |
1629 | 800, 0, 576, 577, 608, 609, 0, |
1629 | 800, 0, 576, 577, 608, 609, 0, |
1630 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1630 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1631 | { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, |
1631 | { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, |
1632 | 816, 0, 350, 351, 382, 383, 0, |
1632 | 816, 0, 350, 351, 382, 383, 0, |
1633 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1633 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1634 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, |
1634 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, |
1635 | 816, 0, 400, 401, 432, 433, 0, |
1635 | 816, 0, 400, 401, 432, 433, 0, |
1636 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1636 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1637 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, |
1637 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, |
1638 | 816, 0, 480, 481, 512, 513, 0, |
1638 | 816, 0, 480, 481, 512, 513, 0, |
1639 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1639 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1640 | { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, |
1640 | { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, |
1641 | 816, 0, 540, 541, 572, 573, 0, |
1641 | 816, 0, 540, 541, 572, 573, 0, |
1642 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1642 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1643 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, |
1643 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, |
1644 | 816, 0, 576, 577, 608, 609, 0, |
1644 | 816, 0, 576, 577, 608, 609, 0, |
1645 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1645 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1646 | { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, |
1646 | { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, |
1647 | 864, 0, 576, 577, 608, 609, 0, |
1647 | 864, 0, 576, 577, 608, 609, 0, |
1648 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1648 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1649 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, |
1649 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, |
1650 | 896, 0, 600, 601, 632, 633, 0, |
1650 | 896, 0, 600, 601, 632, 633, 0, |
1651 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1651 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1652 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, |
1652 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, |
1653 | 928, 0, 624, 625, 656, 657, 0, |
1653 | 928, 0, 624, 625, 656, 657, 0, |
1654 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1654 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1655 | { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, |
1655 | { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, |
1656 | 1016, 0, 766, 767, 798, 799, 0, |
1656 | 1016, 0, 766, 767, 798, 799, 0, |
1657 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1657 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1658 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, |
1658 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, |
1659 | 1120, 0, 768, 769, 800, 801, 0, |
1659 | 1120, 0, 768, 769, 800, 801, 0, |
1660 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1660 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1661 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, |
1661 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, |
1662 | 1376, 0, 1024, 1025, 1056, 1057, 0, |
1662 | 1376, 0, 1024, 1025, 1056, 1057, 0, |
1663 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1663 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1664 | }; |
1664 | }; |
1665 | 1665 | ||
1666 | static void intel_sdvo_get_tv_modes(struct drm_connector *connector) |
1666 | static void intel_sdvo_get_tv_modes(struct drm_connector *connector) |
1667 | { |
1667 | { |
1668 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1668 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1669 | struct intel_sdvo_sdtv_resolution_request tv_res; |
1669 | struct intel_sdvo_sdtv_resolution_request tv_res; |
1670 | uint32_t reply = 0, format_map = 0; |
1670 | uint32_t reply = 0, format_map = 0; |
1671 | int i; |
1671 | int i; |
1672 | 1672 | ||
1673 | /* Read the list of supported input resolutions for the selected TV |
1673 | /* Read the list of supported input resolutions for the selected TV |
1674 | * format. |
1674 | * format. |
1675 | */ |
1675 | */ |
1676 | format_map = 1 << intel_sdvo->tv_format_index; |
1676 | format_map = 1 << intel_sdvo->tv_format_index; |
1677 | memcpy(&tv_res, &format_map, |
1677 | memcpy(&tv_res, &format_map, |
1678 | min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); |
1678 | min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); |
1679 | 1679 | ||
1680 | if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) |
1680 | if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) |
1681 | return; |
1681 | return; |
1682 | 1682 | ||
1683 | BUILD_BUG_ON(sizeof(tv_res) != 3); |
1683 | BUILD_BUG_ON(sizeof(tv_res) != 3); |
1684 | if (!intel_sdvo_write_cmd(intel_sdvo, |
1684 | if (!intel_sdvo_write_cmd(intel_sdvo, |
1685 | SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, |
1685 | SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, |
1686 | &tv_res, sizeof(tv_res))) |
1686 | &tv_res, sizeof(tv_res))) |
1687 | return; |
1687 | return; |
1688 | if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) |
1688 | if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) |
1689 | return; |
1689 | return; |
1690 | 1690 | ||
1691 | for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) |
1691 | for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) |
1692 | if (reply & (1 << i)) { |
1692 | if (reply & (1 << i)) { |
1693 | struct drm_display_mode *nmode; |
1693 | struct drm_display_mode *nmode; |
1694 | nmode = drm_mode_duplicate(connector->dev, |
1694 | nmode = drm_mode_duplicate(connector->dev, |
1695 | &sdvo_tv_modes[i]); |
1695 | &sdvo_tv_modes[i]); |
1696 | if (nmode) |
1696 | if (nmode) |
1697 | drm_mode_probed_add(connector, nmode); |
1697 | drm_mode_probed_add(connector, nmode); |
1698 | } |
1698 | } |
1699 | } |
1699 | } |
1700 | 1700 | ||
1701 | static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) |
1701 | static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) |
1702 | { |
1702 | { |
1703 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1703 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1704 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1704 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1705 | struct drm_display_mode *newmode; |
1705 | struct drm_display_mode *newmode; |
1706 | 1706 | ||
1707 | /* |
1707 | /* |
1708 | * Attempt to get the mode list from DDC. |
1708 | * Attempt to get the mode list from DDC. |
1709 | * Assume that the preferred modes are |
1709 | * Assume that the preferred modes are |
1710 | * arranged in priority order. |
1710 | * arranged in priority order. |
1711 | */ |
1711 | */ |
1712 | intel_ddc_get_modes(connector, intel_sdvo->i2c); |
1712 | intel_ddc_get_modes(connector, intel_sdvo->i2c); |
1713 | if (list_empty(&connector->probed_modes) == false) |
1713 | if (list_empty(&connector->probed_modes) == false) |
1714 | goto end; |
1714 | goto end; |
1715 | 1715 | ||
1716 | /* Fetch modes from VBT */ |
1716 | /* Fetch modes from VBT */ |
1717 | if (dev_priv->sdvo_lvds_vbt_mode != NULL) { |
1717 | if (dev_priv->sdvo_lvds_vbt_mode != NULL) { |
1718 | newmode = drm_mode_duplicate(connector->dev, |
1718 | newmode = drm_mode_duplicate(connector->dev, |
1719 | dev_priv->sdvo_lvds_vbt_mode); |
1719 | dev_priv->sdvo_lvds_vbt_mode); |
1720 | if (newmode != NULL) { |
1720 | if (newmode != NULL) { |
1721 | /* Guarantee the mode is preferred */ |
1721 | /* Guarantee the mode is preferred */ |
1722 | newmode->type = (DRM_MODE_TYPE_PREFERRED | |
1722 | newmode->type = (DRM_MODE_TYPE_PREFERRED | |
1723 | DRM_MODE_TYPE_DRIVER); |
1723 | DRM_MODE_TYPE_DRIVER); |
1724 | drm_mode_probed_add(connector, newmode); |
1724 | drm_mode_probed_add(connector, newmode); |
1725 | } |
1725 | } |
1726 | } |
1726 | } |
1727 | 1727 | ||
1728 | end: |
1728 | end: |
1729 | list_for_each_entry(newmode, &connector->probed_modes, head) { |
1729 | list_for_each_entry(newmode, &connector->probed_modes, head) { |
1730 | if (newmode->type & DRM_MODE_TYPE_PREFERRED) { |
1730 | if (newmode->type & DRM_MODE_TYPE_PREFERRED) { |
1731 | intel_sdvo->sdvo_lvds_fixed_mode = |
1731 | intel_sdvo->sdvo_lvds_fixed_mode = |
1732 | drm_mode_duplicate(connector->dev, newmode); |
1732 | drm_mode_duplicate(connector->dev, newmode); |
1733 | 1733 | ||
1734 | intel_sdvo->is_lvds = true; |
1734 | intel_sdvo->is_lvds = true; |
1735 | break; |
1735 | break; |
1736 | } |
1736 | } |
1737 | } |
1737 | } |
1738 | 1738 | ||
1739 | } |
1739 | } |
1740 | 1740 | ||
1741 | static int intel_sdvo_get_modes(struct drm_connector *connector) |
1741 | static int intel_sdvo_get_modes(struct drm_connector *connector) |
1742 | { |
1742 | { |
1743 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1743 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1744 | 1744 | ||
1745 | if (IS_TV(intel_sdvo_connector)) |
1745 | if (IS_TV(intel_sdvo_connector)) |
1746 | intel_sdvo_get_tv_modes(connector); |
1746 | intel_sdvo_get_tv_modes(connector); |
1747 | else if (IS_LVDS(intel_sdvo_connector)) |
1747 | else if (IS_LVDS(intel_sdvo_connector)) |
1748 | intel_sdvo_get_lvds_modes(connector); |
1748 | intel_sdvo_get_lvds_modes(connector); |
1749 | else |
1749 | else |
1750 | intel_sdvo_get_ddc_modes(connector); |
1750 | intel_sdvo_get_ddc_modes(connector); |
1751 | 1751 | ||
1752 | return !list_empty(&connector->probed_modes); |
1752 | return !list_empty(&connector->probed_modes); |
1753 | } |
1753 | } |
1754 | 1754 | ||
1755 | static void |
1755 | static void |
1756 | intel_sdvo_destroy_enhance_property(struct drm_connector *connector) |
1756 | intel_sdvo_destroy_enhance_property(struct drm_connector *connector) |
1757 | { |
1757 | { |
1758 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1758 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1759 | struct drm_device *dev = connector->dev; |
1759 | struct drm_device *dev = connector->dev; |
1760 | 1760 | ||
1761 | if (intel_sdvo_connector->left) |
1761 | if (intel_sdvo_connector->left) |
1762 | drm_property_destroy(dev, intel_sdvo_connector->left); |
1762 | drm_property_destroy(dev, intel_sdvo_connector->left); |
1763 | if (intel_sdvo_connector->right) |
1763 | if (intel_sdvo_connector->right) |
1764 | drm_property_destroy(dev, intel_sdvo_connector->right); |
1764 | drm_property_destroy(dev, intel_sdvo_connector->right); |
1765 | if (intel_sdvo_connector->top) |
1765 | if (intel_sdvo_connector->top) |
1766 | drm_property_destroy(dev, intel_sdvo_connector->top); |
1766 | drm_property_destroy(dev, intel_sdvo_connector->top); |
1767 | if (intel_sdvo_connector->bottom) |
1767 | if (intel_sdvo_connector->bottom) |
1768 | drm_property_destroy(dev, intel_sdvo_connector->bottom); |
1768 | drm_property_destroy(dev, intel_sdvo_connector->bottom); |
1769 | if (intel_sdvo_connector->hpos) |
1769 | if (intel_sdvo_connector->hpos) |
1770 | drm_property_destroy(dev, intel_sdvo_connector->hpos); |
1770 | drm_property_destroy(dev, intel_sdvo_connector->hpos); |
1771 | if (intel_sdvo_connector->vpos) |
1771 | if (intel_sdvo_connector->vpos) |
1772 | drm_property_destroy(dev, intel_sdvo_connector->vpos); |
1772 | drm_property_destroy(dev, intel_sdvo_connector->vpos); |
1773 | if (intel_sdvo_connector->saturation) |
1773 | if (intel_sdvo_connector->saturation) |
1774 | drm_property_destroy(dev, intel_sdvo_connector->saturation); |
1774 | drm_property_destroy(dev, intel_sdvo_connector->saturation); |
1775 | if (intel_sdvo_connector->contrast) |
1775 | if (intel_sdvo_connector->contrast) |
1776 | drm_property_destroy(dev, intel_sdvo_connector->contrast); |
1776 | drm_property_destroy(dev, intel_sdvo_connector->contrast); |
1777 | if (intel_sdvo_connector->hue) |
1777 | if (intel_sdvo_connector->hue) |
1778 | drm_property_destroy(dev, intel_sdvo_connector->hue); |
1778 | drm_property_destroy(dev, intel_sdvo_connector->hue); |
1779 | if (intel_sdvo_connector->sharpness) |
1779 | if (intel_sdvo_connector->sharpness) |
1780 | drm_property_destroy(dev, intel_sdvo_connector->sharpness); |
1780 | drm_property_destroy(dev, intel_sdvo_connector->sharpness); |
1781 | if (intel_sdvo_connector->flicker_filter) |
1781 | if (intel_sdvo_connector->flicker_filter) |
1782 | drm_property_destroy(dev, intel_sdvo_connector->flicker_filter); |
1782 | drm_property_destroy(dev, intel_sdvo_connector->flicker_filter); |
1783 | if (intel_sdvo_connector->flicker_filter_2d) |
1783 | if (intel_sdvo_connector->flicker_filter_2d) |
1784 | drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d); |
1784 | drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d); |
1785 | if (intel_sdvo_connector->flicker_filter_adaptive) |
1785 | if (intel_sdvo_connector->flicker_filter_adaptive) |
1786 | drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive); |
1786 | drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive); |
1787 | if (intel_sdvo_connector->tv_luma_filter) |
1787 | if (intel_sdvo_connector->tv_luma_filter) |
1788 | drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter); |
1788 | drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter); |
1789 | if (intel_sdvo_connector->tv_chroma_filter) |
1789 | if (intel_sdvo_connector->tv_chroma_filter) |
1790 | drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter); |
1790 | drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter); |
1791 | if (intel_sdvo_connector->dot_crawl) |
1791 | if (intel_sdvo_connector->dot_crawl) |
1792 | drm_property_destroy(dev, intel_sdvo_connector->dot_crawl); |
1792 | drm_property_destroy(dev, intel_sdvo_connector->dot_crawl); |
1793 | if (intel_sdvo_connector->brightness) |
1793 | if (intel_sdvo_connector->brightness) |
1794 | drm_property_destroy(dev, intel_sdvo_connector->brightness); |
1794 | drm_property_destroy(dev, intel_sdvo_connector->brightness); |
1795 | } |
1795 | } |
1796 | 1796 | ||
1797 | static void intel_sdvo_destroy(struct drm_connector *connector) |
1797 | static void intel_sdvo_destroy(struct drm_connector *connector) |
1798 | { |
1798 | { |
1799 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1799 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1800 | 1800 | ||
1801 | if (intel_sdvo_connector->tv_format) |
1801 | if (intel_sdvo_connector->tv_format) |
1802 | drm_property_destroy(connector->dev, |
1802 | drm_property_destroy(connector->dev, |
1803 | intel_sdvo_connector->tv_format); |
1803 | intel_sdvo_connector->tv_format); |
1804 | 1804 | ||
1805 | intel_sdvo_destroy_enhance_property(connector); |
1805 | intel_sdvo_destroy_enhance_property(connector); |
1806 | drm_sysfs_connector_remove(connector); |
1806 | drm_sysfs_connector_remove(connector); |
1807 | drm_connector_cleanup(connector); |
1807 | drm_connector_cleanup(connector); |
1808 | kfree(connector); |
1808 | kfree(connector); |
1809 | } |
1809 | } |
1810 | 1810 | ||
1811 | static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) |
1811 | static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) |
1812 | { |
1812 | { |
1813 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1813 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1814 | struct edid *edid; |
1814 | struct edid *edid; |
1815 | bool has_audio = false; |
1815 | bool has_audio = false; |
1816 | 1816 | ||
1817 | if (!intel_sdvo->is_hdmi) |
1817 | if (!intel_sdvo->is_hdmi) |
1818 | return false; |
1818 | return false; |
1819 | 1819 | ||
1820 | edid = intel_sdvo_get_edid(connector); |
1820 | edid = intel_sdvo_get_edid(connector); |
1821 | if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) |
1821 | if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) |
1822 | has_audio = drm_detect_monitor_audio(edid); |
1822 | has_audio = drm_detect_monitor_audio(edid); |
1823 | kfree(edid); |
1823 | kfree(edid); |
1824 | 1824 | ||
1825 | return has_audio; |
1825 | return has_audio; |
1826 | } |
1826 | } |
1827 | 1827 | ||
1828 | static int |
1828 | static int |
1829 | intel_sdvo_set_property(struct drm_connector *connector, |
1829 | intel_sdvo_set_property(struct drm_connector *connector, |
1830 | struct drm_property *property, |
1830 | struct drm_property *property, |
1831 | uint64_t val) |
1831 | uint64_t val) |
1832 | { |
1832 | { |
1833 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1833 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1834 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1834 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1835 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1835 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1836 | uint16_t temp_value; |
1836 | uint16_t temp_value; |
1837 | uint8_t cmd; |
1837 | uint8_t cmd; |
1838 | int ret; |
1838 | int ret; |
1839 | 1839 | ||
1840 | ret = drm_connector_property_set_value(connector, property, val); |
1840 | ret = drm_connector_property_set_value(connector, property, val); |
1841 | if (ret) |
1841 | if (ret) |
1842 | return ret; |
1842 | return ret; |
1843 | 1843 | ||
1844 | #if 0 |
1844 | #if 0 |
1845 | if (property == dev_priv->force_audio_property) { |
1845 | if (property == dev_priv->force_audio_property) { |
1846 | int i = val; |
1846 | int i = val; |
1847 | bool has_audio; |
1847 | bool has_audio; |
1848 | 1848 | ||
1849 | if (i == intel_sdvo_connector->force_audio) |
1849 | if (i == intel_sdvo_connector->force_audio) |
1850 | return 0; |
1850 | return 0; |
1851 | 1851 | ||
1852 | intel_sdvo_connector->force_audio = i; |
1852 | intel_sdvo_connector->force_audio = i; |
1853 | 1853 | ||
1854 | if (i == HDMI_AUDIO_AUTO) |
1854 | if (i == HDMI_AUDIO_AUTO) |
1855 | has_audio = intel_sdvo_detect_hdmi_audio(connector); |
1855 | has_audio = intel_sdvo_detect_hdmi_audio(connector); |
1856 | else |
1856 | else |
1857 | has_audio = (i == HDMI_AUDIO_ON); |
1857 | has_audio = (i == HDMI_AUDIO_ON); |
1858 | 1858 | ||
1859 | if (has_audio == intel_sdvo->has_hdmi_audio) |
1859 | if (has_audio == intel_sdvo->has_hdmi_audio) |
1860 | return 0; |
1860 | return 0; |
1861 | 1861 | ||
1862 | intel_sdvo->has_hdmi_audio = has_audio; |
1862 | intel_sdvo->has_hdmi_audio = has_audio; |
1863 | goto done; |
1863 | goto done; |
1864 | } |
1864 | } |
1865 | 1865 | ||
1866 | if (property == dev_priv->broadcast_rgb_property) { |
1866 | if (property == dev_priv->broadcast_rgb_property) { |
1867 | if (val == !!intel_sdvo->color_range) |
1867 | if (val == !!intel_sdvo->color_range) |
1868 | return 0; |
1868 | return 0; |
1869 | 1869 | ||
1870 | intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0; |
1870 | intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0; |
1871 | goto done; |
1871 | goto done; |
1872 | } |
1872 | } |
1873 | #endif |
1873 | #endif |
1874 | 1874 | ||
1875 | #define CHECK_PROPERTY(name, NAME) \ |
1875 | #define CHECK_PROPERTY(name, NAME) \ |
1876 | if (intel_sdvo_connector->name == property) { \ |
1876 | if (intel_sdvo_connector->name == property) { \ |
1877 | if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ |
1877 | if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ |
1878 | if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ |
1878 | if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ |
1879 | cmd = SDVO_CMD_SET_##NAME; \ |
1879 | cmd = SDVO_CMD_SET_##NAME; \ |
1880 | intel_sdvo_connector->cur_##name = temp_value; \ |
1880 | intel_sdvo_connector->cur_##name = temp_value; \ |
1881 | goto set_value; \ |
1881 | goto set_value; \ |
1882 | } |
1882 | } |
1883 | 1883 | ||
1884 | if (property == intel_sdvo_connector->tv_format) { |
1884 | if (property == intel_sdvo_connector->tv_format) { |
1885 | if (val >= TV_FORMAT_NUM) |
1885 | if (val >= TV_FORMAT_NUM) |
1886 | return -EINVAL; |
1886 | return -EINVAL; |
1887 | 1887 | ||
1888 | if (intel_sdvo->tv_format_index == |
1888 | if (intel_sdvo->tv_format_index == |
1889 | intel_sdvo_connector->tv_format_supported[val]) |
1889 | intel_sdvo_connector->tv_format_supported[val]) |
1890 | return 0; |
1890 | return 0; |
1891 | 1891 | ||
1892 | intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val]; |
1892 | intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val]; |
1893 | goto done; |
1893 | goto done; |
1894 | } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) { |
1894 | } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) { |
1895 | temp_value = val; |
1895 | temp_value = val; |
1896 | if (intel_sdvo_connector->left == property) { |
1896 | if (intel_sdvo_connector->left == property) { |
1897 | drm_connector_property_set_value(connector, |
1897 | drm_connector_property_set_value(connector, |
1898 | intel_sdvo_connector->right, val); |
1898 | intel_sdvo_connector->right, val); |
1899 | if (intel_sdvo_connector->left_margin == temp_value) |
1899 | if (intel_sdvo_connector->left_margin == temp_value) |
1900 | return 0; |
1900 | return 0; |
1901 | 1901 | ||
1902 | intel_sdvo_connector->left_margin = temp_value; |
1902 | intel_sdvo_connector->left_margin = temp_value; |
1903 | intel_sdvo_connector->right_margin = temp_value; |
1903 | intel_sdvo_connector->right_margin = temp_value; |
1904 | temp_value = intel_sdvo_connector->max_hscan - |
1904 | temp_value = intel_sdvo_connector->max_hscan - |
1905 | intel_sdvo_connector->left_margin; |
1905 | intel_sdvo_connector->left_margin; |
1906 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
1906 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
1907 | goto set_value; |
1907 | goto set_value; |
1908 | } else if (intel_sdvo_connector->right == property) { |
1908 | } else if (intel_sdvo_connector->right == property) { |
1909 | drm_connector_property_set_value(connector, |
1909 | drm_connector_property_set_value(connector, |
1910 | intel_sdvo_connector->left, val); |
1910 | intel_sdvo_connector->left, val); |
1911 | if (intel_sdvo_connector->right_margin == temp_value) |
1911 | if (intel_sdvo_connector->right_margin == temp_value) |
1912 | return 0; |
1912 | return 0; |
1913 | 1913 | ||
1914 | intel_sdvo_connector->left_margin = temp_value; |
1914 | intel_sdvo_connector->left_margin = temp_value; |
1915 | intel_sdvo_connector->right_margin = temp_value; |
1915 | intel_sdvo_connector->right_margin = temp_value; |
1916 | temp_value = intel_sdvo_connector->max_hscan - |
1916 | temp_value = intel_sdvo_connector->max_hscan - |
1917 | intel_sdvo_connector->left_margin; |
1917 | intel_sdvo_connector->left_margin; |
1918 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
1918 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
1919 | goto set_value; |
1919 | goto set_value; |
1920 | } else if (intel_sdvo_connector->top == property) { |
1920 | } else if (intel_sdvo_connector->top == property) { |
1921 | drm_connector_property_set_value(connector, |
1921 | drm_connector_property_set_value(connector, |
1922 | intel_sdvo_connector->bottom, val); |
1922 | intel_sdvo_connector->bottom, val); |
1923 | if (intel_sdvo_connector->top_margin == temp_value) |
1923 | if (intel_sdvo_connector->top_margin == temp_value) |
1924 | return 0; |
1924 | return 0; |
1925 | 1925 | ||
1926 | intel_sdvo_connector->top_margin = temp_value; |
1926 | intel_sdvo_connector->top_margin = temp_value; |
1927 | intel_sdvo_connector->bottom_margin = temp_value; |
1927 | intel_sdvo_connector->bottom_margin = temp_value; |
1928 | temp_value = intel_sdvo_connector->max_vscan - |
1928 | temp_value = intel_sdvo_connector->max_vscan - |
1929 | intel_sdvo_connector->top_margin; |
1929 | intel_sdvo_connector->top_margin; |
1930 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
1930 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
1931 | goto set_value; |
1931 | goto set_value; |
1932 | } else if (intel_sdvo_connector->bottom == property) { |
1932 | } else if (intel_sdvo_connector->bottom == property) { |
1933 | drm_connector_property_set_value(connector, |
1933 | drm_connector_property_set_value(connector, |
1934 | intel_sdvo_connector->top, val); |
1934 | intel_sdvo_connector->top, val); |
1935 | if (intel_sdvo_connector->bottom_margin == temp_value) |
1935 | if (intel_sdvo_connector->bottom_margin == temp_value) |
1936 | return 0; |
1936 | return 0; |
1937 | 1937 | ||
1938 | intel_sdvo_connector->top_margin = temp_value; |
1938 | intel_sdvo_connector->top_margin = temp_value; |
1939 | intel_sdvo_connector->bottom_margin = temp_value; |
1939 | intel_sdvo_connector->bottom_margin = temp_value; |
1940 | temp_value = intel_sdvo_connector->max_vscan - |
1940 | temp_value = intel_sdvo_connector->max_vscan - |
1941 | intel_sdvo_connector->top_margin; |
1941 | intel_sdvo_connector->top_margin; |
1942 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
1942 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
1943 | goto set_value; |
1943 | goto set_value; |
1944 | } |
1944 | } |
1945 | CHECK_PROPERTY(hpos, HPOS) |
1945 | CHECK_PROPERTY(hpos, HPOS) |
1946 | CHECK_PROPERTY(vpos, VPOS) |
1946 | CHECK_PROPERTY(vpos, VPOS) |
1947 | CHECK_PROPERTY(saturation, SATURATION) |
1947 | CHECK_PROPERTY(saturation, SATURATION) |
1948 | CHECK_PROPERTY(contrast, CONTRAST) |
1948 | CHECK_PROPERTY(contrast, CONTRAST) |
1949 | CHECK_PROPERTY(hue, HUE) |
1949 | CHECK_PROPERTY(hue, HUE) |
1950 | CHECK_PROPERTY(brightness, BRIGHTNESS) |
1950 | CHECK_PROPERTY(brightness, BRIGHTNESS) |
1951 | CHECK_PROPERTY(sharpness, SHARPNESS) |
1951 | CHECK_PROPERTY(sharpness, SHARPNESS) |
1952 | CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) |
1952 | CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) |
1953 | CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) |
1953 | CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) |
1954 | CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) |
1954 | CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) |
1955 | CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) |
1955 | CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) |
1956 | CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) |
1956 | CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) |
1957 | CHECK_PROPERTY(dot_crawl, DOT_CRAWL) |
1957 | CHECK_PROPERTY(dot_crawl, DOT_CRAWL) |
1958 | } |
1958 | } |
1959 | 1959 | ||
1960 | return -EINVAL; /* unknown property */ |
1960 | return -EINVAL; /* unknown property */ |
1961 | 1961 | ||
1962 | set_value: |
1962 | set_value: |
1963 | if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2)) |
1963 | if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2)) |
1964 | return -EIO; |
1964 | return -EIO; |
1965 | 1965 | ||
1966 | 1966 | ||
1967 | done: |
1967 | done: |
1968 | if (intel_sdvo->base.base.crtc) { |
1968 | if (intel_sdvo->base.base.crtc) { |
1969 | struct drm_crtc *crtc = intel_sdvo->base.base.crtc; |
1969 | struct drm_crtc *crtc = intel_sdvo->base.base.crtc; |
1970 | intel_set_mode(crtc, &crtc->mode, |
1970 | intel_set_mode(crtc, &crtc->mode, |
1971 | crtc->x, crtc->y, crtc->fb); |
1971 | crtc->x, crtc->y, crtc->fb); |
1972 | } |
1972 | } |
1973 | 1973 | ||
1974 | return 0; |
1974 | return 0; |
1975 | #undef CHECK_PROPERTY |
1975 | #undef CHECK_PROPERTY |
1976 | } |
1976 | } |
1977 | 1977 | ||
1978 | static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = { |
1978 | static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = { |
1979 | .mode_fixup = intel_sdvo_mode_fixup, |
1979 | .mode_fixup = intel_sdvo_mode_fixup, |
1980 | .mode_set = intel_sdvo_mode_set, |
1980 | .mode_set = intel_sdvo_mode_set, |
1981 | .disable = intel_encoder_noop, |
1981 | .disable = intel_encoder_noop, |
1982 | }; |
1982 | }; |
1983 | 1983 | ||
1984 | static const struct drm_connector_funcs intel_sdvo_connector_funcs = { |
1984 | static const struct drm_connector_funcs intel_sdvo_connector_funcs = { |
1985 | .dpms = intel_sdvo_dpms, |
1985 | .dpms = intel_sdvo_dpms, |
1986 | .detect = intel_sdvo_detect, |
1986 | .detect = intel_sdvo_detect, |
1987 | .fill_modes = drm_helper_probe_single_connector_modes, |
1987 | .fill_modes = drm_helper_probe_single_connector_modes, |
1988 | .set_property = intel_sdvo_set_property, |
1988 | .set_property = intel_sdvo_set_property, |
1989 | .destroy = intel_sdvo_destroy, |
1989 | .destroy = intel_sdvo_destroy, |
1990 | }; |
1990 | }; |
1991 | 1991 | ||
1992 | static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { |
1992 | static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { |
1993 | .get_modes = intel_sdvo_get_modes, |
1993 | .get_modes = intel_sdvo_get_modes, |
1994 | .mode_valid = intel_sdvo_mode_valid, |
1994 | .mode_valid = intel_sdvo_mode_valid, |
1995 | .best_encoder = intel_best_encoder, |
1995 | .best_encoder = intel_best_encoder, |
1996 | }; |
1996 | }; |
1997 | 1997 | ||
1998 | static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) |
1998 | static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) |
1999 | { |
1999 | { |
2000 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); |
2000 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); |
2001 | 2001 | ||
2002 | if (intel_sdvo->sdvo_lvds_fixed_mode != NULL) |
2002 | if (intel_sdvo->sdvo_lvds_fixed_mode != NULL) |
2003 | drm_mode_destroy(encoder->dev, |
2003 | drm_mode_destroy(encoder->dev, |
2004 | intel_sdvo->sdvo_lvds_fixed_mode); |
2004 | intel_sdvo->sdvo_lvds_fixed_mode); |
2005 | 2005 | ||
2006 | // i2c_del_adapter(&intel_sdvo->ddc); |
2006 | // i2c_del_adapter(&intel_sdvo->ddc); |
2007 | intel_encoder_destroy(encoder); |
2007 | intel_encoder_destroy(encoder); |
2008 | } |
2008 | } |
2009 | 2009 | ||
2010 | static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { |
2010 | static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { |
2011 | .destroy = intel_sdvo_enc_destroy, |
2011 | .destroy = intel_sdvo_enc_destroy, |
2012 | }; |
2012 | }; |
2013 | 2013 | ||
2014 | static void |
2014 | static void |
2015 | intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) |
2015 | intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) |
2016 | { |
2016 | { |
2017 | uint16_t mask = 0; |
2017 | uint16_t mask = 0; |
2018 | unsigned int num_bits; |
2018 | unsigned int num_bits; |
2019 | 2019 | ||
2020 | /* Make a mask of outputs less than or equal to our own priority in the |
2020 | /* Make a mask of outputs less than or equal to our own priority in the |
2021 | * list. |
2021 | * list. |
2022 | */ |
2022 | */ |
2023 | switch (sdvo->controlled_output) { |
2023 | switch (sdvo->controlled_output) { |
2024 | case SDVO_OUTPUT_LVDS1: |
2024 | case SDVO_OUTPUT_LVDS1: |
2025 | mask |= SDVO_OUTPUT_LVDS1; |
2025 | mask |= SDVO_OUTPUT_LVDS1; |
2026 | case SDVO_OUTPUT_LVDS0: |
2026 | case SDVO_OUTPUT_LVDS0: |
2027 | mask |= SDVO_OUTPUT_LVDS0; |
2027 | mask |= SDVO_OUTPUT_LVDS0; |
2028 | case SDVO_OUTPUT_TMDS1: |
2028 | case SDVO_OUTPUT_TMDS1: |
2029 | mask |= SDVO_OUTPUT_TMDS1; |
2029 | mask |= SDVO_OUTPUT_TMDS1; |
2030 | case SDVO_OUTPUT_TMDS0: |
2030 | case SDVO_OUTPUT_TMDS0: |
2031 | mask |= SDVO_OUTPUT_TMDS0; |
2031 | mask |= SDVO_OUTPUT_TMDS0; |
2032 | case SDVO_OUTPUT_RGB1: |
2032 | case SDVO_OUTPUT_RGB1: |
2033 | mask |= SDVO_OUTPUT_RGB1; |
2033 | mask |= SDVO_OUTPUT_RGB1; |
2034 | case SDVO_OUTPUT_RGB0: |
2034 | case SDVO_OUTPUT_RGB0: |
2035 | mask |= SDVO_OUTPUT_RGB0; |
2035 | mask |= SDVO_OUTPUT_RGB0; |
2036 | break; |
2036 | break; |
2037 | } |
2037 | } |
2038 | 2038 | ||
2039 | /* Count bits to find what number we are in the priority list. */ |
2039 | /* Count bits to find what number we are in the priority list. */ |
2040 | mask &= sdvo->caps.output_flags; |
2040 | mask &= sdvo->caps.output_flags; |
2041 | num_bits = hweight16(mask); |
2041 | num_bits = hweight16(mask); |
2042 | /* If more than 3 outputs, default to DDC bus 3 for now. */ |
2042 | /* If more than 3 outputs, default to DDC bus 3 for now. */ |
2043 | if (num_bits > 3) |
2043 | if (num_bits > 3) |
2044 | num_bits = 3; |
2044 | num_bits = 3; |
2045 | 2045 | ||
2046 | /* Corresponds to SDVO_CONTROL_BUS_DDCx */ |
2046 | /* Corresponds to SDVO_CONTROL_BUS_DDCx */ |
2047 | sdvo->ddc_bus = 1 << num_bits; |
2047 | sdvo->ddc_bus = 1 << num_bits; |
2048 | } |
2048 | } |
2049 | 2049 | ||
2050 | /** |
2050 | /** |
2051 | * Choose the appropriate DDC bus for control bus switch command for this |
2051 | * Choose the appropriate DDC bus for control bus switch command for this |
2052 | * SDVO output based on the controlled output. |
2052 | * SDVO output based on the controlled output. |
2053 | * |
2053 | * |
2054 | * DDC bus number assignment is in a priority order of RGB outputs, then TMDS |
2054 | * DDC bus number assignment is in a priority order of RGB outputs, then TMDS |
2055 | * outputs, then LVDS outputs. |
2055 | * outputs, then LVDS outputs. |
2056 | */ |
2056 | */ |
2057 | static void |
2057 | static void |
2058 | intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, |
2058 | intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, |
2059 | struct intel_sdvo *sdvo, u32 reg) |
2059 | struct intel_sdvo *sdvo, u32 reg) |
2060 | { |
2060 | { |
2061 | struct sdvo_device_mapping *mapping; |
2061 | struct sdvo_device_mapping *mapping; |
2062 | 2062 | ||
2063 | if (sdvo->is_sdvob) |
2063 | if (sdvo->is_sdvob) |
2064 | mapping = &(dev_priv->sdvo_mappings[0]); |
2064 | mapping = &(dev_priv->sdvo_mappings[0]); |
2065 | else |
2065 | else |
2066 | mapping = &(dev_priv->sdvo_mappings[1]); |
2066 | mapping = &(dev_priv->sdvo_mappings[1]); |
2067 | 2067 | ||
2068 | if (mapping->initialized) |
2068 | if (mapping->initialized) |
2069 | sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); |
2069 | sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); |
2070 | else |
2070 | else |
2071 | intel_sdvo_guess_ddc_bus(sdvo); |
2071 | intel_sdvo_guess_ddc_bus(sdvo); |
2072 | } |
2072 | } |
2073 | 2073 | ||
2074 | static void |
2074 | static void |
2075 | intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, |
2075 | intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, |
2076 | struct intel_sdvo *sdvo, u32 reg) |
2076 | struct intel_sdvo *sdvo, u32 reg) |
2077 | { |
2077 | { |
2078 | struct sdvo_device_mapping *mapping; |
2078 | struct sdvo_device_mapping *mapping; |
2079 | u8 pin; |
2079 | u8 pin; |
2080 | 2080 | ||
2081 | if (sdvo->is_sdvob) |
2081 | if (sdvo->is_sdvob) |
2082 | mapping = &dev_priv->sdvo_mappings[0]; |
2082 | mapping = &dev_priv->sdvo_mappings[0]; |
2083 | else |
2083 | else |
2084 | mapping = &dev_priv->sdvo_mappings[1]; |
2084 | mapping = &dev_priv->sdvo_mappings[1]; |
2085 | 2085 | ||
2086 | pin = GMBUS_PORT_DPB; |
2086 | pin = GMBUS_PORT_DPB; |
2087 | if (mapping->initialized) |
2087 | if (mapping->initialized) |
2088 | pin = mapping->i2c_pin; |
2088 | pin = mapping->i2c_pin; |
2089 | 2089 | ||
2090 | if (intel_gmbus_is_port_valid(pin)) { |
2090 | if (intel_gmbus_is_port_valid(pin)) { |
2091 | sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); |
2091 | sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); |
2092 | intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ); |
2092 | intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ); |
2093 | intel_gmbus_force_bit(sdvo->i2c, true); |
2093 | intel_gmbus_force_bit(sdvo->i2c, true); |
2094 | } else { |
2094 | } else { |
2095 | sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB); |
2095 | sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB); |
2096 | } |
2096 | } |
2097 | } |
2097 | } |
2098 | 2098 | ||
2099 | static bool |
2099 | static bool |
2100 | intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) |
2100 | intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) |
2101 | { |
2101 | { |
2102 | return intel_sdvo_check_supp_encode(intel_sdvo); |
2102 | return intel_sdvo_check_supp_encode(intel_sdvo); |
2103 | } |
2103 | } |
2104 | 2104 | ||
2105 | static u8 |
2105 | static u8 |
2106 | intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo) |
2106 | intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo) |
2107 | { |
2107 | { |
2108 | struct drm_i915_private *dev_priv = dev->dev_private; |
2108 | struct drm_i915_private *dev_priv = dev->dev_private; |
2109 | struct sdvo_device_mapping *my_mapping, *other_mapping; |
2109 | struct sdvo_device_mapping *my_mapping, *other_mapping; |
2110 | 2110 | ||
2111 | if (sdvo->is_sdvob) { |
2111 | if (sdvo->is_sdvob) { |
2112 | my_mapping = &dev_priv->sdvo_mappings[0]; |
2112 | my_mapping = &dev_priv->sdvo_mappings[0]; |
2113 | other_mapping = &dev_priv->sdvo_mappings[1]; |
2113 | other_mapping = &dev_priv->sdvo_mappings[1]; |
2114 | } else { |
2114 | } else { |
2115 | my_mapping = &dev_priv->sdvo_mappings[1]; |
2115 | my_mapping = &dev_priv->sdvo_mappings[1]; |
2116 | other_mapping = &dev_priv->sdvo_mappings[0]; |
2116 | other_mapping = &dev_priv->sdvo_mappings[0]; |
2117 | } |
2117 | } |
2118 | 2118 | ||
2119 | /* If the BIOS described our SDVO device, take advantage of it. */ |
2119 | /* If the BIOS described our SDVO device, take advantage of it. */ |
2120 | if (my_mapping->slave_addr) |
2120 | if (my_mapping->slave_addr) |
2121 | return my_mapping->slave_addr; |
2121 | return my_mapping->slave_addr; |
2122 | 2122 | ||
2123 | /* If the BIOS only described a different SDVO device, use the |
2123 | /* If the BIOS only described a different SDVO device, use the |
2124 | * address that it isn't using. |
2124 | * address that it isn't using. |
2125 | */ |
2125 | */ |
2126 | if (other_mapping->slave_addr) { |
2126 | if (other_mapping->slave_addr) { |
2127 | if (other_mapping->slave_addr == 0x70) |
2127 | if (other_mapping->slave_addr == 0x70) |
2128 | return 0x72; |
2128 | return 0x72; |
2129 | else |
2129 | else |
2130 | return 0x70; |
2130 | return 0x70; |
2131 | } |
2131 | } |
2132 | 2132 | ||
2133 | /* No SDVO device info is found for another DVO port, |
2133 | /* No SDVO device info is found for another DVO port, |
2134 | * so use mapping assumption we had before BIOS parsing. |
2134 | * so use mapping assumption we had before BIOS parsing. |
2135 | */ |
2135 | */ |
2136 | if (sdvo->is_sdvob) |
2136 | if (sdvo->is_sdvob) |
2137 | return 0x70; |
2137 | return 0x70; |
2138 | else |
2138 | else |
2139 | return 0x72; |
2139 | return 0x72; |
2140 | } |
2140 | } |
2141 | 2141 | ||
2142 | static void |
2142 | static void |
2143 | intel_sdvo_connector_init(struct intel_sdvo_connector *connector, |
2143 | intel_sdvo_connector_init(struct intel_sdvo_connector *connector, |
2144 | struct intel_sdvo *encoder) |
2144 | struct intel_sdvo *encoder) |
2145 | { |
2145 | { |
2146 | drm_connector_init(encoder->base.base.dev, |
2146 | drm_connector_init(encoder->base.base.dev, |
2147 | &connector->base.base, |
2147 | &connector->base.base, |
2148 | &intel_sdvo_connector_funcs, |
2148 | &intel_sdvo_connector_funcs, |
2149 | connector->base.base.connector_type); |
2149 | connector->base.base.connector_type); |
2150 | 2150 | ||
2151 | drm_connector_helper_add(&connector->base.base, |
2151 | drm_connector_helper_add(&connector->base.base, |
2152 | &intel_sdvo_connector_helper_funcs); |
2152 | &intel_sdvo_connector_helper_funcs); |
2153 | 2153 | ||
2154 | connector->base.base.interlace_allowed = 1; |
2154 | connector->base.base.interlace_allowed = 1; |
2155 | connector->base.base.doublescan_allowed = 0; |
2155 | connector->base.base.doublescan_allowed = 0; |
2156 | connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; |
2156 | connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; |
2157 | connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; |
2157 | connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; |
2158 | 2158 | ||
2159 | intel_connector_attach_encoder(&connector->base, &encoder->base); |
2159 | intel_connector_attach_encoder(&connector->base, &encoder->base); |
2160 | drm_sysfs_connector_add(&connector->base.base); |
2160 | drm_sysfs_connector_add(&connector->base.base); |
2161 | } |
2161 | } |
2162 | 2162 | ||
2163 | static void |
2163 | static void |
2164 | intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector) |
2164 | intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector) |
2165 | { |
2165 | { |
2166 | struct drm_device *dev = connector->base.base.dev; |
2166 | struct drm_device *dev = connector->base.base.dev; |
2167 | 2167 | ||
2168 | intel_attach_force_audio_property(&connector->base.base); |
2168 | intel_attach_force_audio_property(&connector->base.base); |
2169 | if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) |
2169 | if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) |
2170 | intel_attach_broadcast_rgb_property(&connector->base.base); |
2170 | intel_attach_broadcast_rgb_property(&connector->base.base); |
2171 | } |
2171 | } |
2172 | 2172 | ||
2173 | static bool |
2173 | static bool |
2174 | intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) |
2174 | intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) |
2175 | { |
2175 | { |
2176 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2176 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2177 | struct drm_connector *connector; |
2177 | struct drm_connector *connector; |
2178 | struct intel_encoder *intel_encoder = to_intel_encoder(encoder); |
2178 | struct intel_encoder *intel_encoder = to_intel_encoder(encoder); |
2179 | struct intel_connector *intel_connector; |
2179 | struct intel_connector *intel_connector; |
2180 | struct intel_sdvo_connector *intel_sdvo_connector; |
2180 | struct intel_sdvo_connector *intel_sdvo_connector; |
2181 | 2181 | ||
2182 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2182 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2183 | if (!intel_sdvo_connector) |
2183 | if (!intel_sdvo_connector) |
2184 | return false; |
2184 | return false; |
2185 | 2185 | ||
2186 | if (device == 0) { |
2186 | if (device == 0) { |
2187 | intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; |
2187 | intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; |
2188 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; |
2188 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; |
2189 | } else if (device == 1) { |
2189 | } else if (device == 1) { |
2190 | intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; |
2190 | intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; |
2191 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; |
2191 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; |
2192 | } |
2192 | } |
2193 | 2193 | ||
2194 | intel_connector = &intel_sdvo_connector->base; |
2194 | intel_connector = &intel_sdvo_connector->base; |
2195 | connector = &intel_connector->base; |
2195 | connector = &intel_connector->base; |
2196 | if (intel_sdvo_get_hotplug_support(intel_sdvo) & |
2196 | if (intel_sdvo_get_hotplug_support(intel_sdvo) & |
2197 | intel_sdvo_connector->output_flag) { |
2197 | intel_sdvo_connector->output_flag) { |
2198 | connector->polled = DRM_CONNECTOR_POLL_HPD; |
2198 | connector->polled = DRM_CONNECTOR_POLL_HPD; |
2199 | intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag; |
2199 | intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag; |
2200 | /* Some SDVO devices have one-shot hotplug interrupts. |
2200 | /* Some SDVO devices have one-shot hotplug interrupts. |
2201 | * Ensure that they get re-enabled when an interrupt happens. |
2201 | * Ensure that they get re-enabled when an interrupt happens. |
2202 | */ |
2202 | */ |
2203 | intel_encoder->hot_plug = intel_sdvo_enable_hotplug; |
2203 | intel_encoder->hot_plug = intel_sdvo_enable_hotplug; |
2204 | intel_sdvo_enable_hotplug(intel_encoder); |
2204 | intel_sdvo_enable_hotplug(intel_encoder); |
2205 | } else { |
2205 | } else { |
2206 | connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; |
2206 | connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; |
2207 | } |
2207 | } |
2208 | encoder->encoder_type = DRM_MODE_ENCODER_TMDS; |
2208 | encoder->encoder_type = DRM_MODE_ENCODER_TMDS; |
2209 | connector->connector_type = DRM_MODE_CONNECTOR_DVID; |
2209 | connector->connector_type = DRM_MODE_CONNECTOR_DVID; |
2210 | 2210 | ||
2211 | if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { |
2211 | if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { |
2212 | connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; |
2212 | connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; |
2213 | intel_sdvo->is_hdmi = true; |
2213 | intel_sdvo->is_hdmi = true; |
2214 | } |
2214 | } |
2215 | intel_sdvo->base.cloneable = true; |
- | |
2216 | 2215 | ||
2217 | intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); |
2216 | intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); |
2218 | if (intel_sdvo->is_hdmi) |
2217 | if (intel_sdvo->is_hdmi) |
2219 | intel_sdvo_add_hdmi_properties(intel_sdvo_connector); |
2218 | intel_sdvo_add_hdmi_properties(intel_sdvo_connector); |
2220 | 2219 | ||
2221 | return true; |
2220 | return true; |
2222 | } |
2221 | } |
2223 | 2222 | ||
2224 | static bool |
2223 | static bool |
2225 | intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) |
2224 | intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) |
2226 | { |
2225 | { |
2227 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2226 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2228 | struct drm_connector *connector; |
2227 | struct drm_connector *connector; |
2229 | struct intel_connector *intel_connector; |
2228 | struct intel_connector *intel_connector; |
2230 | struct intel_sdvo_connector *intel_sdvo_connector; |
2229 | struct intel_sdvo_connector *intel_sdvo_connector; |
2231 | 2230 | ||
2232 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2231 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2233 | if (!intel_sdvo_connector) |
2232 | if (!intel_sdvo_connector) |
2234 | return false; |
2233 | return false; |
2235 | 2234 | ||
2236 | intel_connector = &intel_sdvo_connector->base; |
2235 | intel_connector = &intel_sdvo_connector->base; |
2237 | connector = &intel_connector->base; |
2236 | connector = &intel_connector->base; |
2238 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; |
2237 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; |
2239 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; |
2238 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; |
2240 | 2239 | ||
2241 | intel_sdvo->controlled_output |= type; |
2240 | intel_sdvo->controlled_output |= type; |
2242 | intel_sdvo_connector->output_flag = type; |
2241 | intel_sdvo_connector->output_flag = type; |
2243 | 2242 | ||
2244 | intel_sdvo->is_tv = true; |
2243 | intel_sdvo->is_tv = true; |
2245 | intel_sdvo->base.needs_tv_clock = true; |
2244 | intel_sdvo->base.needs_tv_clock = true; |
2246 | intel_sdvo->base.cloneable = false; |
- | |
2247 | 2245 | ||
2248 | intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); |
2246 | intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); |
2249 | 2247 | ||
2250 | if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) |
2248 | if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) |
2251 | goto err; |
2249 | goto err; |
2252 | 2250 | ||
2253 | if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) |
2251 | if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) |
2254 | goto err; |
2252 | goto err; |
2255 | 2253 | ||
2256 | return true; |
2254 | return true; |
2257 | 2255 | ||
2258 | err: |
2256 | err: |
2259 | intel_sdvo_destroy(connector); |
2257 | intel_sdvo_destroy(connector); |
2260 | return false; |
2258 | return false; |
2261 | } |
2259 | } |
2262 | 2260 | ||
2263 | static bool |
2261 | static bool |
2264 | intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) |
2262 | intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) |
2265 | { |
2263 | { |
2266 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2264 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2267 | struct drm_connector *connector; |
2265 | struct drm_connector *connector; |
2268 | struct intel_connector *intel_connector; |
2266 | struct intel_connector *intel_connector; |
2269 | struct intel_sdvo_connector *intel_sdvo_connector; |
2267 | struct intel_sdvo_connector *intel_sdvo_connector; |
2270 | 2268 | ||
2271 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2269 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2272 | if (!intel_sdvo_connector) |
2270 | if (!intel_sdvo_connector) |
2273 | return false; |
2271 | return false; |
2274 | 2272 | ||
2275 | intel_connector = &intel_sdvo_connector->base; |
2273 | intel_connector = &intel_sdvo_connector->base; |
2276 | connector = &intel_connector->base; |
2274 | connector = &intel_connector->base; |
2277 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
2275 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
2278 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; |
2276 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; |
2279 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; |
2277 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; |
2280 | 2278 | ||
2281 | if (device == 0) { |
2279 | if (device == 0) { |
2282 | intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; |
2280 | intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; |
2283 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; |
2281 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; |
2284 | } else if (device == 1) { |
2282 | } else if (device == 1) { |
2285 | intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; |
2283 | intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; |
2286 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; |
2284 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; |
2287 | } |
2285 | } |
2288 | - | ||
2289 | intel_sdvo->base.cloneable = true; |
- | |
2290 | 2286 | ||
2291 | intel_sdvo_connector_init(intel_sdvo_connector, |
2287 | intel_sdvo_connector_init(intel_sdvo_connector, |
2292 | intel_sdvo); |
2288 | intel_sdvo); |
2293 | return true; |
2289 | return true; |
2294 | } |
2290 | } |
2295 | 2291 | ||
2296 | static bool |
2292 | static bool |
2297 | intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) |
2293 | intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) |
2298 | { |
2294 | { |
2299 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2295 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2300 | struct drm_connector *connector; |
2296 | struct drm_connector *connector; |
2301 | struct intel_connector *intel_connector; |
2297 | struct intel_connector *intel_connector; |
2302 | struct intel_sdvo_connector *intel_sdvo_connector; |
2298 | struct intel_sdvo_connector *intel_sdvo_connector; |
2303 | 2299 | ||
2304 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2300 | intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); |
2305 | if (!intel_sdvo_connector) |
2301 | if (!intel_sdvo_connector) |
2306 | return false; |
2302 | return false; |
2307 | 2303 | ||
2308 | intel_connector = &intel_sdvo_connector->base; |
2304 | intel_connector = &intel_sdvo_connector->base; |
2309 | connector = &intel_connector->base; |
2305 | connector = &intel_connector->base; |
2310 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; |
2306 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; |
2311 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; |
2307 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; |
2312 | 2308 | ||
2313 | if (device == 0) { |
2309 | if (device == 0) { |
2314 | intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; |
2310 | intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; |
2315 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; |
2311 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; |
2316 | } else if (device == 1) { |
2312 | } else if (device == 1) { |
2317 | intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; |
2313 | intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; |
2318 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; |
2314 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; |
2319 | } |
2315 | } |
2320 | - | ||
2321 | /* SDVO LVDS is not cloneable because the input mode gets adjusted by the encoder */ |
- | |
2322 | intel_sdvo->base.cloneable = false; |
- | |
2323 | 2316 | ||
2324 | intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); |
2317 | intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); |
2325 | if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) |
2318 | if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) |
2326 | goto err; |
2319 | goto err; |
2327 | 2320 | ||
2328 | return true; |
2321 | return true; |
2329 | 2322 | ||
2330 | err: |
2323 | err: |
2331 | intel_sdvo_destroy(connector); |
2324 | intel_sdvo_destroy(connector); |
2332 | return false; |
2325 | return false; |
2333 | } |
2326 | } |
2334 | 2327 | ||
2335 | static bool |
2328 | static bool |
2336 | intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) |
2329 | intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) |
2337 | { |
2330 | { |
2338 | intel_sdvo->is_tv = false; |
2331 | intel_sdvo->is_tv = false; |
2339 | intel_sdvo->base.needs_tv_clock = false; |
2332 | intel_sdvo->base.needs_tv_clock = false; |
2340 | intel_sdvo->is_lvds = false; |
2333 | intel_sdvo->is_lvds = false; |
2341 | 2334 | ||
2342 | /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ |
2335 | /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ |
2343 | 2336 | ||
2344 | if (flags & SDVO_OUTPUT_TMDS0) |
2337 | if (flags & SDVO_OUTPUT_TMDS0) |
2345 | if (!intel_sdvo_dvi_init(intel_sdvo, 0)) |
2338 | if (!intel_sdvo_dvi_init(intel_sdvo, 0)) |
2346 | return false; |
2339 | return false; |
2347 | 2340 | ||
2348 | if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) |
2341 | if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) |
2349 | if (!intel_sdvo_dvi_init(intel_sdvo, 1)) |
2342 | if (!intel_sdvo_dvi_init(intel_sdvo, 1)) |
2350 | return false; |
2343 | return false; |
2351 | 2344 | ||
2352 | /* TV has no XXX1 function block */ |
2345 | /* TV has no XXX1 function block */ |
2353 | if (flags & SDVO_OUTPUT_SVID0) |
2346 | if (flags & SDVO_OUTPUT_SVID0) |
2354 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) |
2347 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) |
2355 | return false; |
2348 | return false; |
2356 | 2349 | ||
2357 | if (flags & SDVO_OUTPUT_CVBS0) |
2350 | if (flags & SDVO_OUTPUT_CVBS0) |
2358 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) |
2351 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) |
2359 | return false; |
2352 | return false; |
2360 | 2353 | ||
2361 | if (flags & SDVO_OUTPUT_YPRPB0) |
2354 | if (flags & SDVO_OUTPUT_YPRPB0) |
2362 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) |
2355 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) |
2363 | return false; |
2356 | return false; |
2364 | 2357 | ||
2365 | if (flags & SDVO_OUTPUT_RGB0) |
2358 | if (flags & SDVO_OUTPUT_RGB0) |
2366 | if (!intel_sdvo_analog_init(intel_sdvo, 0)) |
2359 | if (!intel_sdvo_analog_init(intel_sdvo, 0)) |
2367 | return false; |
2360 | return false; |
2368 | 2361 | ||
2369 | if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) |
2362 | if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) |
2370 | if (!intel_sdvo_analog_init(intel_sdvo, 1)) |
2363 | if (!intel_sdvo_analog_init(intel_sdvo, 1)) |
2371 | return false; |
2364 | return false; |
2372 | 2365 | ||
2373 | if (flags & SDVO_OUTPUT_LVDS0) |
2366 | if (flags & SDVO_OUTPUT_LVDS0) |
2374 | if (!intel_sdvo_lvds_init(intel_sdvo, 0)) |
2367 | if (!intel_sdvo_lvds_init(intel_sdvo, 0)) |
2375 | return false; |
2368 | return false; |
2376 | 2369 | ||
2377 | if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) |
2370 | if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) |
2378 | if (!intel_sdvo_lvds_init(intel_sdvo, 1)) |
2371 | if (!intel_sdvo_lvds_init(intel_sdvo, 1)) |
2379 | return false; |
2372 | return false; |
2380 | 2373 | ||
2381 | if ((flags & SDVO_OUTPUT_MASK) == 0) { |
2374 | if ((flags & SDVO_OUTPUT_MASK) == 0) { |
2382 | unsigned char bytes[2]; |
2375 | unsigned char bytes[2]; |
2383 | 2376 | ||
2384 | intel_sdvo->controlled_output = 0; |
2377 | intel_sdvo->controlled_output = 0; |
2385 | memcpy(bytes, &intel_sdvo->caps.output_flags, 2); |
2378 | memcpy(bytes, &intel_sdvo->caps.output_flags, 2); |
2386 | DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", |
2379 | DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", |
2387 | SDVO_NAME(intel_sdvo), |
2380 | SDVO_NAME(intel_sdvo), |
2388 | bytes[0], bytes[1]); |
2381 | bytes[0], bytes[1]); |
2389 | return false; |
2382 | return false; |
2390 | } |
2383 | } |
2391 | intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
2384 | intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
2392 | 2385 | ||
2393 | return true; |
2386 | return true; |
2394 | } |
2387 | } |
- | 2388 | ||
- | 2389 | static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) |
|
- | 2390 | { |
|
- | 2391 | struct drm_device *dev = intel_sdvo->base.base.dev; |
|
- | 2392 | struct drm_connector *connector, *tmp; |
|
- | 2393 | ||
- | 2394 | list_for_each_entry_safe(connector, tmp, |
|
- | 2395 | &dev->mode_config.connector_list, head) { |
|
- | 2396 | if (intel_attached_encoder(connector) == &intel_sdvo->base) |
|
- | 2397 | intel_sdvo_destroy(connector); |
|
- | 2398 | } |
|
- | 2399 | } |
|
2395 | 2400 | ||
2396 | static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, |
2401 | static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, |
2397 | struct intel_sdvo_connector *intel_sdvo_connector, |
2402 | struct intel_sdvo_connector *intel_sdvo_connector, |
2398 | int type) |
2403 | int type) |
2399 | { |
2404 | { |
2400 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2405 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2401 | struct intel_sdvo_tv_format format; |
2406 | struct intel_sdvo_tv_format format; |
2402 | uint32_t format_map, i; |
2407 | uint32_t format_map, i; |
2403 | 2408 | ||
2404 | if (!intel_sdvo_set_target_output(intel_sdvo, type)) |
2409 | if (!intel_sdvo_set_target_output(intel_sdvo, type)) |
2405 | return false; |
2410 | return false; |
2406 | 2411 | ||
2407 | BUILD_BUG_ON(sizeof(format) != 6); |
2412 | BUILD_BUG_ON(sizeof(format) != 6); |
2408 | if (!intel_sdvo_get_value(intel_sdvo, |
2413 | if (!intel_sdvo_get_value(intel_sdvo, |
2409 | SDVO_CMD_GET_SUPPORTED_TV_FORMATS, |
2414 | SDVO_CMD_GET_SUPPORTED_TV_FORMATS, |
2410 | &format, sizeof(format))) |
2415 | &format, sizeof(format))) |
2411 | return false; |
2416 | return false; |
2412 | 2417 | ||
2413 | memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); |
2418 | memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); |
2414 | 2419 | ||
2415 | if (format_map == 0) |
2420 | if (format_map == 0) |
2416 | return false; |
2421 | return false; |
2417 | 2422 | ||
2418 | intel_sdvo_connector->format_supported_num = 0; |
2423 | intel_sdvo_connector->format_supported_num = 0; |
2419 | for (i = 0 ; i < TV_FORMAT_NUM; i++) |
2424 | for (i = 0 ; i < TV_FORMAT_NUM; i++) |
2420 | if (format_map & (1 << i)) |
2425 | if (format_map & (1 << i)) |
2421 | intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; |
2426 | intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; |
2422 | 2427 | ||
2423 | 2428 | ||
2424 | intel_sdvo_connector->tv_format = |
2429 | intel_sdvo_connector->tv_format = |
2425 | drm_property_create(dev, DRM_MODE_PROP_ENUM, |
2430 | drm_property_create(dev, DRM_MODE_PROP_ENUM, |
2426 | "mode", intel_sdvo_connector->format_supported_num); |
2431 | "mode", intel_sdvo_connector->format_supported_num); |
2427 | if (!intel_sdvo_connector->tv_format) |
2432 | if (!intel_sdvo_connector->tv_format) |
2428 | return false; |
2433 | return false; |
2429 | 2434 | ||
2430 | for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) |
2435 | for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) |
2431 | drm_property_add_enum( |
2436 | drm_property_add_enum( |
2432 | intel_sdvo_connector->tv_format, i, |
2437 | intel_sdvo_connector->tv_format, i, |
2433 | i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); |
2438 | i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); |
2434 | 2439 | ||
2435 | intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0]; |
2440 | intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0]; |
2436 | drm_connector_attach_property(&intel_sdvo_connector->base.base, |
2441 | drm_connector_attach_property(&intel_sdvo_connector->base.base, |
2437 | intel_sdvo_connector->tv_format, 0); |
2442 | intel_sdvo_connector->tv_format, 0); |
2438 | return true; |
2443 | return true; |
2439 | 2444 | ||
2440 | } |
2445 | } |
2441 | 2446 | ||
2442 | #define ENHANCEMENT(name, NAME) do { \ |
2447 | #define ENHANCEMENT(name, NAME) do { \ |
2443 | if (enhancements.name) { \ |
2448 | if (enhancements.name) { \ |
2444 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ |
2449 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ |
2445 | !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ |
2450 | !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ |
2446 | return false; \ |
2451 | return false; \ |
2447 | intel_sdvo_connector->max_##name = data_value[0]; \ |
2452 | intel_sdvo_connector->max_##name = data_value[0]; \ |
2448 | intel_sdvo_connector->cur_##name = response; \ |
2453 | intel_sdvo_connector->cur_##name = response; \ |
2449 | intel_sdvo_connector->name = \ |
2454 | intel_sdvo_connector->name = \ |
2450 | drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ |
2455 | drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ |
2451 | if (!intel_sdvo_connector->name) return false; \ |
2456 | if (!intel_sdvo_connector->name) return false; \ |
2452 | drm_connector_attach_property(connector, \ |
2457 | drm_connector_attach_property(connector, \ |
2453 | intel_sdvo_connector->name, \ |
2458 | intel_sdvo_connector->name, \ |
2454 | intel_sdvo_connector->cur_##name); \ |
2459 | intel_sdvo_connector->cur_##name); \ |
2455 | DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ |
2460 | DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ |
2456 | data_value[0], data_value[1], response); \ |
2461 | data_value[0], data_value[1], response); \ |
2457 | } \ |
2462 | } \ |
2458 | } while (0) |
2463 | } while (0) |
2459 | 2464 | ||
2460 | static bool |
2465 | static bool |
2461 | intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, |
2466 | intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, |
2462 | struct intel_sdvo_connector *intel_sdvo_connector, |
2467 | struct intel_sdvo_connector *intel_sdvo_connector, |
2463 | struct intel_sdvo_enhancements_reply enhancements) |
2468 | struct intel_sdvo_enhancements_reply enhancements) |
2464 | { |
2469 | { |
2465 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2470 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2466 | struct drm_connector *connector = &intel_sdvo_connector->base.base; |
2471 | struct drm_connector *connector = &intel_sdvo_connector->base.base; |
2467 | uint16_t response, data_value[2]; |
2472 | uint16_t response, data_value[2]; |
2468 | 2473 | ||
2469 | /* when horizontal overscan is supported, Add the left/right property */ |
2474 | /* when horizontal overscan is supported, Add the left/right property */ |
2470 | if (enhancements.overscan_h) { |
2475 | if (enhancements.overscan_h) { |
2471 | if (!intel_sdvo_get_value(intel_sdvo, |
2476 | if (!intel_sdvo_get_value(intel_sdvo, |
2472 | SDVO_CMD_GET_MAX_OVERSCAN_H, |
2477 | SDVO_CMD_GET_MAX_OVERSCAN_H, |
2473 | &data_value, 4)) |
2478 | &data_value, 4)) |
2474 | return false; |
2479 | return false; |
2475 | 2480 | ||
2476 | if (!intel_sdvo_get_value(intel_sdvo, |
2481 | if (!intel_sdvo_get_value(intel_sdvo, |
2477 | SDVO_CMD_GET_OVERSCAN_H, |
2482 | SDVO_CMD_GET_OVERSCAN_H, |
2478 | &response, 2)) |
2483 | &response, 2)) |
2479 | return false; |
2484 | return false; |
2480 | 2485 | ||
2481 | intel_sdvo_connector->max_hscan = data_value[0]; |
2486 | intel_sdvo_connector->max_hscan = data_value[0]; |
2482 | intel_sdvo_connector->left_margin = data_value[0] - response; |
2487 | intel_sdvo_connector->left_margin = data_value[0] - response; |
2483 | intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin; |
2488 | intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin; |
2484 | intel_sdvo_connector->left = |
2489 | intel_sdvo_connector->left = |
2485 | drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); |
2490 | drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); |
2486 | if (!intel_sdvo_connector->left) |
2491 | if (!intel_sdvo_connector->left) |
2487 | return false; |
2492 | return false; |
2488 | 2493 | ||
2489 | drm_connector_attach_property(connector, |
2494 | drm_connector_attach_property(connector, |
2490 | intel_sdvo_connector->left, |
2495 | intel_sdvo_connector->left, |
2491 | intel_sdvo_connector->left_margin); |
2496 | intel_sdvo_connector->left_margin); |
2492 | 2497 | ||
2493 | intel_sdvo_connector->right = |
2498 | intel_sdvo_connector->right = |
2494 | drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); |
2499 | drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); |
2495 | if (!intel_sdvo_connector->right) |
2500 | if (!intel_sdvo_connector->right) |
2496 | return false; |
2501 | return false; |
2497 | 2502 | ||
2498 | drm_connector_attach_property(connector, |
2503 | drm_connector_attach_property(connector, |
2499 | intel_sdvo_connector->right, |
2504 | intel_sdvo_connector->right, |
2500 | intel_sdvo_connector->right_margin); |
2505 | intel_sdvo_connector->right_margin); |
2501 | DRM_DEBUG_KMS("h_overscan: max %d, " |
2506 | DRM_DEBUG_KMS("h_overscan: max %d, " |
2502 | "default %d, current %d\n", |
2507 | "default %d, current %d\n", |
2503 | data_value[0], data_value[1], response); |
2508 | data_value[0], data_value[1], response); |
2504 | } |
2509 | } |
2505 | 2510 | ||
2506 | if (enhancements.overscan_v) { |
2511 | if (enhancements.overscan_v) { |
2507 | if (!intel_sdvo_get_value(intel_sdvo, |
2512 | if (!intel_sdvo_get_value(intel_sdvo, |
2508 | SDVO_CMD_GET_MAX_OVERSCAN_V, |
2513 | SDVO_CMD_GET_MAX_OVERSCAN_V, |
2509 | &data_value, 4)) |
2514 | &data_value, 4)) |
2510 | return false; |
2515 | return false; |
2511 | 2516 | ||
2512 | if (!intel_sdvo_get_value(intel_sdvo, |
2517 | if (!intel_sdvo_get_value(intel_sdvo, |
2513 | SDVO_CMD_GET_OVERSCAN_V, |
2518 | SDVO_CMD_GET_OVERSCAN_V, |
2514 | &response, 2)) |
2519 | &response, 2)) |
2515 | return false; |
2520 | return false; |
2516 | 2521 | ||
2517 | intel_sdvo_connector->max_vscan = data_value[0]; |
2522 | intel_sdvo_connector->max_vscan = data_value[0]; |
2518 | intel_sdvo_connector->top_margin = data_value[0] - response; |
2523 | intel_sdvo_connector->top_margin = data_value[0] - response; |
2519 | intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin; |
2524 | intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin; |
2520 | intel_sdvo_connector->top = |
2525 | intel_sdvo_connector->top = |
2521 | drm_property_create_range(dev, 0, |
2526 | drm_property_create_range(dev, 0, |
2522 | "top_margin", 0, data_value[0]); |
2527 | "top_margin", 0, data_value[0]); |
2523 | if (!intel_sdvo_connector->top) |
2528 | if (!intel_sdvo_connector->top) |
2524 | return false; |
2529 | return false; |
2525 | 2530 | ||
2526 | drm_connector_attach_property(connector, |
2531 | drm_connector_attach_property(connector, |
2527 | intel_sdvo_connector->top, |
2532 | intel_sdvo_connector->top, |
2528 | intel_sdvo_connector->top_margin); |
2533 | intel_sdvo_connector->top_margin); |
2529 | 2534 | ||
2530 | intel_sdvo_connector->bottom = |
2535 | intel_sdvo_connector->bottom = |
2531 | drm_property_create_range(dev, 0, |
2536 | drm_property_create_range(dev, 0, |
2532 | "bottom_margin", 0, data_value[0]); |
2537 | "bottom_margin", 0, data_value[0]); |
2533 | if (!intel_sdvo_connector->bottom) |
2538 | if (!intel_sdvo_connector->bottom) |
2534 | return false; |
2539 | return false; |
2535 | 2540 | ||
2536 | drm_connector_attach_property(connector, |
2541 | drm_connector_attach_property(connector, |
2537 | intel_sdvo_connector->bottom, |
2542 | intel_sdvo_connector->bottom, |
2538 | intel_sdvo_connector->bottom_margin); |
2543 | intel_sdvo_connector->bottom_margin); |
2539 | DRM_DEBUG_KMS("v_overscan: max %d, " |
2544 | DRM_DEBUG_KMS("v_overscan: max %d, " |
2540 | "default %d, current %d\n", |
2545 | "default %d, current %d\n", |
2541 | data_value[0], data_value[1], response); |
2546 | data_value[0], data_value[1], response); |
2542 | } |
2547 | } |
2543 | 2548 | ||
2544 | ENHANCEMENT(hpos, HPOS); |
2549 | ENHANCEMENT(hpos, HPOS); |
2545 | ENHANCEMENT(vpos, VPOS); |
2550 | ENHANCEMENT(vpos, VPOS); |
2546 | ENHANCEMENT(saturation, SATURATION); |
2551 | ENHANCEMENT(saturation, SATURATION); |
2547 | ENHANCEMENT(contrast, CONTRAST); |
2552 | ENHANCEMENT(contrast, CONTRAST); |
2548 | ENHANCEMENT(hue, HUE); |
2553 | ENHANCEMENT(hue, HUE); |
2549 | ENHANCEMENT(sharpness, SHARPNESS); |
2554 | ENHANCEMENT(sharpness, SHARPNESS); |
2550 | ENHANCEMENT(brightness, BRIGHTNESS); |
2555 | ENHANCEMENT(brightness, BRIGHTNESS); |
2551 | ENHANCEMENT(flicker_filter, FLICKER_FILTER); |
2556 | ENHANCEMENT(flicker_filter, FLICKER_FILTER); |
2552 | ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); |
2557 | ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); |
2553 | ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); |
2558 | ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); |
2554 | ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); |
2559 | ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); |
2555 | ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); |
2560 | ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); |
2556 | 2561 | ||
2557 | if (enhancements.dot_crawl) { |
2562 | if (enhancements.dot_crawl) { |
2558 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) |
2563 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) |
2559 | return false; |
2564 | return false; |
2560 | 2565 | ||
2561 | intel_sdvo_connector->max_dot_crawl = 1; |
2566 | intel_sdvo_connector->max_dot_crawl = 1; |
2562 | intel_sdvo_connector->cur_dot_crawl = response & 0x1; |
2567 | intel_sdvo_connector->cur_dot_crawl = response & 0x1; |
2563 | intel_sdvo_connector->dot_crawl = |
2568 | intel_sdvo_connector->dot_crawl = |
2564 | drm_property_create_range(dev, 0, "dot_crawl", 0, 1); |
2569 | drm_property_create_range(dev, 0, "dot_crawl", 0, 1); |
2565 | if (!intel_sdvo_connector->dot_crawl) |
2570 | if (!intel_sdvo_connector->dot_crawl) |
2566 | return false; |
2571 | return false; |
2567 | 2572 | ||
2568 | drm_connector_attach_property(connector, |
2573 | drm_connector_attach_property(connector, |
2569 | intel_sdvo_connector->dot_crawl, |
2574 | intel_sdvo_connector->dot_crawl, |
2570 | intel_sdvo_connector->cur_dot_crawl); |
2575 | intel_sdvo_connector->cur_dot_crawl); |
2571 | DRM_DEBUG_KMS("dot crawl: current %d\n", response); |
2576 | DRM_DEBUG_KMS("dot crawl: current %d\n", response); |
2572 | } |
2577 | } |
2573 | 2578 | ||
2574 | return true; |
2579 | return true; |
2575 | } |
2580 | } |
2576 | 2581 | ||
2577 | static bool |
2582 | static bool |
2578 | intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, |
2583 | intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, |
2579 | struct intel_sdvo_connector *intel_sdvo_connector, |
2584 | struct intel_sdvo_connector *intel_sdvo_connector, |
2580 | struct intel_sdvo_enhancements_reply enhancements) |
2585 | struct intel_sdvo_enhancements_reply enhancements) |
2581 | { |
2586 | { |
2582 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2587 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2583 | struct drm_connector *connector = &intel_sdvo_connector->base.base; |
2588 | struct drm_connector *connector = &intel_sdvo_connector->base.base; |
2584 | uint16_t response, data_value[2]; |
2589 | uint16_t response, data_value[2]; |
2585 | 2590 | ||
2586 | ENHANCEMENT(brightness, BRIGHTNESS); |
2591 | ENHANCEMENT(brightness, BRIGHTNESS); |
2587 | 2592 | ||
2588 | return true; |
2593 | return true; |
2589 | } |
2594 | } |
2590 | #undef ENHANCEMENT |
2595 | #undef ENHANCEMENT |
2591 | 2596 | ||
2592 | static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, |
2597 | static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, |
2593 | struct intel_sdvo_connector *intel_sdvo_connector) |
2598 | struct intel_sdvo_connector *intel_sdvo_connector) |
2594 | { |
2599 | { |
2595 | union { |
2600 | union { |
2596 | struct intel_sdvo_enhancements_reply reply; |
2601 | struct intel_sdvo_enhancements_reply reply; |
2597 | uint16_t response; |
2602 | uint16_t response; |
2598 | } enhancements; |
2603 | } enhancements; |
2599 | 2604 | ||
2600 | BUILD_BUG_ON(sizeof(enhancements) != 2); |
2605 | BUILD_BUG_ON(sizeof(enhancements) != 2); |
2601 | 2606 | ||
2602 | enhancements.response = 0; |
2607 | enhancements.response = 0; |
2603 | intel_sdvo_get_value(intel_sdvo, |
2608 | intel_sdvo_get_value(intel_sdvo, |
2604 | SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, |
2609 | SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, |
2605 | &enhancements, sizeof(enhancements)); |
2610 | &enhancements, sizeof(enhancements)); |
2606 | if (enhancements.response == 0) { |
2611 | if (enhancements.response == 0) { |
2607 | DRM_DEBUG_KMS("No enhancement is supported\n"); |
2612 | DRM_DEBUG_KMS("No enhancement is supported\n"); |
2608 | return true; |
2613 | return true; |
2609 | } |
2614 | } |
2610 | 2615 | ||
2611 | if (IS_TV(intel_sdvo_connector)) |
2616 | if (IS_TV(intel_sdvo_connector)) |
2612 | return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); |
2617 | return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); |
2613 | else if (IS_LVDS(intel_sdvo_connector)) |
2618 | else if (IS_LVDS(intel_sdvo_connector)) |
2614 | return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); |
2619 | return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); |
2615 | else |
2620 | else |
2616 | return true; |
2621 | return true; |
2617 | } |
2622 | } |
2618 | 2623 | ||
2619 | static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, |
2624 | static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, |
2620 | struct i2c_msg *msgs, |
2625 | struct i2c_msg *msgs, |
2621 | int num) |
2626 | int num) |
2622 | { |
2627 | { |
2623 | struct intel_sdvo *sdvo = adapter->algo_data; |
2628 | struct intel_sdvo *sdvo = adapter->algo_data; |
2624 | 2629 | ||
2625 | if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) |
2630 | if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) |
2626 | return -EIO; |
2631 | return -EIO; |
2627 | 2632 | ||
2628 | return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); |
2633 | return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); |
2629 | } |
2634 | } |
2630 | 2635 | ||
2631 | static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) |
2636 | static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) |
2632 | { |
2637 | { |
2633 | struct intel_sdvo *sdvo = adapter->algo_data; |
2638 | struct intel_sdvo *sdvo = adapter->algo_data; |
2634 | return sdvo->i2c->algo->functionality(sdvo->i2c); |
2639 | return sdvo->i2c->algo->functionality(sdvo->i2c); |
2635 | } |
2640 | } |
2636 | 2641 | ||
2637 | static const struct i2c_algorithm intel_sdvo_ddc_proxy = { |
2642 | static const struct i2c_algorithm intel_sdvo_ddc_proxy = { |
2638 | .master_xfer = intel_sdvo_ddc_proxy_xfer, |
2643 | .master_xfer = intel_sdvo_ddc_proxy_xfer, |
2639 | .functionality = intel_sdvo_ddc_proxy_func |
2644 | .functionality = intel_sdvo_ddc_proxy_func |
2640 | }; |
2645 | }; |
2641 | 2646 | ||
2642 | static bool |
2647 | static bool |
2643 | intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, |
2648 | intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, |
2644 | struct drm_device *dev) |
2649 | struct drm_device *dev) |
2645 | { |
2650 | { |
2646 | sdvo->ddc.owner = THIS_MODULE; |
2651 | sdvo->ddc.owner = THIS_MODULE; |
2647 | sdvo->ddc.class = I2C_CLASS_DDC; |
2652 | sdvo->ddc.class = I2C_CLASS_DDC; |
2648 | snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); |
2653 | snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); |
2649 | sdvo->ddc.dev.parent = &dev->pdev->dev; |
2654 | sdvo->ddc.dev.parent = &dev->pdev->dev; |
2650 | sdvo->ddc.algo_data = sdvo; |
2655 | sdvo->ddc.algo_data = sdvo; |
2651 | sdvo->ddc.algo = &intel_sdvo_ddc_proxy; |
2656 | sdvo->ddc.algo = &intel_sdvo_ddc_proxy; |
2652 | 2657 | ||
2653 | return 1; //i2c_add_adapter(&sdvo->ddc) == 0; |
2658 | return 1; //i2c_add_adapter(&sdvo->ddc) == 0; |
2654 | } |
2659 | } |
2655 | 2660 | ||
2656 | bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) |
2661 | bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) |
2657 | { |
2662 | { |
2658 | struct drm_i915_private *dev_priv = dev->dev_private; |
2663 | struct drm_i915_private *dev_priv = dev->dev_private; |
2659 | struct intel_encoder *intel_encoder; |
2664 | struct intel_encoder *intel_encoder; |
2660 | struct intel_sdvo *intel_sdvo; |
2665 | struct intel_sdvo *intel_sdvo; |
2661 | u32 hotplug_mask; |
2666 | u32 hotplug_mask; |
2662 | int i; |
2667 | int i; |
2663 | 2668 | ||
2664 | intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL); |
2669 | intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL); |
2665 | if (!intel_sdvo) |
2670 | if (!intel_sdvo) |
2666 | return false; |
2671 | return false; |
2667 | 2672 | ||
2668 | intel_sdvo->sdvo_reg = sdvo_reg; |
2673 | intel_sdvo->sdvo_reg = sdvo_reg; |
2669 | intel_sdvo->is_sdvob = is_sdvob; |
2674 | intel_sdvo->is_sdvob = is_sdvob; |
2670 | intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1; |
2675 | intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1; |
2671 | intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg); |
2676 | intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg); |
2672 | if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) { |
2677 | if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) { |
2673 | kfree(intel_sdvo); |
2678 | kfree(intel_sdvo); |
2674 | return false; |
2679 | return false; |
2675 | } |
2680 | } |
2676 | 2681 | ||
2677 | /* encoder type will be decided later */ |
2682 | /* encoder type will be decided later */ |
2678 | intel_encoder = &intel_sdvo->base; |
2683 | intel_encoder = &intel_sdvo->base; |
2679 | intel_encoder->type = INTEL_OUTPUT_SDVO; |
2684 | intel_encoder->type = INTEL_OUTPUT_SDVO; |
2680 | drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); |
2685 | drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); |
2681 | 2686 | ||
2682 | /* Read the regs to test if we can talk to the device */ |
2687 | /* Read the regs to test if we can talk to the device */ |
2683 | for (i = 0; i < 0x40; i++) { |
2688 | for (i = 0; i < 0x40; i++) { |
2684 | u8 byte; |
2689 | u8 byte; |
2685 | 2690 | ||
2686 | if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { |
2691 | if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { |
2687 | DRM_DEBUG_KMS("No SDVO device found on %s\n", |
2692 | DRM_DEBUG_KMS("No SDVO device found on %s\n", |
2688 | SDVO_NAME(intel_sdvo)); |
2693 | SDVO_NAME(intel_sdvo)); |
2689 | goto err; |
2694 | goto err; |
2690 | } |
2695 | } |
2691 | } |
2696 | } |
2692 | 2697 | ||
2693 | hotplug_mask = 0; |
2698 | hotplug_mask = 0; |
2694 | if (IS_G4X(dev)) { |
2699 | if (IS_G4X(dev)) { |
2695 | hotplug_mask = intel_sdvo->is_sdvob ? |
2700 | hotplug_mask = intel_sdvo->is_sdvob ? |
2696 | SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X; |
2701 | SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X; |
2697 | } else if (IS_GEN4(dev)) { |
2702 | } else if (IS_GEN4(dev)) { |
2698 | hotplug_mask = intel_sdvo->is_sdvob ? |
2703 | hotplug_mask = intel_sdvo->is_sdvob ? |
2699 | SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965; |
2704 | SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965; |
2700 | } else { |
2705 | } else { |
2701 | hotplug_mask = intel_sdvo->is_sdvob ? |
2706 | hotplug_mask = intel_sdvo->is_sdvob ? |
2702 | SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915; |
2707 | SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915; |
2703 | } |
2708 | } |
2704 | 2709 | ||
2705 | drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs); |
2710 | drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs); |
2706 | 2711 | ||
2707 | intel_encoder->disable = intel_disable_sdvo; |
2712 | intel_encoder->disable = intel_disable_sdvo; |
2708 | intel_encoder->enable = intel_enable_sdvo; |
2713 | intel_encoder->enable = intel_enable_sdvo; |
2709 | intel_encoder->get_hw_state = intel_sdvo_get_hw_state; |
2714 | intel_encoder->get_hw_state = intel_sdvo_get_hw_state; |
2710 | 2715 | ||
2711 | /* In default case sdvo lvds is false */ |
2716 | /* In default case sdvo lvds is false */ |
2712 | if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) |
2717 | if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) |
2713 | goto err; |
2718 | goto err; |
2714 | 2719 | ||
2715 | if (intel_sdvo_output_setup(intel_sdvo, |
2720 | if (intel_sdvo_output_setup(intel_sdvo, |
2716 | intel_sdvo->caps.output_flags) != true) { |
2721 | intel_sdvo->caps.output_flags) != true) { |
2717 | DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", |
2722 | DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", |
2718 | SDVO_NAME(intel_sdvo)); |
2723 | SDVO_NAME(intel_sdvo)); |
- | 2724 | /* Output_setup can leave behind connectors! */ |
|
2719 | goto err; |
2725 | goto err_output; |
2720 | } |
2726 | } |
- | 2727 | ||
- | 2728 | /* |
|
- | 2729 | * Cloning SDVO with anything is often impossible, since the SDVO |
|
- | 2730 | * encoder can request a special input timing mode. And even if that's |
|
- | 2731 | * not the case we have evidence that cloning a plain unscaled mode with |
|
- | 2732 | * VGA doesn't really work. Furthermore the cloning flags are way too |
|
- | 2733 | * simplistic anyway to express such constraints, so just give up on |
|
- | 2734 | * cloning for SDVO encoders. |
|
- | 2735 | */ |
|
- | 2736 | intel_sdvo->base.cloneable = false; |
|
2721 | 2737 | ||
2722 | /* Only enable the hotplug irq if we need it, to work around noisy |
2738 | /* Only enable the hotplug irq if we need it, to work around noisy |
2723 | * hotplug lines. |
2739 | * hotplug lines. |
2724 | */ |
2740 | */ |
2725 | if (intel_sdvo->hotplug_active) |
2741 | if (intel_sdvo->hotplug_active) |
2726 | dev_priv->hotplug_supported_mask |= hotplug_mask; |
2742 | dev_priv->hotplug_supported_mask |= hotplug_mask; |
2727 | 2743 | ||
2728 | intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); |
2744 | intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); |
2729 | 2745 | ||
2730 | /* Set the input timing to the screen. Assume always input 0. */ |
2746 | /* Set the input timing to the screen. Assume always input 0. */ |
2731 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
2747 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
2732 | goto err; |
2748 | goto err_output; |
2733 | 2749 | ||
2734 | if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, |
2750 | if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, |
2735 | &intel_sdvo->pixel_clock_min, |
2751 | &intel_sdvo->pixel_clock_min, |
2736 | &intel_sdvo->pixel_clock_max)) |
2752 | &intel_sdvo->pixel_clock_max)) |
2737 | goto err; |
2753 | goto err_output; |
2738 | 2754 | ||
2739 | DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " |
2755 | DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " |
2740 | "clock range %dMHz - %dMHz, " |
2756 | "clock range %dMHz - %dMHz, " |
2741 | "input 1: %c, input 2: %c, " |
2757 | "input 1: %c, input 2: %c, " |
2742 | "output 1: %c, output 2: %c\n", |
2758 | "output 1: %c, output 2: %c\n", |
2743 | SDVO_NAME(intel_sdvo), |
2759 | SDVO_NAME(intel_sdvo), |
2744 | intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, |
2760 | intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, |
2745 | intel_sdvo->caps.device_rev_id, |
2761 | intel_sdvo->caps.device_rev_id, |
2746 | intel_sdvo->pixel_clock_min / 1000, |
2762 | intel_sdvo->pixel_clock_min / 1000, |
2747 | intel_sdvo->pixel_clock_max / 1000, |
2763 | intel_sdvo->pixel_clock_max / 1000, |
2748 | (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', |
2764 | (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', |
2749 | (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', |
2765 | (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', |
2750 | /* check currently supported outputs */ |
2766 | /* check currently supported outputs */ |
2751 | intel_sdvo->caps.output_flags & |
2767 | intel_sdvo->caps.output_flags & |
2752 | (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', |
2768 | (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', |
2753 | intel_sdvo->caps.output_flags & |
2769 | intel_sdvo->caps.output_flags & |
2754 | (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); |
2770 | (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); |
2755 | return true; |
2771 | return true; |
- | 2772 | ||
- | 2773 | err_output: |
|
- | 2774 | intel_sdvo_output_cleanup(intel_sdvo); |
|
2756 | 2775 | ||
2757 | err: |
2776 | err: |
2758 | drm_encoder_cleanup(&intel_encoder->base); |
2777 | drm_encoder_cleanup(&intel_encoder->base); |
2759 | // i2c_del_adapter(&intel_sdvo->ddc); |
2778 | // i2c_del_adapter(&intel_sdvo->ddc); |
2760 | kfree(intel_sdvo); |
2779 | kfree(intel_sdvo); |
2761 | 2780 | ||
2762 | return false; |
2781 | return false; |
2763 | }>>><>>><>><>><>><>><>>><>>><>>>>><>><>>><>>>=>=>><>><>><>><>><>><>><>><>><>><>><>>=>>>>>>> |
2782 | }>>><>>><>><>><>><>><>>><>>><>>>>><>><>>><>>>=>=>><>><>><>><>><>><>><>><>><>><>><>>=>>>>>>> |