WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/intel_runtime_pm.c

 	if (IS_BROADWELL(dev))
 		gen8_irq_power_well_post_enable(dev_priv,
 << PIPE_C | 1 << PIPE_B);
+}
+static void hsw_power_well_pre_disable(struct drm_i915_private *dev_priv)
+{
+	if (IS_BROADWELL(dev_priv))
+		gen8_irq_power_well_pre_disable(dev_priv,
+<< PIPE_C | 1 << PIPE_B);
+}
 static void skl_power_well_post_enable(struct drm_i915_private *dev_priv,
 				       struct i915_power_well *power_well)
+{
 		gen8_irq_power_well_post_enable(dev_priv,
 << PIPE_C | 1 << PIPE_B);
+	}
+}
+static void skl_power_well_pre_disable(struct drm_i915_private *dev_priv,
+				       struct i915_power_well *power_well)
+{
+	if (power_well->data == SKL_DISP_PW_2)
+		gen8_irq_power_well_pre_disable(dev_priv,
+<< PIPE_C | 1 << PIPE_B);
+}
 static void hsw_set_power_well(struct drm_i915_private *dev_priv,
 			       struct i915_power_well *power_well, bool enable)
+{
 	bool is_enabled, enable_requested;
 			hsw_power_well_post_enable(dev_priv);
+		}
 	} else {
+		if (enable_requested) {
-		if (enable_requested) {
+			hsw_power_well_pre_disable(dev_priv);
 			I915_WRITE(HSW_PWR_WELL_DRIVER, 0);
 			POSTING_READ(HSW_PWR_WELL_DRIVER);
 			DRM_DEBUG_KMS("Requesting to disable the power well\n");
+		}
 	  *  set disable sequence was followed.
 	  * 2] Check if display uninitialize sequence is initialized.
 	  */
+}
-static void gen9_set_dc_state_debugmask_memory_up(
-			struct drm_i915_private *dev_priv)
+static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv)
 {
+	uint32_t val, mask;
+	mask = DC_STATE_DEBUG_MASK_MEMORY_UP;
+	if (IS_BROXTON(dev_priv))
-	uint32_t val;
+		mask |= DC_STATE_DEBUG_MASK_CORES;
 	/* The below bit doesn't need to be cleared ever afterwards */
 	val = I915_READ(DC_STATE_DEBUG);
-	if (!(val & DC_STATE_DEBUG_MASK_MEMORY_UP)) {
+	if ((val & mask) != mask) {
-		val |= DC_STATE_DEBUG_MASK_MEMORY_UP;
+		val |= mask;
 		I915_WRITE(DC_STATE_DEBUG, val);
 		POSTING_READ(DC_STATE_DEBUG);
 	if (i915.enable_dc == 0)
 		state = DC_STATE_DISABLE;
 	else if (i915.enable_dc == 1 && state > DC_STATE_EN_UPTO_DC5)
 		state = DC_STATE_EN_UPTO_DC5;
-	if (state & DC_STATE_EN_UPTO_DC5_DC6_MASK)
-		gen9_set_dc_state_debugmask_memory_up(dev_priv);
 	val = I915_READ(DC_STATE_EN);
 	DRM_DEBUG_KMS("Setting DC state from %02x to %02x\n",
 		      val & mask, state);
+{
 	struct drm_device *dev = dev_priv->dev;
 	bool pg2_enabled = intel_display_power_well_is_enabled(dev_priv,
 					SKL_DISP_PW_2);
+	WARN_ONCE(!IS_SKYLAKE(dev) && !IS_KABYLAKE(dev),
-	WARN_ONCE(!IS_SKYLAKE(dev), "Platform doesn't support DC5.\n");
+		  "Platform doesn't support DC5.\n");
 	WARN_ONCE(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
 	WARN_ONCE(pg2_enabled, "PG2 not disabled to enable DC5.\n");
 static void assert_can_enable_dc6(struct drm_i915_private *dev_priv)
+{
+	struct drm_device *dev = dev_priv->dev;
-	struct drm_device *dev = dev_priv->dev;
 	WARN_ONCE(!IS_SKYLAKE(dev) && !IS_KABYLAKE(dev),
-	WARN_ONCE(!IS_SKYLAKE(dev), "Platform doesn't support DC6.\n");
+		  "Platform doesn't support DC6.\n");
 	WARN_ONCE(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
 	WARN_ONCE(I915_READ(UTIL_PIN_CTL) & UTIL_PIN_ENABLE,
 		  "Backlight is not disabled.\n");
 static void gen9_disable_dc5_dc6(struct drm_i915_private *dev_priv)
+{
+	assert_can_disable_dc5(dev_priv);
-	assert_can_disable_dc5(dev_priv);
 	if ((IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) &&
-	if (IS_SKYLAKE(dev_priv) && i915.enable_dc != 0 && i915.enable_dc != 1)
+	    i915.enable_dc != 0 && i915.enable_dc != 1)
 		assert_can_disable_dc6(dev_priv);
+}
 static void skl_set_power_well(struct drm_i915_private *dev_priv,
 			struct i915_power_well *power_well, bool enable)
-{
 	struct drm_device *dev = dev_priv->dev;
 	uint32_t tmp, fuse_status;
 	uint32_t req_mask, state_mask;
 	bool is_enabled, enable_requested, check_fuse_status = false;
 	req_mask = SKL_POWER_WELL_REQ(power_well->data);
 	enable_requested = tmp & req_mask;
 	state_mask = SKL_POWER_WELL_STATE(power_well->data);
 	is_enabled = tmp & state_mask;
+	if (!enable && enable_requested)
+		skl_power_well_pre_disable(dev_priv, power_well);
 	if (enable) {
 		if (!enable_requested) {
 			WARN((tmp & state_mask) &&
 				!I915_READ(HSW_PWR_WELL_BIOS),
 				"Invalid for power well status to be enabled, unless done by the BIOS, \
-				when request is to disable!\n");
-			if (power_well->data == SKL_DISP_PW_2) {
-					/*
-				 * DDI buffer programming unnecessary during
-				 * driver-load/resume as it's already done
-				 * during modeset initialization then. It's
-				 * also invalid here as encoder list is still
-				 * uninitialized.
-					 */
-					if (!dev_priv->power_domains.initializing)
-						intel_prepare_ddi(dev);
 				when request is to disable!\n");
 			I915_WRITE(HSW_PWR_WELL_DRIVER, tmp | req_mask);
+		}
+}
 static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
 					   struct i915_power_well *power_well)
+{
-{
+	if ((IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) &&
-	if (IS_SKYLAKE(dev_priv) && i915.enable_dc != 0 && i915.enable_dc != 1)
+	    i915.enable_dc != 0 && i915.enable_dc != 1)
 		skl_enable_dc6(dev_priv);
 	else
 		gen9_enable_dc5(dev_priv);
 					   struct i915_power_well *power_well)
+{
 	if (power_well->count > 0) {
 		gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
 	} else {
-		if (IS_SKYLAKE(dev_priv) && i915.enable_dc != 0 &&
+		if ((IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) &&
+		    i915.enable_dc != 0 &&
 		    i915.enable_dc != 1)
 			gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6);
 		else
 			gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC5);
+	}
+{
 	spin_lock_irq(&dev_priv->irq_lock);
 	valleyview_disable_display_irqs(dev_priv);
 	spin_unlock_irq(&dev_priv->irq_lock);
+	/* make sure we're done processing display irqs */
+	synchronize_irq(dev_priv->dev->irq);
 	vlv_power_sequencer_reset(dev_priv);
+}
 void skl_pw1_misc_io_init(struct drm_i915_private *dev_priv)
+{
 	struct i915_power_well *well;
-	if (!IS_SKYLAKE(dev_priv))
+	if (!(IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)))
 		return;
 void skl_pw1_misc_io_fini(struct drm_i915_private *dev_priv)
+{
 	struct i915_power_well *well;
-	if (!IS_SKYLAKE(dev_priv))
+	if (!(IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)))
 		return;
 	if (!resume)
 		return;
 	skl_init_cdclk(dev_priv);
-	if (dev_priv->csr.dmc_payload)
+	if (dev_priv->csr.dmc_payload && intel_csr_load_program(dev_priv))
-		intel_csr_load_program(dev_priv);
+		gen9_set_dc_state_debugmask(dev_priv);
+}

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/intel_runtime_pm.c – Rev 6937 → 7144