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| 3 | 3 | ||
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| 4 | #include |
4 | #include |
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| - | 5 | ||
| - | 6 | #define I915_CMD_HASH_ORDER 9 |
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| - | 7 | ||
| - | 8 | /* Early gen2 devices have a cacheline of just 32 bytes, using 64 is overkill, |
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| - | 9 | * but keeps the logic simple. Indeed, the whole purpose of this macro is just |
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| - | 10 | * to give some inclination as to some of the magic values used in the various |
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| - | 11 | * workarounds! |
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| 5 | 12 | */ |
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| 6 | #define I915_CMD_HASH_ORDER 9 |
13 | #define CACHELINE_BYTES 64 |
| 7 | 14 | ||
| 8 | /* |
15 | /* |
| 9 | * Gen2 BSpec "1. Programming Environment" / 1.4.4.6 "Ring Buffer Use" |
16 | * Gen2 BSpec "1. Programming Environment" / 1.4.4.6 "Ring Buffer Use" |
| Line 88... | Line 95... | ||
| 88 | 95 | ||
| 89 | struct intel_ringbuffer { |
96 | struct intel_ringbuffer { |
| 90 | struct drm_i915_gem_object *obj; |
97 | struct drm_i915_gem_object *obj; |
| Line -... | Line 98... | ||
| - | 98 | void __iomem *virtual_start; |
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| - | 99 | ||
| - | 100 | struct intel_engine_cs *ring; |
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| - | 101 | ||
| - | 102 | /* |
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| - | 103 | * FIXME: This backpointer is an artifact of the history of how the |
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| - | 104 | * execlist patches came into being. It will get removed once the basic |
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| - | 105 | * code has landed. |
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| - | 106 | */ |
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| 91 | void __iomem *virtual_start; |
107 | struct intel_context *FIXME_lrc_ctx; |
| 92 | 108 | ||
| 93 | u32 head; |
109 | u32 head; |
| 94 | u32 tail; |
110 | u32 tail; |
| 95 | int space; |
111 | int space; |
| Line 130... | Line 146... | ||
| 130 | bool __must_check (*irq_get)(struct intel_engine_cs *ring); |
146 | bool __must_check (*irq_get)(struct intel_engine_cs *ring); |
| 131 | void (*irq_put)(struct intel_engine_cs *ring); |
147 | void (*irq_put)(struct intel_engine_cs *ring); |
| Line 132... | Line 148... | ||
| 132 | 148 | ||
| Line -... | Line 149... | ||
| - | 149 | int (*init)(struct intel_engine_cs *ring); |
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| - | 150 | ||
| - | 151 | int (*init_context)(struct intel_engine_cs *ring, |
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| 133 | int (*init)(struct intel_engine_cs *ring); |
152 | struct intel_context *ctx); |
| 134 | 153 | ||
| 135 | void (*write_tail)(struct intel_engine_cs *ring, |
154 | void (*write_tail)(struct intel_engine_cs *ring, |
| 136 | u32 value); |
155 | u32 value); |
| 137 | int __must_check (*flush)(struct intel_engine_cs *ring, |
156 | int __must_check (*flush)(struct intel_engine_cs *ring, |
| Line 212... | Line 231... | ||
| 212 | int (*signal)(struct intel_engine_cs *signaller, |
231 | int (*signal)(struct intel_engine_cs *signaller, |
| 213 | /* num_dwords needed by caller */ |
232 | /* num_dwords needed by caller */ |
| 214 | unsigned int num_dwords); |
233 | unsigned int num_dwords); |
| 215 | } semaphore; |
234 | } semaphore; |
| Line -... | Line 235... | ||
| - | 235 | ||
| - | 236 | /* Execlists */ |
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| - | 237 | spinlock_t execlist_lock; |
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| - | 238 | struct list_head execlist_queue; |
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| - | 239 | struct list_head execlist_retired_req_list; |
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| - | 240 | u8 next_context_status_buffer; |
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| - | 241 | u32 irq_keep_mask; /* bitmask for interrupts that should not be masked */ |
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| - | 242 | int (*emit_request)(struct intel_ringbuffer *ringbuf); |
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| - | 243 | int (*emit_flush)(struct intel_ringbuffer *ringbuf, |
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| - | 244 | u32 invalidate_domains, |
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| - | 245 | u32 flush_domains); |
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| - | 246 | int (*emit_bb_start)(struct intel_ringbuffer *ringbuf, |
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| - | 247 | u64 offset, unsigned flags); |
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| 216 | 248 | ||
| 217 | /** |
249 | /** |
| 218 | * List of objects currently involved in rendering from the |
250 | * List of objects currently involved in rendering from the |
| 219 | * ringbuffer. |
251 | * ringbuffer. |
| 220 | * |
252 | * |
| Line 285... | Line 317... | ||
| 285 | * to encode the command length in the header). |
317 | * to encode the command length in the header). |
| 286 | */ |
318 | */ |
| 287 | u32 (*get_cmd_length_mask)(u32 cmd_header); |
319 | u32 (*get_cmd_length_mask)(u32 cmd_header); |
| 288 | }; |
320 | }; |
| Line 289... | Line -... | ||
| 289 | - | ||
| 290 | static inline bool |
321 | |
| 291 | intel_ring_initialized(struct intel_engine_cs *ring) |
- | |
| 292 | { |
- | |
| 293 | return ring->buffer && ring->buffer->obj; |
- | |
| Line 294... | Line 322... | ||
| 294 | } |
322 | bool intel_ring_initialized(struct intel_engine_cs *ring); |
| 295 | 323 | ||
| 296 | static inline unsigned |
324 | static inline unsigned |
| 297 | intel_ring_flag(struct intel_engine_cs *ring) |
325 | intel_ring_flag(struct intel_engine_cs *ring) |
| Line 353... | Line 381... | ||
| 353 | */ |
381 | */ |
| 354 | #define I915_GEM_HWS_INDEX 0x20 |
382 | #define I915_GEM_HWS_INDEX 0x20 |
| 355 | #define I915_GEM_HWS_SCRATCH_INDEX 0x30 |
383 | #define I915_GEM_HWS_SCRATCH_INDEX 0x30 |
| 356 | #define I915_GEM_HWS_SCRATCH_ADDR (I915_GEM_HWS_SCRATCH_INDEX << MI_STORE_DWORD_INDEX_SHIFT) |
384 | #define I915_GEM_HWS_SCRATCH_ADDR (I915_GEM_HWS_SCRATCH_INDEX << MI_STORE_DWORD_INDEX_SHIFT) |
| Line -... | Line 385... | ||
| - | 385 | ||
| - | 386 | void intel_unpin_ringbuffer_obj(struct intel_ringbuffer *ringbuf); |
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| - | 387 | int intel_pin_and_map_ringbuffer_obj(struct drm_device *dev, |
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| - | 388 | struct intel_ringbuffer *ringbuf); |
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| - | 389 | void intel_destroy_ringbuffer_obj(struct intel_ringbuffer *ringbuf); |
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| - | 390 | int intel_alloc_ringbuffer_obj(struct drm_device *dev, |
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| - | 391 | struct intel_ringbuffer *ringbuf); |
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| 357 | 392 | ||
| 358 | void intel_stop_ring_buffer(struct intel_engine_cs *ring); |
393 | void intel_stop_ring_buffer(struct intel_engine_cs *ring); |
| Line 359... | Line 394... | ||
| 359 | void intel_cleanup_ring_buffer(struct intel_engine_cs *ring); |
394 | void intel_cleanup_ring_buffer(struct intel_engine_cs *ring); |
| 360 | 395 | ||
| Line 370... | Line 405... | ||
| 370 | static inline void intel_ring_advance(struct intel_engine_cs *ring) |
405 | static inline void intel_ring_advance(struct intel_engine_cs *ring) |
| 371 | { |
406 | { |
| 372 | struct intel_ringbuffer *ringbuf = ring->buffer; |
407 | struct intel_ringbuffer *ringbuf = ring->buffer; |
| 373 | ringbuf->tail &= ringbuf->size - 1; |
408 | ringbuf->tail &= ringbuf->size - 1; |
| 374 | } |
409 | } |
| - | 410 | int __intel_ring_space(int head, int tail, int size); |
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| - | 411 | int intel_ring_space(struct intel_ringbuffer *ringbuf); |
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| - | 412 | bool intel_ring_stopped(struct intel_engine_cs *ring); |
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| 375 | void __intel_ring_advance(struct intel_engine_cs *ring); |
413 | void __intel_ring_advance(struct intel_engine_cs *ring); |
| Line 376... | Line 414... | ||
| 376 | 414 | ||
| 377 | int __must_check intel_ring_idle(struct intel_engine_cs *ring); |
415 | int __must_check intel_ring_idle(struct intel_engine_cs *ring); |
| 378 | void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno); |
416 | void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno); |
| 379 | int intel_ring_flush_all_caches(struct intel_engine_cs *ring); |
417 | int intel_ring_flush_all_caches(struct intel_engine_cs *ring); |
| Line -... | Line 418... | ||
| - | 418 | int intel_ring_invalidate_all_caches(struct intel_engine_cs *ring); |
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| - | 419 | ||
| - | 420 | void intel_fini_pipe_control(struct intel_engine_cs *ring); |
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| 380 | int intel_ring_invalidate_all_caches(struct intel_engine_cs *ring); |
421 | int intel_init_pipe_control(struct intel_engine_cs *ring); |
| 381 | 422 | ||
| 382 | int intel_init_render_ring_buffer(struct drm_device *dev); |
423 | int intel_init_render_ring_buffer(struct drm_device *dev); |
| 383 | int intel_init_bsd_ring_buffer(struct drm_device *dev); |
424 | int intel_init_bsd_ring_buffer(struct drm_device *dev); |
| 384 | int intel_init_bsd2_ring_buffer(struct drm_device *dev); |
425 | int intel_init_bsd2_ring_buffer(struct drm_device *dev); |
| Line 385... | Line 426... | ||
| 385 | int intel_init_blt_ring_buffer(struct drm_device *dev); |
426 | int intel_init_blt_ring_buffer(struct drm_device *dev); |
| 386 | int intel_init_vebox_ring_buffer(struct drm_device *dev); |
427 | int intel_init_vebox_ring_buffer(struct drm_device *dev); |
| Line -... | Line 428... | ||
| - | 428 | ||
| - | 429 | u64 intel_ring_get_active_head(struct intel_engine_cs *ring); |
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| 387 | 430 | void intel_ring_setup_status_page(struct intel_engine_cs *ring); |
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| 388 | u64 intel_ring_get_active_head(struct intel_engine_cs *ring); |
431 | |
| 389 | void intel_ring_setup_status_page(struct intel_engine_cs *ring); |
432 | int init_workarounds_ring(struct intel_engine_cs *ring); |
| 390 | 433 | ||
| Line 403... | Line 446... | ||
| 403 | { |
446 | { |
| 404 | if (ring->trace_irq_seqno == 0 && ring->irq_get(ring)) |
447 | if (ring->trace_irq_seqno == 0 && ring->irq_get(ring)) |
| 405 | ring->trace_irq_seqno = seqno; |
448 | ring->trace_irq_seqno = seqno; |
| 406 | } |
449 | } |
| Line 407... | Line -... | ||
| 407 | - | ||
| 408 | /* DRI warts */ |
- | |
| 409 | int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size); |
- | |
| 410 | 450 | ||