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Line 88... Line 88...
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	 * seen value is good enough. Note that the seqno will always be
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	 * seen value is good enough. Note that the seqno will always be
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	 * monotonic, even if not coherent.
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	 * monotonic, even if not coherent.
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	 */
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	 */
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	u32		(*get_seqno)(struct intel_ring_buffer *ring,
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	u32		(*get_seqno)(struct intel_ring_buffer *ring,
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				     bool lazy_coherency);
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				     bool lazy_coherency);
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	void		(*set_seqno)(struct intel_ring_buffer *ring,
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				     u32 seqno);
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	int		(*dispatch_execbuffer)(struct intel_ring_buffer *ring,
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	int		(*dispatch_execbuffer)(struct intel_ring_buffer *ring,
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					       u32 offset, u32 length,
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					       u32 offset, u32 length,
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					       unsigned flags);
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					       unsigned flags);
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#define I915_DISPATCH_SECURE 0x1
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#define I915_DISPATCH_SECURE 0x1
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#define I915_DISPATCH_PINNED 0x2
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#define I915_DISPATCH_PINNED 0x2
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	/* Ensure that the compiler doesn't optimize away the load. */
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	/* Ensure that the compiler doesn't optimize away the load. */
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	barrier();
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	barrier();
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	return ring->status_page.page_addr[reg];
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	return ring->status_page.page_addr[reg];
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}
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}
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static inline void
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intel_write_status_page(struct intel_ring_buffer *ring,
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			int reg, u32 value)
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{
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	ring->status_page.page_addr[reg] = value;
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}
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/**
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/**
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 * Reads a dword out of the status page, which is written to from the command
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 * Reads a dword out of the status page, which is written to from the command
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 * queue by automatic updates, MI_REPORT_HEAD, MI_STORE_DATA_INDEX, or
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 * queue by automatic updates, MI_REPORT_HEAD, MI_STORE_DATA_INDEX, or
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 * MI_STORE_DATA_IMM.
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 * MI_STORE_DATA_IMM.
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	iowrite32(data, ring->virtual_start + ring->tail);
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	iowrite32(data, ring->virtual_start + ring->tail);
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	ring->tail += 4;
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	ring->tail += 4;
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}
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}
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void intel_ring_advance(struct intel_ring_buffer *ring);
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void intel_ring_advance(struct intel_ring_buffer *ring);
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int __must_check intel_ring_idle(struct intel_ring_buffer *ring);
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int __must_check intel_ring_idle(struct intel_ring_buffer *ring);
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void intel_ring_init_seqno(struct intel_ring_buffer *ring, u32 seqno);
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int intel_ring_flush_all_caches(struct intel_ring_buffer *ring);
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int intel_ring_flush_all_caches(struct intel_ring_buffer *ring);
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int intel_ring_invalidate_all_caches(struct intel_ring_buffer *ring);
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int intel_ring_invalidate_all_caches(struct intel_ring_buffer *ring);
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int intel_init_render_ring_buffer(struct drm_device *dev);
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int intel_init_render_ring_buffer(struct drm_device *dev);