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Rev 3243 | Rev 3480 | ||
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Line 88... | Line 88... | ||
88 | * seen value is good enough. Note that the seqno will always be |
88 | * seen value is good enough. Note that the seqno will always be |
89 | * monotonic, even if not coherent. |
89 | * monotonic, even if not coherent. |
90 | */ |
90 | */ |
91 | u32 (*get_seqno)(struct intel_ring_buffer *ring, |
91 | u32 (*get_seqno)(struct intel_ring_buffer *ring, |
92 | bool lazy_coherency); |
92 | bool lazy_coherency); |
- | 93 | void (*set_seqno)(struct intel_ring_buffer *ring, |
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- | 94 | u32 seqno); |
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93 | int (*dispatch_execbuffer)(struct intel_ring_buffer *ring, |
95 | int (*dispatch_execbuffer)(struct intel_ring_buffer *ring, |
94 | u32 offset, u32 length, |
96 | u32 offset, u32 length, |
95 | unsigned flags); |
97 | unsigned flags); |
96 | #define I915_DISPATCH_SECURE 0x1 |
98 | #define I915_DISPATCH_SECURE 0x1 |
97 | #define I915_DISPATCH_PINNED 0x2 |
99 | #define I915_DISPATCH_PINNED 0x2 |
Line 176... | Line 178... | ||
176 | /* Ensure that the compiler doesn't optimize away the load. */ |
178 | /* Ensure that the compiler doesn't optimize away the load. */ |
177 | barrier(); |
179 | barrier(); |
178 | return ring->status_page.page_addr[reg]; |
180 | return ring->status_page.page_addr[reg]; |
179 | } |
181 | } |
Line -... | Line 182... | ||
- | 182 | ||
- | 183 | static inline void |
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- | 184 | intel_write_status_page(struct intel_ring_buffer *ring, |
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- | 185 | int reg, u32 value) |
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- | 186 | { |
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- | 187 | ring->status_page.page_addr[reg] = value; |
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- | 188 | } |
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180 | 189 | ||
181 | /** |
190 | /** |
182 | * Reads a dword out of the status page, which is written to from the command |
191 | * Reads a dword out of the status page, which is written to from the command |
183 | * queue by automatic updates, MI_REPORT_HEAD, MI_STORE_DATA_INDEX, or |
192 | * queue by automatic updates, MI_REPORT_HEAD, MI_STORE_DATA_INDEX, or |
184 | * MI_STORE_DATA_IMM. |
193 | * MI_STORE_DATA_IMM. |
Line 206... | Line 215... | ||
206 | iowrite32(data, ring->virtual_start + ring->tail); |
215 | iowrite32(data, ring->virtual_start + ring->tail); |
207 | ring->tail += 4; |
216 | ring->tail += 4; |
208 | } |
217 | } |
209 | void intel_ring_advance(struct intel_ring_buffer *ring); |
218 | void intel_ring_advance(struct intel_ring_buffer *ring); |
210 | int __must_check intel_ring_idle(struct intel_ring_buffer *ring); |
219 | int __must_check intel_ring_idle(struct intel_ring_buffer *ring); |
211 | - | ||
- | 220 | void intel_ring_init_seqno(struct intel_ring_buffer *ring, u32 seqno); |
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212 | int intel_ring_flush_all_caches(struct intel_ring_buffer *ring); |
221 | int intel_ring_flush_all_caches(struct intel_ring_buffer *ring); |
213 | int intel_ring_invalidate_all_caches(struct intel_ring_buffer *ring); |
222 | int intel_ring_invalidate_all_caches(struct intel_ring_buffer *ring); |
Line 214... | Line 223... | ||
214 | 223 | ||
215 | int intel_init_render_ring_buffer(struct drm_device *dev); |
224 | int intel_init_render_ring_buffer(struct drm_device *dev); |