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1 | #ifndef _INTEL_RINGBUFFER_H_ |
1 | #ifndef _INTEL_RINGBUFFER_H_ |
2 | #define _INTEL_RINGBUFFER_H_ |
2 | #define _INTEL_RINGBUFFER_H_ |
Line -... | Line 3... | ||
- | 3 | ||
- | 4 | /* |
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- | 5 | * Gen2 BSpec "1. Programming Environment" / 1.4.4.6 "Ring Buffer Use" |
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- | 6 | * Gen3 BSpec "vol1c Memory Interface Functions" / 2.3.4.5 "Ring Buffer Use" |
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- | 7 | * Gen4+ BSpec "vol1c Memory Interface and Command Stream" / 5.3.4.5 "Ring Buffer Use" |
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- | 8 | * |
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- | 9 | * "If the Ring Buffer Head Pointer and the Tail Pointer are on the same |
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- | 10 | * cacheline, the Head Pointer must not be greater than the Tail |
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- | 11 | * Pointer." |
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- | 12 | */ |
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- | 13 | #define I915_RING_FREE_SPACE 64 |
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3 | 14 | ||
4 | struct intel_hw_status_page { |
15 | struct intel_hw_status_page { |
5 | u32 *page_addr; |
16 | u32 *page_addr; |
6 | unsigned int gfx_addr; |
17 | unsigned int gfx_addr; |
7 | struct drm_i915_gem_object *obj; |
18 | struct drm_i915_gem_object *obj; |
Line 68... | Line 79... | ||
68 | void (*write_tail)(struct intel_ring_buffer *ring, |
79 | void (*write_tail)(struct intel_ring_buffer *ring, |
69 | u32 value); |
80 | u32 value); |
70 | int __must_check (*flush)(struct intel_ring_buffer *ring, |
81 | int __must_check (*flush)(struct intel_ring_buffer *ring, |
71 | u32 invalidate_domains, |
82 | u32 invalidate_domains, |
72 | u32 flush_domains); |
83 | u32 flush_domains); |
73 | int (*add_request)(struct intel_ring_buffer *ring, |
84 | int (*add_request)(struct intel_ring_buffer *ring); |
74 | u32 *seqno); |
- | |
75 | /* Some chipsets are not quite as coherent as advertised and need |
85 | /* Some chipsets are not quite as coherent as advertised and need |
76 | * an expensive kick to force a true read of the up-to-date seqno. |
86 | * an expensive kick to force a true read of the up-to-date seqno. |
77 | * However, the up-to-date seqno is not always required and the last |
87 | * However, the up-to-date seqno is not always required and the last |
78 | * seen value is good enough. Note that the seqno will always be |
88 | * seen value is good enough. Note that the seqno will always be |
79 | * monotonic, even if not coherent. |
89 | * monotonic, even if not coherent. |
80 | */ |
90 | */ |
81 | u32 (*get_seqno)(struct intel_ring_buffer *ring, |
91 | u32 (*get_seqno)(struct intel_ring_buffer *ring, |
82 | bool lazy_coherency); |
92 | bool lazy_coherency); |
83 | int (*dispatch_execbuffer)(struct intel_ring_buffer *ring, |
93 | int (*dispatch_execbuffer)(struct intel_ring_buffer *ring, |
84 | u32 offset, u32 length); |
94 | u32 offset, u32 length, |
- | 95 | unsigned flags); |
|
- | 96 | #define I915_DISPATCH_SECURE 0x1 |
|
- | 97 | #define I915_DISPATCH_PINNED 0x2 |
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85 | void (*cleanup)(struct intel_ring_buffer *ring); |
98 | void (*cleanup)(struct intel_ring_buffer *ring); |
86 | int (*sync_to)(struct intel_ring_buffer *ring, |
99 | int (*sync_to)(struct intel_ring_buffer *ring, |
87 | struct intel_ring_buffer *to, |
100 | struct intel_ring_buffer *to, |
88 | u32 seqno); |
101 | u32 seqno); |
Line 179... | Line 192... | ||
179 | * 0x1f: Last written status offset. (GM45) |
192 | * 0x1f: Last written status offset. (GM45) |
180 | * |
193 | * |
181 | * The area from dword 0x20 to 0x3ff is available for driver usage. |
194 | * The area from dword 0x20 to 0x3ff is available for driver usage. |
182 | */ |
195 | */ |
183 | #define I915_GEM_HWS_INDEX 0x20 |
196 | #define I915_GEM_HWS_INDEX 0x20 |
- | 197 | #define I915_GEM_HWS_SCRATCH_INDEX 0x30 |
|
- | 198 | #define I915_GEM_HWS_SCRATCH_ADDR (I915_GEM_HWS_SCRATCH_INDEX << MI_STORE_DWORD_INDEX_SHIFT) |
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Line 184... | Line 199... | ||
184 | 199 | ||
Line 185... | Line -... | ||
185 | void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring); |
- | |
186 | - | ||
187 | int __must_check intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n); |
- | |
188 | static inline int intel_wait_ring_idle(struct intel_ring_buffer *ring) |
- | |
189 | { |
- | |
190 | return intel_wait_ring_buffer(ring, ring->size - 8); |
- | |
191 | } |
200 | void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring); |
192 | - | ||
193 | int __must_check intel_ring_begin(struct intel_ring_buffer *ring, int n); |
201 | |
194 | 202 | int __must_check intel_ring_begin(struct intel_ring_buffer *ring, int n); |
|
195 | static inline void intel_ring_emit(struct intel_ring_buffer *ring, |
203 | static inline void intel_ring_emit(struct intel_ring_buffer *ring, |
196 | u32 data) |
204 | u32 data) |
197 | { |
205 | { |
198 | iowrite32(data, ring->virtual_start + ring->tail); |
206 | iowrite32(data, ring->virtual_start + ring->tail); |
199 | ring->tail += 4; |
- | |
200 | } |
207 | ring->tail += 4; |
- | 208 | } |
|
Line 201... | Line -... | ||
201 | - | ||
202 | void intel_ring_advance(struct intel_ring_buffer *ring); |
209 | void intel_ring_advance(struct intel_ring_buffer *ring); |
203 | 210 | int __must_check intel_ring_idle(struct intel_ring_buffer *ring); |
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Line 204... | Line 211... | ||
204 | u32 intel_ring_get_seqno(struct intel_ring_buffer *ring); |
211 | |
205 | int intel_ring_flush_all_caches(struct intel_ring_buffer *ring); |
212 | int intel_ring_flush_all_caches(struct intel_ring_buffer *ring); |
Line 215... | Line 222... | ||
215 | static inline u32 intel_ring_get_tail(struct intel_ring_buffer *ring) |
222 | static inline u32 intel_ring_get_tail(struct intel_ring_buffer *ring) |
216 | { |
223 | { |
217 | return ring->tail; |
224 | return ring->tail; |
218 | } |
225 | } |
Line -... | Line 226... | ||
- | 226 | ||
- | 227 | static inline u32 intel_ring_get_seqno(struct intel_ring_buffer *ring) |
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- | 228 | { |
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- | 229 | BUG_ON(ring->outstanding_lazy_request == 0); |
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- | 230 | return ring->outstanding_lazy_request; |
|
- | 231 | } |
|
219 | 232 | ||
220 | static inline void i915_trace_irq_get(struct intel_ring_buffer *ring, u32 seqno) |
233 | static inline void i915_trace_irq_get(struct intel_ring_buffer *ring, u32 seqno) |
221 | { |
234 | { |
222 | if (ring->trace_irq_seqno == 0 && ring->irq_get(ring)) |
235 | if (ring->trace_irq_seqno == 0 && ring->irq_get(ring)) |
223 | ring->trace_irq_seqno = seqno; |
236 | ring->trace_irq_seqno = seqno; |