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Rev 3031 | Rev 3037 | ||
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Line 1102... | Line 1102... | ||
1102 | int cursor_latency_ns, |
1102 | int cursor_latency_ns, |
1103 | int *plane_wm, |
1103 | int *plane_wm, |
1104 | int *cursor_wm) |
1104 | int *cursor_wm) |
1105 | { |
1105 | { |
1106 | struct drm_crtc *crtc; |
1106 | struct drm_crtc *crtc; |
1107 | - | ||
1108 | int htotal, hdisplay, clock, pixel_size; |
1107 | int htotal, hdisplay, clock, pixel_size; |
1109 | int line_time_us, line_count; |
1108 | int line_time_us, line_count; |
1110 | int entries, tlb_miss; |
1109 | int entries, tlb_miss; |
Line 1111... | Line -... | ||
1111 | - | ||
1112 | // ENTER(); |
- | |
1113 | - | ||
1114 | // dbgprintf("plane %d display %x cursor %x \n", plane, display, cursor); |
- | |
1115 | // dbgprintf("plane_wm %x cursor_wm %x \n", plane_wm, cursor_wm); |
- | |
1116 | 1110 | ||
1117 | crtc = intel_get_crtc_for_plane(dev, plane); |
1111 | crtc = intel_get_crtc_for_plane(dev, plane); |
Line 1118... | Line -... | ||
1118 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
- | |
1119 | - | ||
1120 | // dbgprintf("CRTC %d\n, fb %x, enabled %d\n", |
- | |
1121 | // crtc->base.id, crtc->fb, crtc->enabled ); |
- | |
1122 | - | ||
1123 | 1112 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
|
1124 | 1113 | ||
1125 | if (crtc->fb == NULL || !crtc->enabled || !intel_crtc->active) { |
1114 | if (crtc->fb == NULL || !crtc->enabled || !intel_crtc->active) { |
1126 | *cursor_wm = cursor->guard_size; |
1115 | *cursor_wm = cursor->guard_size; |
1127 | *plane_wm = display->guard_size; |
1116 | *plane_wm = display->guard_size; |
Line 1131... | Line 1120... | ||
1131 | htotal = crtc->mode.htotal; |
1120 | htotal = crtc->mode.htotal; |
1132 | hdisplay = crtc->mode.hdisplay; |
1121 | hdisplay = crtc->mode.hdisplay; |
1133 | clock = crtc->mode.clock; |
1122 | clock = crtc->mode.clock; |
1134 | pixel_size = crtc->fb->bits_per_pixel / 8; |
1123 | pixel_size = crtc->fb->bits_per_pixel / 8; |
Line 1135... | Line -... | ||
1135 | - | ||
1136 | // dbgprintf("mark 1\n"); |
- | |
1137 | 1124 | ||
1138 | /* Use the small buffer method to calculate plane watermark */ |
1125 | /* Use the small buffer method to calculate plane watermark */ |
1139 | entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000; |
1126 | entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000; |
1140 | tlb_miss = display->fifo_size*display->cacheline_size - hdisplay * 8; |
1127 | tlb_miss = display->fifo_size*display->cacheline_size - hdisplay * 8; |
1141 | if (tlb_miss > 0) |
1128 | if (tlb_miss > 0) |
1142 | entries += tlb_miss; |
1129 | entries += tlb_miss; |
1143 | entries = DIV_ROUND_UP(entries, display->cacheline_size); |
1130 | entries = DIV_ROUND_UP(entries, display->cacheline_size); |
1144 | *plane_wm = entries + display->guard_size; |
1131 | *plane_wm = entries + display->guard_size; |
1145 | if (*plane_wm > (int)display->max_wm) |
1132 | if (*plane_wm > (int)display->max_wm) |
Line 1146... | Line -... | ||
1146 | *plane_wm = display->max_wm; |
- | |
1147 | - | ||
1148 | // dbgprintf("clock %d line_time_us %d\n",clock, line_time_us ); |
1133 | *plane_wm = display->max_wm; |
1149 | 1134 | ||
1150 | /* Use the large buffer method to calculate cursor watermark */ |
1135 | /* Use the large buffer method to calculate cursor watermark */ |
1151 | line_time_us = ((htotal * 1000) / clock); |
- | |
1152 | line_count = (cursor_latency_ns / line_time_us + 1000) / 1000; |
1136 | line_time_us = ((htotal * 1000) / clock); |
1153 | - | ||
1154 | entries = line_count * 64 * pixel_size; |
- | |
1155 | - | ||
1156 | // dbgprintf("mark 3\n"); |
- | |
1157 | - | ||
1158 | // dbgprintf("fifo size %d line size %d\n", |
- | |
1159 | // cursor->fifo_size, cursor->cacheline_size); |
1137 | line_count = (cursor_latency_ns / line_time_us + 1000) / 1000; |
1160 | - | ||
1161 | tlb_miss = cursor->fifo_size*cursor->cacheline_size - hdisplay * 8; |
1138 | entries = line_count * 64 * pixel_size; |
1162 | 1139 | tlb_miss = cursor->fifo_size*cursor->cacheline_size - hdisplay * 8; |
|
1163 | if (tlb_miss > 0) |
- | |
1164 | entries += tlb_miss; |
- | |
1165 | - | ||
1166 | // dbgprintf("mark 4\n"); |
1140 | if (tlb_miss > 0) |
1167 | - | ||
1168 | entries = DIV_ROUND_UP(entries, cursor->cacheline_size); |
- | |
1169 | - | ||
1170 | // dbgprintf("entries %d \n",entries); |
1141 | entries += tlb_miss; |
1171 | - | ||
1172 | *cursor_wm = entries + cursor->guard_size; |
1142 | entries = DIV_ROUND_UP(entries, cursor->cacheline_size); |
1173 | 1143 | *cursor_wm = entries + cursor->guard_size; |
|
Line 1174... | Line -... | ||
1174 | if (*cursor_wm > (int)cursor->max_wm) |
- | |
1175 | *cursor_wm = (int)cursor->max_wm; |
- | |
1176 | 1144 | if (*cursor_wm > (int)cursor->max_wm) |
|
1177 | // LEAVE(); |
1145 | *cursor_wm = (int)cursor->max_wm; |
Line 1178... | Line 1146... | ||
1178 | 1146 | ||
1179 | return true; |
1147 | return true; |
Line 1938... | Line 1906... | ||
1938 | WM3_LP_EN | |
1906 | WM3_LP_EN | |
1939 | (SNB_READ_WM3_LATENCY() << WM1_LP_LATENCY_SHIFT) | |
1907 | (SNB_READ_WM3_LATENCY() << WM1_LP_LATENCY_SHIFT) | |
1940 | (fbc_wm << WM1_LP_FBC_SHIFT) | |
1908 | (fbc_wm << WM1_LP_FBC_SHIFT) | |
1941 | (plane_wm << WM1_LP_SR_SHIFT) | |
1909 | (plane_wm << WM1_LP_SR_SHIFT) | |
1942 | cursor_wm); |
1910 | cursor_wm); |
1943 | - | ||
1944 | } |
1911 | } |
Line 1945... | Line 1912... | ||
1945 | 1912 | ||
1946 | static void |
1913 | static void |
1947 | haswell_update_linetime_wm(struct drm_device *dev, int pipe, |
1914 | haswell_update_linetime_wm(struct drm_device *dev, int pipe, |
Line 2161... | Line 2128... | ||
2161 | { |
2128 | { |
2162 | struct drm_i915_private *dev_priv = dev->dev_private; |
2129 | struct drm_i915_private *dev_priv = dev->dev_private; |
Line 2163... | Line 2130... | ||
2163 | 2130 | ||
2164 | if (dev_priv->display.update_wm) |
2131 | if (dev_priv->display.update_wm) |
2165 | dev_priv->display.update_wm(dev); |
- | |
2166 | 2132 | dev_priv->display.update_wm(dev); |
|
Line 2167... | Line 2133... | ||
2167 | } |
2133 | } |
2168 | 2134 | ||
2169 | void intel_update_linetime_watermarks(struct drm_device *dev, |
2135 | void intel_update_linetime_watermarks(struct drm_device *dev, |