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Rev 4104 | Rev 4560 | ||
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Line 32... | Line 32... | ||
32 | #include |
32 | #include |
33 | #include "intel_drv.h" |
33 | #include "intel_drv.h" |
34 | #include |
34 | #include |
35 | #include "i915_drv.h" |
35 | #include "i915_drv.h" |
Line -... | Line 36... | ||
- | 36 | ||
- | 37 | enum disp_clk { |
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- | 38 | CDCLK, |
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- | 39 | CZCLK |
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- | 40 | }; |
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36 | 41 | ||
37 | struct gmbus_port { |
42 | struct gmbus_port { |
38 | const char *name; |
43 | const char *name; |
39 | int reg; |
44 | int reg; |
Line 56... | Line 61... | ||
56 | to_intel_gmbus(struct i2c_adapter *i2c) |
61 | to_intel_gmbus(struct i2c_adapter *i2c) |
57 | { |
62 | { |
58 | return container_of(i2c, struct intel_gmbus, adapter); |
63 | return container_of(i2c, struct intel_gmbus, adapter); |
59 | } |
64 | } |
Line -... | Line 65... | ||
- | 65 | ||
- | 66 | static int get_disp_clk_div(struct drm_i915_private *dev_priv, |
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- | 67 | enum disp_clk clk) |
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- | 68 | { |
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- | 69 | u32 reg_val; |
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- | 70 | int clk_ratio; |
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- | 71 | ||
- | 72 | reg_val = I915_READ(CZCLK_CDCLK_FREQ_RATIO); |
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- | 73 | ||
- | 74 | if (clk == CDCLK) |
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- | 75 | clk_ratio = |
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- | 76 | ((reg_val & CDCLK_FREQ_MASK) >> CDCLK_FREQ_SHIFT) + 1; |
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- | 77 | else |
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- | 78 | clk_ratio = (reg_val & CZCLK_FREQ_MASK) + 1; |
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- | 79 | ||
- | 80 | return clk_ratio; |
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- | 81 | } |
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- | 82 | ||
- | 83 | static void gmbus_set_freq(struct drm_i915_private *dev_priv) |
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- | 84 | { |
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- | 85 | int vco, gmbus_freq = 0, cdclk_div; |
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- | 86 | ||
- | 87 | BUG_ON(!IS_VALLEYVIEW(dev_priv->dev)); |
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- | 88 | ||
- | 89 | vco = valleyview_get_vco(dev_priv); |
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- | 90 | ||
- | 91 | /* Get the CDCLK divide ratio */ |
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- | 92 | cdclk_div = get_disp_clk_div(dev_priv, CDCLK); |
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- | 93 | ||
- | 94 | /* |
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- | 95 | * Program the gmbus_freq based on the cdclk frequency. |
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- | 96 | * BSpec erroneously claims we should aim for 4MHz, but |
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- | 97 | * in fact 1MHz is the correct frequency. |
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- | 98 | */ |
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- | 99 | if (cdclk_div) |
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- | 100 | gmbus_freq = (vco << 1) / cdclk_div; |
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- | 101 | ||
- | 102 | if (WARN_ON(gmbus_freq == 0)) |
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- | 103 | return; |
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- | 104 | ||
- | 105 | I915_WRITE(GMBUSFREQ_VLV, gmbus_freq); |
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- | 106 | } |
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60 | 107 | ||
61 | void |
108 | void |
62 | intel_i2c_reset(struct drm_device *dev) |
109 | intel_i2c_reset(struct drm_device *dev) |
63 | { |
110 | { |
- | 111 | struct drm_i915_private *dev_priv = dev->dev_private; |
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- | 112 | ||
- | 113 | /* |
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- | 114 | * In BIOS-less system, program the correct gmbus frequency |
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- | 115 | * before reading edid. |
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- | 116 | */ |
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- | 117 | if (IS_VALLEYVIEW(dev)) |
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- | 118 | gmbus_set_freq(dev_priv); |
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64 | struct drm_i915_private *dev_priv = dev->dev_private; |
119 | |
65 | I915_WRITE(dev_priv->gpio_mmio_base + GMBUS0, 0); |
120 | I915_WRITE(dev_priv->gpio_mmio_base + GMBUS0, 0); |
66 | I915_WRITE(dev_priv->gpio_mmio_base + GMBUS4, 0); |
121 | I915_WRITE(dev_priv->gpio_mmio_base + GMBUS4, 0); |
Line 67... | Line 122... | ||
67 | } |
122 | } |