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Rev 5354 | Rev 6084 | ||
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Line 280... | Line 280... | ||
280 | spin_unlock_irqrestore(&dev_priv->irq_lock, flags); |
280 | spin_unlock_irqrestore(&dev_priv->irq_lock, flags); |
Line 281... | Line 281... | ||
281 | 281 | ||
282 | return ret; |
282 | return ret; |
Line 283... | Line -... | ||
283 | } |
- | |
284 | - | ||
285 | static bool |
- | |
286 | __cpu_fifo_underrun_reporting_enabled(struct drm_i915_private *dev_priv, |
- | |
287 | enum pipe pipe) |
- | |
288 | { |
- | |
289 | struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; |
- | |
290 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
- | |
291 | - | ||
292 | return !intel_crtc->cpu_fifo_underrun_disabled; |
- | |
293 | } |
283 | } |
294 | 284 | ||
295 | /** |
285 | /** |
296 | * intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state |
286 | * intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state |
297 | * @dev_priv: i915 device instance |
287 | * @dev_priv: i915 device instance |
Line 339... | Line 329... | ||
339 | spin_unlock_irqrestore(&dev_priv->irq_lock, flags); |
329 | spin_unlock_irqrestore(&dev_priv->irq_lock, flags); |
340 | return old; |
330 | return old; |
341 | } |
331 | } |
Line 342... | Line 332... | ||
342 | 332 | ||
343 | /** |
333 | /** |
344 | * intel_pch_fifo_underrun_irq_handler - handle PCH fifo underrun interrupt |
334 | * intel_cpu_fifo_underrun_irq_handler - handle CPU fifo underrun interrupt |
345 | * @dev_priv: i915 device instance |
335 | * @dev_priv: i915 device instance |
346 | * @pipe: (CPU) pipe to set state for |
336 | * @pipe: (CPU) pipe to set state for |
347 | * |
337 | * |
348 | * This handles a CPU fifo underrun interrupt, generating an underrun warning |
338 | * This handles a CPU fifo underrun interrupt, generating an underrun warning |
349 | * into dmesg if underrun reporting is enabled and then disables the underrun |
339 | * into dmesg if underrun reporting is enabled and then disables the underrun |
350 | * interrupt to avoid an irq storm. |
340 | * interrupt to avoid an irq storm. |
351 | */ |
341 | */ |
352 | void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, |
342 | void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, |
353 | enum pipe pipe) |
343 | enum pipe pipe) |
- | 344 | { |
|
- | 345 | struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; |
|
- | 346 | ||
- | 347 | /* We may be called too early in init, thanks BIOS! */ |
|
- | 348 | if (crtc == NULL) |
|
- | 349 | return; |
|
354 | { |
350 | |
355 | /* GMCH can't disable fifo underruns, filter them. */ |
351 | /* GMCH can't disable fifo underruns, filter them. */ |
356 | if (HAS_GMCH_DISPLAY(dev_priv->dev) && |
352 | if (HAS_GMCH_DISPLAY(dev_priv->dev) && |
357 | !__cpu_fifo_underrun_reporting_enabled(dev_priv, pipe)) |
353 | to_intel_crtc(crtc)->cpu_fifo_underrun_disabled) |
Line 358... | Line 354... | ||
358 | return; |
354 | return; |
359 | 355 | ||
360 | if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false)) |
356 | if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false)) |