Rev 6084 | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 6084 | Rev 6937 | ||
|---|---|---|---|
| Line 42... | Line 42... | ||
| 42 | static const struct intel_dvo_device intel_dvo_devices[] = { |
42 | static const struct intel_dvo_device intel_dvo_devices[] = { |
| 43 | { |
43 | { |
| 44 | .type = INTEL_DVO_CHIP_TMDS, |
44 | .type = INTEL_DVO_CHIP_TMDS, |
| 45 | .name = "sil164", |
45 | .name = "sil164", |
| 46 | .dvo_reg = DVOC, |
46 | .dvo_reg = DVOC, |
| - | 47 | .dvo_srcdim_reg = DVOC_SRCDIM, |
|
| 47 | .slave_addr = SIL164_ADDR, |
48 | .slave_addr = SIL164_ADDR, |
| 48 | .dev_ops = &sil164_ops, |
49 | .dev_ops = &sil164_ops, |
| 49 | }, |
50 | }, |
| 50 | { |
51 | { |
| 51 | .type = INTEL_DVO_CHIP_TMDS, |
52 | .type = INTEL_DVO_CHIP_TMDS, |
| 52 | .name = "ch7xxx", |
53 | .name = "ch7xxx", |
| 53 | .dvo_reg = DVOC, |
54 | .dvo_reg = DVOC, |
| - | 55 | .dvo_srcdim_reg = DVOC_SRCDIM, |
|
| 54 | .slave_addr = CH7xxx_ADDR, |
56 | .slave_addr = CH7xxx_ADDR, |
| 55 | .dev_ops = &ch7xxx_ops, |
57 | .dev_ops = &ch7xxx_ops, |
| 56 | }, |
58 | }, |
| 57 | { |
59 | { |
| 58 | .type = INTEL_DVO_CHIP_TMDS, |
60 | .type = INTEL_DVO_CHIP_TMDS, |
| 59 | .name = "ch7xxx", |
61 | .name = "ch7xxx", |
| 60 | .dvo_reg = DVOC, |
62 | .dvo_reg = DVOC, |
| - | 63 | .dvo_srcdim_reg = DVOC_SRCDIM, |
|
| 61 | .slave_addr = 0x75, /* For some ch7010 */ |
64 | .slave_addr = 0x75, /* For some ch7010 */ |
| 62 | .dev_ops = &ch7xxx_ops, |
65 | .dev_ops = &ch7xxx_ops, |
| 63 | }, |
66 | }, |
| 64 | { |
67 | { |
| 65 | .type = INTEL_DVO_CHIP_LVDS, |
68 | .type = INTEL_DVO_CHIP_LVDS, |
| 66 | .name = "ivch", |
69 | .name = "ivch", |
| 67 | .dvo_reg = DVOA, |
70 | .dvo_reg = DVOA, |
| - | 71 | .dvo_srcdim_reg = DVOA_SRCDIM, |
|
| 68 | .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ |
72 | .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ |
| 69 | .dev_ops = &ivch_ops, |
73 | .dev_ops = &ivch_ops, |
| 70 | }, |
74 | }, |
| 71 | { |
75 | { |
| 72 | .type = INTEL_DVO_CHIP_TMDS, |
76 | .type = INTEL_DVO_CHIP_TMDS, |
| 73 | .name = "tfp410", |
77 | .name = "tfp410", |
| 74 | .dvo_reg = DVOC, |
78 | .dvo_reg = DVOC, |
| - | 79 | .dvo_srcdim_reg = DVOC_SRCDIM, |
|
| 75 | .slave_addr = TFP410_ADDR, |
80 | .slave_addr = TFP410_ADDR, |
| 76 | .dev_ops = &tfp410_ops, |
81 | .dev_ops = &tfp410_ops, |
| 77 | }, |
82 | }, |
| 78 | { |
83 | { |
| 79 | .type = INTEL_DVO_CHIP_LVDS, |
84 | .type = INTEL_DVO_CHIP_LVDS, |
| 80 | .name = "ch7017", |
85 | .name = "ch7017", |
| 81 | .dvo_reg = DVOC, |
86 | .dvo_reg = DVOC, |
| - | 87 | .dvo_srcdim_reg = DVOC_SRCDIM, |
|
| 82 | .slave_addr = 0x75, |
88 | .slave_addr = 0x75, |
| 83 | .gpio = GMBUS_PIN_DPB, |
89 | .gpio = GMBUS_PIN_DPB, |
| 84 | .dev_ops = &ch7017_ops, |
90 | .dev_ops = &ch7017_ops, |
| 85 | }, |
91 | }, |
| 86 | { |
92 | { |
| 87 | .type = INTEL_DVO_CHIP_TMDS, |
93 | .type = INTEL_DVO_CHIP_TMDS, |
| 88 | .name = "ns2501", |
94 | .name = "ns2501", |
| 89 | .dvo_reg = DVOB, |
95 | .dvo_reg = DVOB, |
| - | 96 | .dvo_srcdim_reg = DVOB_SRCDIM, |
|
| 90 | .slave_addr = NS2501_ADDR, |
97 | .slave_addr = NS2501_ADDR, |
| 91 | .dev_ops = &ns2501_ops, |
98 | .dev_ops = &ns2501_ops, |
| 92 | } |
99 | } |
| 93 | }; |
100 | }; |
| Line 169... | Line 176... | ||
| 169 | 176 | ||
| 170 | static void intel_disable_dvo(struct intel_encoder *encoder) |
177 | static void intel_disable_dvo(struct intel_encoder *encoder) |
| 171 | { |
178 | { |
| 172 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
179 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
| 173 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
180 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
| 174 | u32 dvo_reg = intel_dvo->dev.dvo_reg; |
181 | i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; |
| Line 175... | Line 182... | ||
| 175 | u32 temp = I915_READ(dvo_reg); |
182 | u32 temp = I915_READ(dvo_reg); |
| 176 | 183 | ||
| 177 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); |
184 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); |
| Line 182... | Line 189... | ||
| 182 | static void intel_enable_dvo(struct intel_encoder *encoder) |
189 | static void intel_enable_dvo(struct intel_encoder *encoder) |
| 183 | { |
190 | { |
| 184 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
191 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
| 185 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
192 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
| 186 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
193 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
| 187 | u32 dvo_reg = intel_dvo->dev.dvo_reg; |
194 | i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; |
| 188 | u32 temp = I915_READ(dvo_reg); |
195 | u32 temp = I915_READ(dvo_reg); |
| Line 189... | Line 196... | ||
| 189 | 196 | ||
| 190 | intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, |
197 | intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, |
| 191 | &crtc->config->base.mode, |
198 | &crtc->config->base.mode, |
| Line 253... | Line 260... | ||
| 253 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
260 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
| 254 | const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; |
261 | const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; |
| 255 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
262 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
| 256 | int pipe = crtc->pipe; |
263 | int pipe = crtc->pipe; |
| 257 | u32 dvo_val; |
264 | u32 dvo_val; |
| 258 | u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg; |
265 | i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; |
| 259 | - | ||
| 260 | switch (dvo_reg) { |
- | |
| 261 | case DVOA: |
- | |
| 262 | default: |
- | |
| 263 | dvo_srcdim_reg = DVOA_SRCDIM; |
- | |
| 264 | break; |
- | |
| 265 | case DVOB: |
- | |
| 266 | dvo_srcdim_reg = DVOB_SRCDIM; |
- | |
| 267 | break; |
- | |
| 268 | case DVOC: |
- | |
| 269 | dvo_srcdim_reg = DVOC_SRCDIM; |
266 | i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg; |
| 270 | break; |
- | |
| 271 | } |
- | |
| Line 272... | Line 267... | ||
| 272 | 267 | ||
| 273 | /* Save the data order, since I don't know what it should be set to. */ |
268 | /* Save the data order, since I don't know what it should be set to. */ |
| 274 | dvo_val = I915_READ(dvo_reg) & |
269 | dvo_val = I915_READ(dvo_reg) & |
| 275 | (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); |
270 | (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); |
| Line 432... | Line 427... | ||
| 432 | 427 | ||
| Line 433... | Line 428... | ||
| 433 | intel_dvo->attached_connector = intel_connector; |
428 | intel_dvo->attached_connector = intel_connector; |
| 434 | 429 | ||
| 435 | intel_encoder = &intel_dvo->base; |
430 | intel_encoder = &intel_dvo->base; |
| Line 436... | Line 431... | ||
| 436 | drm_encoder_init(dev, &intel_encoder->base, |
431 | drm_encoder_init(dev, &intel_encoder->base, |
| 437 | &intel_dvo_enc_funcs, encoder_type); |
432 | &intel_dvo_enc_funcs, encoder_type, NULL); |
| 438 | 433 | ||
| 439 | intel_encoder->disable = intel_disable_dvo; |
434 | intel_encoder->disable = intel_disable_dvo; |