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| Rev 5060 | Rev 5354 | ||
|---|---|---|---|
| Line 132... | Line 132... | ||
| 132 | } |
132 | } |
| Line 133... | Line 133... | ||
| 133 | 133 | ||
| Line 134... | Line 134... | ||
| 134 | #else |
134 | #else |
| 135 | 135 | ||
| 136 | /* Get DSI clock from pixel clock */ |
- | |
| 137 | static u32 dsi_clk_from_pclk(const struct drm_display_mode *mode, |
136 | /* Get DSI clock from pixel clock */ |
| 138 | int pixel_format, int lane_count) |
137 | static u32 dsi_clk_from_pclk(u32 pclk, int pixel_format, int lane_count) |
| 139 | { |
138 | { |
| Line 140... | Line 139... | ||
| 140 | u32 dsi_clk_khz; |
139 | u32 dsi_clk_khz; |
| Line 154... | Line 153... | ||
| 154 | break; |
153 | break; |
| 155 | } |
154 | } |
| Line 156... | Line 155... | ||
| 156 | 155 | ||
| 157 | /* DSI data rate = pixel clock * bits per pixel / lane count |
156 | /* DSI data rate = pixel clock * bits per pixel / lane count |
| 158 | pixel clock is converted from KHz to Hz */ |
157 | pixel clock is converted from KHz to Hz */ |
| Line 159... | Line 158... | ||
| 159 | dsi_clk_khz = DIV_ROUND_CLOSEST(mode->clock * bpp, lane_count); |
158 | dsi_clk_khz = DIV_ROUND_CLOSEST(pclk * bpp, lane_count); |
| 160 | 159 | ||
| Line 161... | Line 160... | ||
| 161 | return dsi_clk_khz; |
160 | return dsi_clk_khz; |
| Line 226... | Line 225... | ||
| 226 | * sharing PLLs with two DSI outputs. |
225 | * sharing PLLs with two DSI outputs. |
| 227 | */ |
226 | */ |
| 228 | static void vlv_configure_dsi_pll(struct intel_encoder *encoder) |
227 | static void vlv_configure_dsi_pll(struct intel_encoder *encoder) |
| 229 | { |
228 | { |
| 230 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
229 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
| 231 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); |
- | |
| 232 | const struct drm_display_mode *mode = &intel_crtc->config.adjusted_mode; |
- | |
| 233 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
230 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
| 234 | int ret; |
231 | int ret; |
| 235 | struct dsi_mnp dsi_mnp; |
232 | struct dsi_mnp dsi_mnp; |
| 236 | u32 dsi_clk; |
233 | u32 dsi_clk; |
| Line 237... | Line 234... | ||
| 237 | 234 | ||
| 238 | dsi_clk = dsi_clk_from_pclk(mode, intel_dsi->pixel_format, |
235 | dsi_clk = dsi_clk_from_pclk(intel_dsi->pclk, intel_dsi->pixel_format, |
| Line 239... | Line 236... | ||
| 239 | intel_dsi->lane_count); |
236 | intel_dsi->lane_count); |
| 240 | 237 | ||
| 241 | ret = dsi_calc_mnp(dsi_clk, &dsi_mnp); |
238 | ret = dsi_calc_mnp(dsi_clk, &dsi_mnp); |