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| Rev 4560 | Rev 5060 | ||
|---|---|---|---|
| Line 24... | Line 24... | ||
| 24 | */ |
24 | */ |
| Line 25... | Line 25... | ||
| 25 | 25 | ||
| 26 | #include |
26 | #include |
| 27 | #include |
27 | #include |
| 28 | #include |
28 | #include |
| 29 | #include |
29 | #include |
| 30 | #include "i915_drv.h" |
30 | #include "i915_drv.h" |
| 31 | #include "intel_drv.h" |
31 | #include "intel_drv.h" |
| 32 | #include "intel_dsi.h" |
32 | #include "intel_dsi.h" |
| Line 387... | Line 387... | ||
| 387 | /* |
387 | /* |
| 388 | * send a video mode command |
388 | * send a video mode command |
| 389 | * |
389 | * |
| 390 | * XXX: commands with data in MIPI_DPI_DATA? |
390 | * XXX: commands with data in MIPI_DPI_DATA? |
| 391 | */ |
391 | */ |
| 392 | int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd) |
392 | int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs) |
| 393 | { |
393 | { |
| 394 | struct drm_encoder *encoder = &intel_dsi->base.base; |
394 | struct drm_encoder *encoder = &intel_dsi->base.base; |
| 395 | struct drm_device *dev = encoder->dev; |
395 | struct drm_device *dev = encoder->dev; |
| 396 | struct drm_i915_private *dev_priv = dev->dev_private; |
396 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 397 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
397 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
| 398 | enum pipe pipe = intel_crtc->pipe; |
398 | enum pipe pipe = intel_crtc->pipe; |
| 399 | u32 mask; |
399 | u32 mask; |
| Line 400... | Line 400... | ||
| 400 | 400 | ||
| 401 | /* XXX: pipe, hs */ |
401 | /* XXX: pipe, hs */ |
| 402 | if (intel_dsi->hs) |
402 | if (hs) |
| 403 | cmd &= ~DPI_LP_MODE; |
403 | cmd &= ~DPI_LP_MODE; |
| 404 | else |
404 | else |
| Line 405... | Line -... | ||
| 405 | cmd |= DPI_LP_MODE; |
- | |
| 406 | - | ||
| 407 | /* DPI virtual channel?! */ |
- | |
| 408 | - | ||
| 409 | mask = DPI_FIFO_EMPTY; |
- | |
| 410 | if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(pipe)) & mask) == mask, 50)) |
- | |
| 411 | DRM_ERROR("Timeout waiting for DPI FIFO empty.\n"); |
405 | cmd |= DPI_LP_MODE; |
| 412 | 406 | ||
| Line 413... | Line 407... | ||
| 413 | /* clear bit */ |
407 | /* clear bit */ |
| 414 | I915_WRITE(MIPI_INTR_STAT(pipe), SPL_PKT_SENT_INTERRUPT); |
408 | I915_WRITE(MIPI_INTR_STAT(pipe), SPL_PKT_SENT_INTERRUPT); |
| Line 423... | Line 417... | ||
| 423 | if (wait_for((I915_READ(MIPI_INTR_STAT(pipe)) & mask) == mask, 100)) |
417 | if (wait_for((I915_READ(MIPI_INTR_STAT(pipe)) & mask) == mask, 100)) |
| 424 | DRM_ERROR("Video mode command 0x%08x send failed.\n", cmd); |
418 | DRM_ERROR("Video mode command 0x%08x send failed.\n", cmd); |
| Line 425... | Line 419... | ||
| 425 | 419 | ||
| 426 | return 0; |
420 | return 0; |
| - | 421 | } |
|
| - | 422 | ||
| - | 423 | void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi) |
|
| - | 424 | { |
|
| - | 425 | struct drm_encoder *encoder = &intel_dsi->base.base; |
|
| - | 426 | struct drm_device *dev = encoder->dev; |
|
| - | 427 | struct drm_i915_private *dev_priv = dev->dev_private; |
|
| - | 428 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
|
| - | 429 | enum pipe pipe = intel_crtc->pipe; |
|
| - | 430 | u32 mask; |
|
| - | 431 | ||
| - | 432 | mask = LP_CTRL_FIFO_EMPTY | HS_CTRL_FIFO_EMPTY | |
|
| - | 433 | LP_DATA_FIFO_EMPTY | HS_DATA_FIFO_EMPTY; |
|
| - | 434 | ||
| - | 435 | if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(pipe)) & mask) == mask, 100)) |
|
| - | 436 | DRM_ERROR("DPI FIFOs are not empty\n"); |
|