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Rev 3482 | Rev 3746 | ||
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Line 33... | Line 33... | ||
33 | #include |
33 | #include |
34 | #include |
34 | #include |
Line 35... | Line 35... | ||
35 | 35 | ||
Line -... | Line 36... | ||
- | 36 | #define KBUILD_MODNAME "i915.dll" |
|
36 | #define KBUILD_MODNAME "i915.dll" |
37 | |
Line -... | Line 38... | ||
- | 38 | ||
- | 39 | #define cpu_relax() asm volatile("rep; nop") |
|
- | 40 | ||
- | 41 | /** |
|
- | 42 | * _wait_for - magic (register) wait macro |
|
- | 43 | * |
|
- | 44 | * Does the right thing for modeset paths when run under kdgb or similar atomic |
|
- | 45 | * contexts. Note that it's important that we check the condition again after |
|
37 | 46 | * having timed out, since the timeout could be due to preemption or similar and |
|
38 | #define cpu_relax() asm volatile("rep; nop") |
47 | * we've never had a chance to check the condition before the timeout. |
39 | 48 | */ |
|
40 | #define _wait_for(COND, MS, W) ({ \ |
49 | #define _wait_for(COND, MS, W) ({ \ |
41 | unsigned long timeout__ = GetTimerTicks() + msecs_to_jiffies(MS); \ |
50 | unsigned long timeout__ = GetTimerTicks() + msecs_to_jiffies(MS); \ |
- | 51 | int ret__ = 0; \ |
|
42 | int ret__ = 0; \ |
52 | while (!(COND)) { \ |
43 | while (!(COND)) { \ |
53 | if (time_after(GetTimerTicks(), timeout__)) { \ |
44 | if (time_after(GetTimerTicks(), timeout__)) { \ |
54 | if (!(COND)) \ |
45 | ret__ = -ETIMEDOUT; \ |
55 | ret__ = -ETIMEDOUT; \ |
46 | break; \ |
56 | break; \ |
Line 110... | Line 120... | ||
110 | #define INTEL_DVO_CHIP_NONE 0 |
120 | #define INTEL_DVO_CHIP_NONE 0 |
111 | #define INTEL_DVO_CHIP_LVDS 1 |
121 | #define INTEL_DVO_CHIP_LVDS 1 |
112 | #define INTEL_DVO_CHIP_TMDS 2 |
122 | #define INTEL_DVO_CHIP_TMDS 2 |
113 | #define INTEL_DVO_CHIP_TVOUT 4 |
123 | #define INTEL_DVO_CHIP_TVOUT 4 |
Line 114... | Line -... | ||
114 | - | ||
115 | /* drm_display_mode->private_flags */ |
- | |
116 | #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0) |
- | |
117 | #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT) |
- | |
118 | #define INTEL_MODE_DP_FORCE_6BPC (0x10) |
- | |
119 | /* This flag must be set by the encoder's mode_fixup if it changes the crtc |
- | |
120 | * timings in the mode to prevent the crtc fixup from overwriting them. |
- | |
121 | * Currently only lvds needs that. */ |
- | |
122 | #define INTEL_MODE_CRTC_TIMINGS_SET (0x20) |
- | |
123 | /* |
- | |
124 | * Set when limited 16-235 (as opposed to full 0-255) RGB color range is |
- | |
125 | * to be used. |
- | |
126 | */ |
- | |
127 | #define INTEL_MODE_LIMITED_COLOR_RANGE (0x40) |
- | |
128 | - | ||
129 | static inline void |
- | |
130 | intel_mode_set_pixel_multiplier(struct drm_display_mode *mode, |
- | |
131 | int multiplier) |
- | |
132 | { |
- | |
133 | mode->clock *= multiplier; |
- | |
134 | mode->private_flags |= multiplier; |
- | |
135 | } |
- | |
136 | - | ||
137 | static inline int |
- | |
138 | intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode) |
- | |
139 | { |
- | |
140 | return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT; |
- | |
141 | } |
- | |
142 | 124 | ||
143 | struct intel_framebuffer { |
125 | struct intel_framebuffer { |
144 | struct drm_framebuffer base; |
126 | struct drm_framebuffer base; |
145 | struct drm_i915_gem_object *obj; |
127 | struct drm_i915_gem_object *obj; |
Line 167... | Line 149... | ||
167 | * simple flag is enough to compute the possible_clones mask. |
149 | * simple flag is enough to compute the possible_clones mask. |
168 | */ |
150 | */ |
169 | bool cloneable; |
151 | bool cloneable; |
170 | bool connectors_active; |
152 | bool connectors_active; |
171 | void (*hot_plug)(struct intel_encoder *); |
153 | void (*hot_plug)(struct intel_encoder *); |
- | 154 | bool (*compute_config)(struct intel_encoder *, |
|
- | 155 | struct intel_crtc_config *); |
|
172 | void (*pre_pll_enable)(struct intel_encoder *); |
156 | void (*pre_pll_enable)(struct intel_encoder *); |
173 | void (*pre_enable)(struct intel_encoder *); |
157 | void (*pre_enable)(struct intel_encoder *); |
174 | void (*enable)(struct intel_encoder *); |
158 | void (*enable)(struct intel_encoder *); |
- | 159 | void (*mode_set)(struct intel_encoder *intel_encoder); |
|
175 | void (*disable)(struct intel_encoder *); |
160 | void (*disable)(struct intel_encoder *); |
176 | void (*post_disable)(struct intel_encoder *); |
161 | void (*post_disable)(struct intel_encoder *); |
177 | /* Read out the current hw state of this connector, returning true if |
162 | /* Read out the current hw state of this connector, returning true if |
178 | * the encoder is active. If the encoder is enabled it also set the pipe |
163 | * the encoder is active. If the encoder is enabled it also set the pipe |
179 | * it is connected to in the pipe parameter. */ |
164 | * it is connected to in the pipe parameter. */ |
180 | bool (*get_hw_state)(struct intel_encoder *, enum pipe *pipe); |
165 | bool (*get_hw_state)(struct intel_encoder *, enum pipe *pipe); |
181 | int crtc_mask; |
166 | int crtc_mask; |
- | 167 | enum hpd_pin hpd_pin; |
|
182 | }; |
168 | }; |
Line 183... | Line 169... | ||
183 | 169 | ||
184 | struct intel_panel { |
170 | struct intel_panel { |
185 | struct drm_display_mode *fixed_mode; |
171 | struct drm_display_mode *fixed_mode; |
Line 206... | Line 192... | ||
206 | /* Panel info for eDP and LVDS */ |
192 | /* Panel info for eDP and LVDS */ |
207 | struct intel_panel panel; |
193 | struct intel_panel panel; |
Line 208... | Line 194... | ||
208 | 194 | ||
209 | /* Cached EDID for eDP and LVDS. May hold ERR_PTR for invalid EDID. */ |
195 | /* Cached EDID for eDP and LVDS. May hold ERR_PTR for invalid EDID. */ |
- | 196 | struct edid *edid; |
|
- | 197 | ||
- | 198 | /* since POLL and HPD connectors may use the same HPD line keep the native |
|
- | 199 | state of connector->polled in case hotplug storm detection changes it */ |
|
- | 200 | u8 polled; |
|
- | 201 | }; |
|
- | 202 | ||
- | 203 | struct intel_crtc_config { |
|
- | 204 | struct drm_display_mode requested_mode; |
|
- | 205 | struct drm_display_mode adjusted_mode; |
|
- | 206 | /* This flag must be set by the encoder's compute_config callback if it |
|
- | 207 | * changes the crtc timings in the mode to prevent the crtc fixup from |
|
- | 208 | * overwriting them. Currently only lvds needs that. */ |
|
- | 209 | bool timings_set; |
|
- | 210 | /* Whether to set up the PCH/FDI. Note that we never allow sharing |
|
- | 211 | * between pch encoders and cpu encoders. */ |
|
- | 212 | bool has_pch_encoder; |
|
- | 213 | ||
- | 214 | /* CPU Transcoder for the pipe. Currently this can only differ from the |
|
- | 215 | * pipe on Haswell (where we have a special eDP transcoder). */ |
|
- | 216 | enum transcoder cpu_transcoder; |
|
- | 217 | ||
- | 218 | /* |
|
- | 219 | * Use reduced/limited/broadcast rbg range, compressing from the full |
|
- | 220 | * range fed into the crtcs. |
|
- | 221 | */ |
|
- | 222 | bool limited_color_range; |
|
- | 223 | ||
- | 224 | /* DP has a bunch of special case unfortunately, so mark the pipe |
|
- | 225 | * accordingly. */ |
|
- | 226 | bool has_dp_encoder; |
|
- | 227 | bool dither; |
|
- | 228 | ||
- | 229 | /* Controls for the clock computation, to override various stages. */ |
|
- | 230 | bool clock_set; |
|
- | 231 | ||
- | 232 | /* Settings for the intel dpll used on pretty much everything but |
|
- | 233 | * haswell. */ |
|
- | 234 | struct dpll { |
|
- | 235 | unsigned n; |
|
- | 236 | unsigned m1, m2; |
|
- | 237 | unsigned p1, p2; |
|
- | 238 | } dpll; |
|
- | 239 | ||
- | 240 | int pipe_bpp; |
|
- | 241 | struct intel_link_m_n dp_m_n; |
|
- | 242 | /** |
|
- | 243 | * This is currently used by DP and HDMI encoders since those can have a |
|
- | 244 | * target pixel clock != the port link clock (which is currently stored |
|
- | 245 | * in adjusted_mode->clock). |
|
- | 246 | */ |
|
- | 247 | int pixel_target_clock; |
|
- | 248 | /* Used by SDVO (and if we ever fix it, HDMI). */ |
|
210 | struct edid *edid; |
249 | unsigned pixel_multiplier; |
Line 211... | Line 250... | ||
211 | }; |
250 | }; |
212 | 251 | ||
213 | struct intel_crtc { |
252 | struct intel_crtc { |
214 | struct drm_crtc base; |
253 | struct drm_crtc base; |
215 | enum pipe pipe; |
- | |
216 | enum plane plane; |
254 | enum pipe pipe; |
217 | enum transcoder cpu_transcoder; |
255 | enum plane plane; |
218 | u8 lut_r[256], lut_g[256], lut_b[256]; |
256 | u8 lut_r[256], lut_g[256], lut_b[256]; |
219 | /* |
257 | /* |
220 | * Whether the crtc and the connected output pipeline is active. Implies |
258 | * Whether the crtc and the connected output pipeline is active. Implies |
Line 239... | Line 277... | ||
239 | struct drm_i915_gem_object *cursor_bo; |
277 | struct drm_i915_gem_object *cursor_bo; |
240 | uint32_t cursor_addr; |
278 | uint32_t cursor_addr; |
241 | int16_t cursor_x, cursor_y; |
279 | int16_t cursor_x, cursor_y; |
242 | int16_t cursor_width, cursor_height; |
280 | int16_t cursor_width, cursor_height; |
243 | bool cursor_visible; |
281 | bool cursor_visible; |
- | 282 | ||
244 | unsigned int bpp; |
283 | struct intel_crtc_config config; |
Line 245... | Line 284... | ||
245 | 284 | ||
246 | /* We can share PLLs across outputs if the timings match */ |
285 | /* We can share PLLs across outputs if the timings match */ |
247 | struct intel_pch_pll *pch_pll; |
286 | struct intel_pch_pll *pch_pll; |
Line 251... | Line 290... | ||
251 | unsigned int reset_counter; |
290 | unsigned int reset_counter; |
252 | }; |
291 | }; |
Line 253... | Line 292... | ||
253 | 292 | ||
254 | struct intel_plane { |
293 | struct intel_plane { |
- | 294 | struct drm_plane base; |
|
255 | struct drm_plane base; |
295 | int plane; |
256 | enum pipe pipe; |
296 | enum pipe pipe; |
257 | struct drm_i915_gem_object *obj; |
297 | struct drm_i915_gem_object *obj; |
258 | bool can_scale; |
298 | bool can_scale; |
259 | int max_downscale; |
299 | int max_downscale; |
- | 300 | u32 lut_r[1024], lut_g[1024], lut_b[1024]; |
|
- | 301 | int crtc_x, crtc_y; |
|
- | 302 | unsigned int crtc_w, crtc_h; |
|
- | 303 | uint32_t src_x, src_y; |
|
260 | u32 lut_r[1024], lut_g[1024], lut_b[1024]; |
304 | uint32_t src_w, src_h; |
261 | void (*update_plane)(struct drm_plane *plane, |
305 | void (*update_plane)(struct drm_plane *plane, |
262 | struct drm_framebuffer *fb, |
306 | struct drm_framebuffer *fb, |
263 | struct drm_i915_gem_object *obj, |
307 | struct drm_i915_gem_object *obj, |
264 | int crtc_x, int crtc_y, |
308 | int crtc_x, int crtc_y, |
Line 356... | Line 400... | ||
356 | uint8_t payload[27]; |
400 | uint8_t payload[27]; |
357 | } __attribute__ ((packed)) body; |
401 | } __attribute__ ((packed)) body; |
358 | } __attribute__((packed)); |
402 | } __attribute__((packed)); |
Line 359... | Line 403... | ||
359 | 403 | ||
360 | struct intel_hdmi { |
404 | struct intel_hdmi { |
361 | u32 sdvox_reg; |
405 | u32 hdmi_reg; |
362 | int ddc_bus; |
406 | int ddc_bus; |
363 | uint32_t color_range; |
407 | uint32_t color_range; |
364 | bool color_range_auto; |
408 | bool color_range_auto; |
365 | bool has_hdmi_sink; |
409 | bool has_hdmi_sink; |
Line 375... | Line 419... | ||
375 | #define DP_MAX_DOWNSTREAM_PORTS 0x10 |
419 | #define DP_MAX_DOWNSTREAM_PORTS 0x10 |
376 | #define DP_LINK_CONFIGURATION_SIZE 9 |
420 | #define DP_LINK_CONFIGURATION_SIZE 9 |
Line 377... | Line 421... | ||
377 | 421 | ||
378 | struct intel_dp { |
422 | struct intel_dp { |
- | 423 | uint32_t output_reg; |
|
379 | uint32_t output_reg; |
424 | uint32_t aux_ch_ctl_reg; |
380 | uint32_t DP; |
425 | uint32_t DP; |
381 | uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]; |
426 | uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]; |
382 | bool has_audio; |
427 | bool has_audio; |
383 | enum hdmi_force_audio force_audio; |
428 | enum hdmi_force_audio force_audio; |
Line 452... | Line 497... | ||
452 | extern void intel_attach_force_audio_property(struct drm_connector *connector); |
497 | extern void intel_attach_force_audio_property(struct drm_connector *connector); |
453 | extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector); |
498 | extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector); |
Line 454... | Line 499... | ||
454 | 499 | ||
455 | extern void intel_crt_init(struct drm_device *dev); |
500 | extern void intel_crt_init(struct drm_device *dev); |
456 | extern void intel_hdmi_init(struct drm_device *dev, |
501 | extern void intel_hdmi_init(struct drm_device *dev, |
457 | int sdvox_reg, enum port port); |
502 | int hdmi_reg, enum port port); |
458 | extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port, |
503 | extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port, |
459 | struct intel_connector *intel_connector); |
504 | struct intel_connector *intel_connector); |
460 | extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder); |
505 | extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder); |
461 | extern bool intel_hdmi_mode_fixup(struct drm_encoder *encoder, |
- | |
462 | const struct drm_display_mode *mode, |
506 | extern bool intel_hdmi_compute_config(struct intel_encoder *encoder, |
463 | struct drm_display_mode *adjusted_mode); |
507 | struct intel_crtc_config *pipe_config); |
464 | extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if); |
508 | extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if); |
465 | extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, |
509 | extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, |
466 | bool is_sdvob); |
510 | bool is_sdvob); |
467 | extern void intel_dvo_init(struct drm_device *dev); |
511 | extern void intel_dvo_init(struct drm_device *dev); |
Line 473... | Line 517... | ||
473 | extern bool intel_is_dual_link_lvds(struct drm_device *dev); |
517 | extern bool intel_is_dual_link_lvds(struct drm_device *dev); |
474 | extern void intel_dp_init(struct drm_device *dev, int output_reg, |
518 | extern void intel_dp_init(struct drm_device *dev, int output_reg, |
475 | enum port port); |
519 | enum port port); |
476 | extern void intel_dp_init_connector(struct intel_digital_port *intel_dig_port, |
520 | extern void intel_dp_init_connector(struct intel_digital_port *intel_dig_port, |
477 | struct intel_connector *intel_connector); |
521 | struct intel_connector *intel_connector); |
478 | void |
- | |
479 | intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, |
- | |
480 | struct drm_display_mode *adjusted_mode); |
- | |
481 | extern void intel_dp_init_link_config(struct intel_dp *intel_dp); |
522 | extern void intel_dp_init_link_config(struct intel_dp *intel_dp); |
482 | extern void intel_dp_start_link_train(struct intel_dp *intel_dp); |
523 | extern void intel_dp_start_link_train(struct intel_dp *intel_dp); |
483 | extern void intel_dp_complete_link_train(struct intel_dp *intel_dp); |
524 | extern void intel_dp_complete_link_train(struct intel_dp *intel_dp); |
- | 525 | extern void intel_dp_stop_link_train(struct intel_dp *intel_dp); |
|
484 | extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); |
526 | extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); |
485 | extern void intel_dp_encoder_destroy(struct drm_encoder *encoder); |
527 | extern void intel_dp_encoder_destroy(struct drm_encoder *encoder); |
486 | extern void intel_dp_check_link_status(struct intel_dp *intel_dp); |
528 | extern void intel_dp_check_link_status(struct intel_dp *intel_dp); |
487 | extern bool intel_dp_mode_fixup(struct drm_encoder *encoder, |
529 | extern bool intel_dp_compute_config(struct intel_encoder *encoder, |
488 | const struct drm_display_mode *mode, |
- | |
489 | struct drm_display_mode *adjusted_mode); |
530 | struct intel_crtc_config *pipe_config); |
490 | extern bool intel_dpd_is_edp(struct drm_device *dev); |
531 | extern bool intel_dpd_is_edp(struct drm_device *dev); |
491 | extern void ironlake_edp_backlight_on(struct intel_dp *intel_dp); |
532 | extern void ironlake_edp_backlight_on(struct intel_dp *intel_dp); |
492 | extern void ironlake_edp_backlight_off(struct intel_dp *intel_dp); |
533 | extern void ironlake_edp_backlight_off(struct intel_dp *intel_dp); |
493 | extern void ironlake_edp_panel_on(struct intel_dp *intel_dp); |
534 | extern void ironlake_edp_panel_on(struct intel_dp *intel_dp); |
494 | extern void ironlake_edp_panel_off(struct intel_dp *intel_dp); |
535 | extern void ironlake_edp_panel_off(struct intel_dp *intel_dp); |
495 | extern void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp); |
536 | extern void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp); |
496 | extern void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync); |
537 | extern void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync); |
497 | extern void intel_edp_link_config(struct intel_encoder *, int *, int *); |
- | |
498 | extern int intel_edp_target_clock(struct intel_encoder *, |
- | |
499 | struct drm_display_mode *mode); |
- | |
500 | extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder); |
538 | extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder); |
501 | extern int intel_plane_init(struct drm_device *dev, enum pipe pipe); |
539 | extern int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane); |
502 | extern void intel_flush_display_plane(struct drm_i915_private *dev_priv, |
540 | extern void intel_flush_display_plane(struct drm_i915_private *dev_priv, |
503 | enum plane plane); |
541 | enum plane plane); |
Line 504... | Line 542... | ||
504 | 542 | ||
505 | /* intel_panel.c */ |
543 | /* intel_panel.c */ |
Line 540... | Line 578... | ||
540 | extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode); |
578 | extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode); |
541 | extern bool intel_encoder_check_is_cloned(struct intel_encoder *encoder); |
579 | extern bool intel_encoder_check_is_cloned(struct intel_encoder *encoder); |
542 | extern void intel_connector_dpms(struct drm_connector *, int mode); |
580 | extern void intel_connector_dpms(struct drm_connector *, int mode); |
543 | extern bool intel_connector_get_hw_state(struct intel_connector *connector); |
581 | extern bool intel_connector_get_hw_state(struct intel_connector *connector); |
544 | extern void intel_modeset_check_state(struct drm_device *dev); |
582 | extern void intel_modeset_check_state(struct drm_device *dev); |
- | 583 | extern void intel_plane_restore(struct drm_plane *plane); |
|
Line 545... | Line 584... | ||
545 | 584 | ||
546 | 585 | ||
547 | static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector) |
586 | static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector) |
Line 645... | Line 684... | ||
645 | 684 | ||
646 | extern void intel_init_clock_gating(struct drm_device *dev); |
685 | extern void intel_init_clock_gating(struct drm_device *dev); |
647 | extern void intel_write_eld(struct drm_encoder *encoder, |
686 | extern void intel_write_eld(struct drm_encoder *encoder, |
648 | struct drm_display_mode *mode); |
687 | struct drm_display_mode *mode); |
- | 688 | extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe); |
|
- | 689 | extern void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc, |
|
- | 690 | struct intel_link_m_n *m_n); |
|
- | 691 | extern void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc, |
|
649 | extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe); |
692 | struct intel_link_m_n *m_n); |
650 | extern void intel_prepare_ddi(struct drm_device *dev); |
693 | extern void intel_prepare_ddi(struct drm_device *dev); |
651 | extern void hsw_fdi_link_train(struct drm_crtc *crtc); |
694 | extern void hsw_fdi_link_train(struct drm_crtc *crtc); |
Line 652... | Line 695... | ||
652 | extern void intel_ddi_init(struct drm_device *dev, enum port port); |
695 | extern void intel_ddi_init(struct drm_device *dev, enum port port); |
Line 679... | Line 722... | ||
679 | extern void intel_update_fbc(struct drm_device *dev); |
722 | extern void intel_update_fbc(struct drm_device *dev); |
680 | /* IPS */ |
723 | /* IPS */ |
681 | extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv); |
724 | extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv); |
682 | extern void intel_gpu_ips_teardown(void); |
725 | extern void intel_gpu_ips_teardown(void); |
Line -... | Line 726... | ||
- | 726 | ||
683 | 727 | extern bool intel_using_power_well(struct drm_device *dev); |
|
684 | extern void intel_init_power_well(struct drm_device *dev); |
728 | extern void intel_init_power_well(struct drm_device *dev); |
685 | extern void intel_set_power_well(struct drm_device *dev, bool enable); |
729 | extern void intel_set_power_well(struct drm_device *dev, bool enable); |
686 | extern void intel_enable_gt_powersave(struct drm_device *dev); |
730 | extern void intel_enable_gt_powersave(struct drm_device *dev); |
687 | extern void intel_disable_gt_powersave(struct drm_device *dev); |
731 | extern void intel_disable_gt_powersave(struct drm_device *dev); |
Line 690... | Line 734... | ||
690 | 734 | ||
691 | extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder, |
735 | extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder, |
692 | enum pipe *pipe); |
736 | enum pipe *pipe); |
693 | extern int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv); |
737 | extern int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv); |
694 | extern void intel_ddi_pll_init(struct drm_device *dev); |
738 | extern void intel_ddi_pll_init(struct drm_device *dev); |
695 | extern void intel_ddi_enable_pipe_func(struct drm_crtc *crtc); |
739 | extern void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc); |
696 | extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv, |
740 | extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv, |
697 | enum transcoder cpu_transcoder); |
741 | enum transcoder cpu_transcoder); |
698 | extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc); |
742 | extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc); |
699 | extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc); |
743 | extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc); |
Line 704... | Line 748... | ||
704 | extern void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder); |
748 | extern void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder); |
705 | extern bool |
749 | extern bool |
706 | intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); |
750 | intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); |
707 | extern void intel_ddi_fdi_disable(struct drm_crtc *crtc); |
751 | extern void intel_ddi_fdi_disable(struct drm_crtc *crtc); |
Line -... | Line 752... | ||
- | 752 | ||
- | 753 | extern void intel_display_handle_reset(struct drm_device *dev); |
|
708 | 754 |