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24 | */ |
24 | */ |
25 | #ifndef __INTEL_DRV_H__ |
25 | #ifndef __INTEL_DRV_H__ |
26 | #define __INTEL_DRV_H__ |
26 | #define __INTEL_DRV_H__ |
Line 27... | Line 27... | ||
27 | 27 | ||
28 | #include |
28 | #include |
29 | #include "i915_drm.h" |
29 | #include |
30 | #include "i915_drv.h" |
30 | #include "i915_drv.h" |
31 | #include "drm_crtc.h" |
31 | #include |
32 | #include "drm_crtc_helper.h" |
32 | #include |
33 | #include "drm_fb_helper.h" |
33 | #include |
- | 34 | #include |
|
- | 35 | ||
Line 34... | Line 36... | ||
34 | #include |
36 | #define cpu_relax() asm volatile("rep; nop") |
- | 37 | ||
- | 38 | #define _wait_for(COND, MS, W) ({ \ |
|
- | 39 | unsigned long timeout__ = GetTimerTicks() + msecs_to_jiffies(MS); \ |
|
- | 40 | int ret__ = 0; \ |
|
- | 41 | while (!(COND)) { \ |
|
- | 42 | if (time_after(GetTimerTicks(), timeout__)) { \ |
|
- | 43 | ret__ = -ETIMEDOUT; \ |
|
- | 44 | break; \ |
|
- | 45 | } \ |
|
- | 46 | if (W ) { \ |
|
- | 47 | msleep(W); \ |
|
- | 48 | } else { \ |
|
- | 49 | cpu_relax(); \ |
|
- | 50 | } \ |
|
- | 51 | } \ |
|
- | 52 | ret__; \ |
|
- | 53 | }) |
|
35 | 54 | ||
36 | #define _wait_for(COND, MS, W) ({ \ |
55 | #define wait_for_atomic_us(COND, US) ({ \ |
37 | unsigned long timeout__ = jiffies + msecs_to_jiffies(MS); \ |
56 | unsigned long timeout__ = GetTimerTicks() + usecs_to_jiffies(US); \ |
38 | int ret__ = 0; \ |
57 | int ret__ = 0; \ |
39 | while (!(COND)) { \ |
58 | while (!(COND)) { \ |
40 | if (time_after(jiffies, timeout__)) { \ |
59 | if (time_after(GetTimerTicks(), timeout__)) { \ |
41 | ret__ = -ETIMEDOUT; \ |
60 | ret__ = -ETIMEDOUT; \ |
42 | break; \ |
61 | break; \ |
43 | } \ |
62 | } \ |
44 | if (W) msleep(W); \ |
63 | cpu_relax(); \ |
45 | } \ |
64 | } \ |
Line 46... | Line 65... | ||
46 | ret__; \ |
65 | ret__; \ |
Line 111... | Line 130... | ||
111 | 130 | ||
112 | /* drm_display_mode->private_flags */ |
131 | /* drm_display_mode->private_flags */ |
113 | #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0) |
132 | #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0) |
114 | #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT) |
133 | #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT) |
- | 134 | #define INTEL_MODE_DP_FORCE_6BPC (0x10) |
|
- | 135 | /* This flag must be set by the encoder's mode_fixup if it changes the crtc |
|
- | 136 | * timings in the mode to prevent the crtc fixup from overwriting them. |
|
- | 137 | * Currently only lvds needs that. */ |
|
Line 115... | Line 138... | ||
115 | #define INTEL_MODE_DP_FORCE_6BPC (0x10) |
138 | #define INTEL_MODE_CRTC_TIMINGS_SET (0x20) |
116 | 139 | ||
117 | static inline void |
140 | static inline void |
118 | intel_mode_set_pixel_multiplier(struct drm_display_mode *mode, |
141 | intel_mode_set_pixel_multiplier(struct drm_display_mode *mode, |
Line 140... | Line 163... | ||
140 | struct drm_display_mode *our_mode; |
163 | struct drm_display_mode *our_mode; |
141 | }; |
164 | }; |
Line 142... | Line 165... | ||
142 | 165 | ||
143 | struct intel_encoder { |
166 | struct intel_encoder { |
- | 167 | struct drm_encoder base; |
|
- | 168 | /* |
|
- | 169 | * The new crtc this encoder will be driven from. Only differs from |
|
- | 170 | * base->crtc while a modeset is in progress. |
|
- | 171 | */ |
|
- | 172 | struct intel_crtc *new_crtc; |
|
144 | struct drm_encoder base; |
173 | |
145 | int type; |
174 | int type; |
- | 175 | bool needs_tv_clock; |
|
- | 176 | /* |
|
- | 177 | * Intel hw has only one MUX where encoders could be clone, hence a |
|
- | 178 | * simple flag is enough to compute the possible_clones mask. |
|
- | 179 | */ |
|
- | 180 | bool cloneable; |
|
146 | bool needs_tv_clock; |
181 | bool connectors_active; |
- | 182 | void (*hot_plug)(struct intel_encoder *); |
|
- | 183 | void (*pre_enable)(struct intel_encoder *); |
|
- | 184 | void (*enable)(struct intel_encoder *); |
|
- | 185 | void (*disable)(struct intel_encoder *); |
|
- | 186 | void (*post_disable)(struct intel_encoder *); |
|
- | 187 | /* Read out the current hw state of this connector, returning true if |
|
- | 188 | * the encoder is active. If the encoder is enabled it also set the pipe |
|
- | 189 | * it is connected to in the pipe parameter. */ |
|
147 | void (*hot_plug)(struct intel_encoder *); |
190 | bool (*get_hw_state)(struct intel_encoder *, enum pipe *pipe); |
148 | int crtc_mask; |
- | |
149 | int clone_mask; |
191 | int crtc_mask; |
Line 150... | Line 192... | ||
150 | }; |
192 | }; |
151 | 193 | ||
- | 194 | struct intel_connector { |
|
- | 195 | struct drm_connector base; |
|
- | 196 | /* |
|
152 | struct intel_connector { |
197 | * The fixed encoder this connector is connected to. |
- | 198 | */ |
|
- | 199 | struct intel_encoder *encoder; |
|
- | 200 | ||
- | 201 | /* |
|
- | 202 | * The new encoder this connector will be driven. Only differs from |
|
- | 203 | * encoder while a modeset is in progress. |
|
- | 204 | */ |
|
- | 205 | struct intel_encoder *new_encoder; |
|
- | 206 | ||
- | 207 | /* Reads out the current hw, returning true if the connector is enabled |
|
153 | struct drm_connector base; |
208 | * and active (i.e. dpms ON state). */ |
Line 154... | Line 209... | ||
154 | struct intel_encoder *encoder; |
209 | bool (*get_hw_state)(struct intel_connector *); |
155 | }; |
210 | }; |
156 | 211 | ||
157 | struct intel_crtc { |
212 | struct intel_crtc { |
158 | struct drm_crtc base; |
213 | struct drm_crtc base; |
159 | enum pipe pipe; |
214 | enum pipe pipe; |
160 | enum plane plane; |
215 | enum plane plane; |
161 | u8 lut_r[256], lut_g[256], lut_b[256]; |
216 | u8 lut_r[256], lut_g[256], lut_b[256]; |
162 | int dpms_mode; |
217 | /* |
- | 218 | * Whether the crtc and the connected output pipeline is active. Implies |
|
- | 219 | * that crtc->enabled is set, i.e. the current mode configuration has |
|
- | 220 | * some outputs connected to this crtc. |
|
163 | bool active; /* is the crtc on? independent of the dpms mode */ |
221 | */ |
164 | bool busy; /* is scanout buffer being updated frequently? */ |
222 | bool active; |
165 | struct timer_list idle_timer; |
223 | bool primary_disabled; /* is the crtc obscured by a plane? */ |
166 | bool lowfreq_avail; |
224 | bool lowfreq_avail; |
Line -... | Line 225... | ||
- | 225 | struct intel_overlay *overlay; |
|
- | 226 | struct intel_unpin_work *unpin_work; |
|
- | 227 | int fdi_lanes; |
|
- | 228 | ||
- | 229 | /* Display surface base address adjustement for pageflips. Note that on |
|
167 | struct intel_overlay *overlay; |
230 | * gen4+ this only adjusts up to a tile, offsets within a tile are |
168 | struct intel_unpin_work *unpin_work; |
231 | * handled in the hw itself (with the TILEOFF register). */ |
169 | int fdi_lanes; |
232 | unsigned long dspaddr_offset; |
170 | 233 | ||
171 | struct drm_i915_gem_object *cursor_bo; |
234 | struct drm_i915_gem_object *cursor_bo; |
172 | uint32_t cursor_addr; |
235 | uint32_t cursor_addr; |
Line 173... | Line 236... | ||
173 | int16_t cursor_x, cursor_y; |
236 | int16_t cursor_x, cursor_y; |
174 | int16_t cursor_width, cursor_height; |
237 | int16_t cursor_width, cursor_height; |
175 | bool cursor_visible; |
238 | bool cursor_visible; |
Line 176... | Line 239... | ||
176 | unsigned int bpp; |
239 | unsigned int bpp; |
177 | 240 | ||
178 | bool no_pll; /* tertiary pipe for IVB */ |
241 | /* We can share PLLs across outputs if the timings match */ |
179 | bool use_pll_a; |
242 | struct intel_pch_pll *pch_pll; |
180 | }; |
- | |
181 | 243 | }; |
|
182 | struct intel_plane { |
244 | |
183 | struct drm_plane base; |
245 | struct intel_plane { |
184 | enum pipe pipe; |
246 | struct drm_plane base; |
185 | struct drm_i915_gem_object *obj; |
247 | enum pipe pipe; |
Line 198... | Line 260... | ||
198 | struct drm_intel_sprite_colorkey *key); |
260 | struct drm_intel_sprite_colorkey *key); |
199 | void (*get_colorkey)(struct drm_plane *plane, |
261 | void (*get_colorkey)(struct drm_plane *plane, |
200 | struct drm_intel_sprite_colorkey *key); |
262 | struct drm_intel_sprite_colorkey *key); |
201 | }; |
263 | }; |
Line -... | Line 264... | ||
- | 264 | ||
- | 265 | struct intel_watermark_params { |
|
- | 266 | unsigned long fifo_size; |
|
- | 267 | unsigned long max_wm; |
|
- | 268 | unsigned long default_wm; |
|
- | 269 | unsigned long guard_size; |
|
- | 270 | unsigned long cacheline_size; |
|
- | 271 | }; |
|
- | 272 | ||
- | 273 | struct cxsr_latency { |
|
- | 274 | int is_desktop; |
|
- | 275 | int is_ddr3; |
|
- | 276 | unsigned long fsb_freq; |
|
- | 277 | unsigned long mem_freq; |
|
- | 278 | unsigned long display_sr; |
|
- | 279 | unsigned long display_hpll_disable; |
|
- | 280 | unsigned long cursor_sr; |
|
- | 281 | unsigned long cursor_hpll_disable; |
|
- | 282 | }; |
|
202 | 283 | ||
203 | #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) |
284 | #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) |
204 | #define to_intel_connector(x) container_of(x, struct intel_connector, base) |
285 | #define to_intel_connector(x) container_of(x, struct intel_connector, base) |
205 | #define to_intel_encoder(x) container_of(x, struct intel_encoder, base) |
286 | #define to_intel_encoder(x) container_of(x, struct intel_encoder, base) |
206 | #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base) |
287 | #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base) |
Line 209... | Line 290... | ||
209 | #define DIP_HEADER_SIZE 5 |
290 | #define DIP_HEADER_SIZE 5 |
Line 210... | Line 291... | ||
210 | 291 | ||
211 | #define DIP_TYPE_AVI 0x82 |
292 | #define DIP_TYPE_AVI 0x82 |
212 | #define DIP_VERSION_AVI 0x2 |
293 | #define DIP_VERSION_AVI 0x2 |
- | 294 | #define DIP_LEN_AVI 13 |
|
- | 295 | #define DIP_AVI_PR_1 0 |
|
Line 213... | Line 296... | ||
213 | #define DIP_LEN_AVI 13 |
296 | #define DIP_AVI_PR_2 1 |
214 | 297 | ||
215 | #define DIP_TYPE_SPD 0x83 |
298 | #define DIP_TYPE_SPD 0x83 |
216 | #define DIP_VERSION_SPD 0x1 |
299 | #define DIP_VERSION_SPD 0x1 |
Line 242... | Line 325... | ||
242 | uint8_t C_M_R; |
325 | uint8_t C_M_R; |
243 | /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */ |
326 | /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */ |
244 | uint8_t ITC_EC_Q_SC; |
327 | uint8_t ITC_EC_Q_SC; |
245 | /* PB4 - VIC 6:0 */ |
328 | /* PB4 - VIC 6:0 */ |
246 | uint8_t VIC; |
329 | uint8_t VIC; |
247 | /* PB5 - PR 3:0 */ |
330 | /* PB5 - YQ 7:6, CN 5:4, PR 3:0 */ |
248 | uint8_t PR; |
331 | uint8_t YQ_CN_PR; |
249 | /* PB6 to PB13 */ |
332 | /* PB6 to PB13 */ |
250 | uint16_t top_bar_end; |
333 | uint16_t top_bar_end; |
251 | uint16_t bottom_bar_start; |
334 | uint16_t bottom_bar_start; |
252 | uint16_t left_bar_end; |
335 | uint16_t left_bar_end; |
253 | uint16_t right_bar_start; |
336 | uint16_t right_bar_start; |
254 | } avi; |
337 | } __attribute__ ((packed)) avi; |
255 | struct { |
338 | struct { |
256 | uint8_t vn[8]; |
339 | uint8_t vn[8]; |
257 | uint8_t pd[16]; |
340 | uint8_t pd[16]; |
258 | uint8_t sdi; |
341 | uint8_t sdi; |
259 | } spd; |
342 | } __attribute__ ((packed)) spd; |
260 | uint8_t payload[27]; |
343 | uint8_t payload[27]; |
261 | } __attribute__ ((packed)) body; |
344 | } __attribute__ ((packed)) body; |
262 | } __attribute__((packed)); |
345 | } __attribute__((packed)); |
Line -... | Line 346... | ||
- | 346 | ||
- | 347 | struct intel_hdmi { |
|
- | 348 | struct intel_encoder base; |
|
- | 349 | u32 sdvox_reg; |
|
- | 350 | int ddc_bus; |
|
- | 351 | int ddi_port; |
|
- | 352 | uint32_t color_range; |
|
- | 353 | bool has_hdmi_sink; |
|
- | 354 | bool has_audio; |
|
- | 355 | enum hdmi_force_audio force_audio; |
|
- | 356 | void (*write_infoframe)(struct drm_encoder *encoder, |
|
- | 357 | struct dip_infoframe *frame); |
|
- | 358 | void (*set_infoframes)(struct drm_encoder *encoder, |
|
- | 359 | struct drm_display_mode *adjusted_mode); |
|
- | 360 | }; |
|
- | 361 | ||
- | 362 | #define DP_RECEIVER_CAP_SIZE 0xf |
|
- | 363 | #define DP_MAX_DOWNSTREAM_PORTS 0x10 |
|
- | 364 | #define DP_LINK_CONFIGURATION_SIZE 9 |
|
- | 365 | ||
- | 366 | struct intel_dp { |
|
- | 367 | struct intel_encoder base; |
|
- | 368 | uint32_t output_reg; |
|
- | 369 | uint32_t DP; |
|
- | 370 | uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]; |
|
- | 371 | bool has_audio; |
|
- | 372 | enum hdmi_force_audio force_audio; |
|
- | 373 | enum port port; |
|
- | 374 | uint32_t color_range; |
|
- | 375 | uint8_t link_bw; |
|
- | 376 | uint8_t lane_count; |
|
- | 377 | uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; |
|
- | 378 | uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS]; |
|
- | 379 | struct i2c_adapter adapter; |
|
- | 380 | struct i2c_algo_dp_aux_data algo; |
|
- | 381 | bool is_pch_edp; |
|
- | 382 | uint8_t train_set[4]; |
|
- | 383 | int panel_power_up_delay; |
|
- | 384 | int panel_power_down_delay; |
|
- | 385 | int panel_power_cycle_delay; |
|
- | 386 | int backlight_on_delay; |
|
- | 387 | int backlight_off_delay; |
|
- | 388 | struct drm_display_mode *panel_fixed_mode; /* for eDP */ |
|
- | 389 | struct delayed_work panel_vdd_work; |
|
- | 390 | bool want_panel_vdd; |
|
- | 391 | struct edid *edid; /* cached EDID for eDP */ |
|
- | 392 | int edid_mode_count; |
|
- | 393 | }; |
|
263 | 394 | ||
264 | static inline struct drm_crtc * |
395 | static inline struct drm_crtc * |
265 | intel_get_crtc_for_pipe(struct drm_device *dev, int pipe) |
396 | intel_get_crtc_for_pipe(struct drm_device *dev, int pipe) |
266 | { |
397 | { |
267 | struct drm_i915_private *dev_priv = dev->dev_private; |
398 | struct drm_i915_private *dev_priv = dev->dev_private; |
Line 290... | Line 421... | ||
290 | struct drm_crtc *crtc; |
421 | struct drm_crtc *crtc; |
291 | struct drm_framebuffer *fb; |
422 | struct drm_framebuffer *fb; |
292 | int interval; |
423 | int interval; |
293 | }; |
424 | }; |
Line -... | Line 425... | ||
- | 425 | ||
- | 426 | int intel_connector_update_modes(struct drm_connector *connector, |
|
294 | 427 | struct edid *edid); |
|
295 | int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter); |
- | |
Line 296... | Line 428... | ||
296 | extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus); |
428 | int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter); |
297 | 429 | ||
Line 298... | Line 430... | ||
298 | extern void intel_attach_force_audio_property(struct drm_connector *connector); |
430 | extern void intel_attach_force_audio_property(struct drm_connector *connector); |
299 | extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector); |
431 | extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector); |
- | 432 | ||
- | 433 | extern void intel_crt_init(struct drm_device *dev); |
|
300 | 434 | extern void intel_hdmi_init(struct drm_device *dev, |
|
301 | extern void intel_crt_init(struct drm_device *dev); |
435 | int sdvox_reg, enum port port); |
- | 436 | extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder); |
|
302 | extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg); |
437 | extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if); |
303 | void intel_dip_infoframe_csum(struct dip_infoframe *avi_if); |
438 | extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, |
304 | extern bool intel_sdvo_init(struct drm_device *dev, int output_device); |
439 | bool is_sdvob); |
- | 440 | extern void intel_dvo_init(struct drm_device *dev); |
|
- | 441 | extern void intel_tv_init(struct drm_device *dev); |
|
305 | extern void intel_dvo_init(struct drm_device *dev); |
442 | extern void intel_mark_busy(struct drm_device *dev); |
306 | extern void intel_tv_init(struct drm_device *dev); |
443 | extern void intel_mark_idle(struct drm_device *dev); |
307 | extern void intel_mark_busy(struct drm_device *dev, |
444 | extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj); |
- | 445 | extern void intel_mark_fb_idle(struct drm_i915_gem_object *obj); |
|
308 | struct drm_i915_gem_object *obj); |
446 | extern bool intel_lvds_init(struct drm_device *dev); |
309 | extern bool intel_lvds_init(struct drm_device *dev); |
447 | extern void intel_dp_init(struct drm_device *dev, int output_reg, |
310 | extern void intel_dp_init(struct drm_device *dev, int dp_reg); |
448 | enum port port); |
311 | void |
449 | void |
312 | intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, |
450 | intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, |
- | 451 | struct drm_display_mode *adjusted_mode); |
|
- | 452 | extern bool intel_dpd_is_edp(struct drm_device *dev); |
|
313 | struct drm_display_mode *adjusted_mode); |
453 | extern void intel_edp_link_config(struct intel_encoder *, int *, int *); |
314 | extern bool intel_dpd_is_edp(struct drm_device *dev); |
454 | extern int intel_edp_target_clock(struct intel_encoder *, |
- | 455 | struct drm_display_mode *mode); |
|
- | 456 | extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder); |
|
Line 315... | Line 457... | ||
315 | extern void intel_edp_link_config(struct intel_encoder *, int *, int *); |
457 | extern int intel_plane_init(struct drm_device *dev, enum pipe pipe); |
316 | extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder); |
458 | extern void intel_flush_display_plane(struct drm_i915_private *dev_priv, |
317 | extern int intel_plane_init(struct drm_device *dev, enum pipe pipe); |
459 | enum plane plane); |
318 | 460 | ||
319 | /* intel_panel.c */ |
461 | /* intel_panel.c */ |
320 | extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, |
462 | extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, |
321 | struct drm_display_mode *adjusted_mode); |
463 | struct drm_display_mode *adjusted_mode); |
322 | extern void intel_pch_panel_fitting(struct drm_device *dev, |
464 | extern void intel_pch_panel_fitting(struct drm_device *dev, |
323 | int fitting_mode, |
- | |
324 | struct drm_display_mode *mode, |
465 | int fitting_mode, |
325 | struct drm_display_mode *adjusted_mode); |
466 | const struct drm_display_mode *mode, |
326 | extern u32 intel_panel_get_max_backlight(struct drm_device *dev); |
467 | struct drm_display_mode *adjusted_mode); |
- | 468 | extern u32 intel_panel_get_max_backlight(struct drm_device *dev); |
|
327 | extern u32 intel_panel_get_backlight(struct drm_device *dev); |
469 | extern void intel_panel_set_backlight(struct drm_device *dev, u32 level); |
328 | extern void intel_panel_set_backlight(struct drm_device *dev, u32 level); |
470 | extern int intel_panel_setup_backlight(struct drm_device *dev); |
329 | extern int intel_panel_setup_backlight(struct drm_device *dev); |
471 | extern void intel_panel_enable_backlight(struct drm_device *dev, |
Line -... | Line 472... | ||
- | 472 | enum pipe pipe); |
|
- | 473 | extern void intel_panel_disable_backlight(struct drm_device *dev); |
|
- | 474 | extern void intel_panel_destroy_backlight(struct drm_device *dev); |
|
- | 475 | extern enum drm_connector_status intel_panel_detect(struct drm_device *dev); |
|
- | 476 | ||
- | 477 | struct intel_set_config { |
|
- | 478 | struct drm_encoder **save_connector_encoders; |
|
- | 479 | struct drm_crtc **save_encoder_crtcs; |
|
- | 480 | ||
- | 481 | bool fb_changed; |
|
- | 482 | bool mode_changed; |
|
330 | extern void intel_panel_enable_backlight(struct drm_device *dev); |
483 | }; |
331 | extern void intel_panel_disable_backlight(struct drm_device *dev); |
484 | |
332 | extern void intel_panel_destroy_backlight(struct drm_device *dev); |
485 | extern bool intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode, |
333 | extern enum drm_connector_status intel_panel_detect(struct drm_device *dev); |
486 | int x, int y, struct drm_framebuffer *old_fb); |
- | 487 | extern void intel_modeset_disable(struct drm_device *dev); |
|
- | 488 | extern void intel_crtc_load_lut(struct drm_crtc *crtc); |
|
- | 489 | extern void intel_crtc_update_dpms(struct drm_crtc *crtc); |
|
- | 490 | extern void intel_encoder_noop(struct drm_encoder *encoder); |
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- | 491 | extern void intel_encoder_destroy(struct drm_encoder *encoder); |
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- | 492 | extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode); |
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Line 334... | Line 493... | ||
334 | 493 | extern bool intel_encoder_check_is_cloned(struct intel_encoder *encoder); |
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335 | extern void intel_crtc_load_lut(struct drm_crtc *crtc); |
494 | extern void intel_connector_dpms(struct drm_connector *, int mode); |
336 | extern void intel_encoder_prepare(struct drm_encoder *encoder); |
495 | extern bool intel_connector_get_hw_state(struct intel_connector *connector); |
337 | extern void intel_encoder_commit(struct drm_encoder *encoder); |
496 | extern void intel_modeset_check_state(struct drm_device *dev); |
Line 356... | Line 515... | ||
356 | struct intel_load_detect_pipe { |
515 | struct intel_load_detect_pipe { |
357 | struct drm_framebuffer *release_fb; |
516 | struct drm_framebuffer *release_fb; |
358 | bool load_detect_temp; |
517 | bool load_detect_temp; |
359 | int dpms_mode; |
518 | int dpms_mode; |
360 | }; |
519 | }; |
361 | extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder, |
520 | extern bool intel_get_load_detect_pipe(struct drm_connector *connector, |
362 | struct drm_connector *connector, |
- | |
363 | struct drm_display_mode *mode, |
521 | struct drm_display_mode *mode, |
364 | struct intel_load_detect_pipe *old); |
522 | struct intel_load_detect_pipe *old); |
365 | extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder, |
523 | extern void intel_release_load_detect_pipe(struct drm_connector *connector, |
366 | struct drm_connector *connector, |
- | |
367 | struct intel_load_detect_pipe *old); |
524 | struct intel_load_detect_pipe *old); |
Line 368... | Line 525... | ||
368 | 525 | ||
369 | extern void intelfb_restore(void); |
526 | extern void intelfb_restore(void); |
370 | extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, |
527 | extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, |
371 | u16 blue, int regno); |
528 | u16 blue, int regno); |
372 | extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, |
529 | extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, |
373 | u16 *blue, int regno); |
530 | u16 *blue, int regno); |
374 | extern void intel_enable_clock_gating(struct drm_device *dev); |
- | |
375 | extern void ironlake_enable_drps(struct drm_device *dev); |
- | |
376 | extern void ironlake_disable_drps(struct drm_device *dev); |
- | |
377 | extern void gen6_enable_rps(struct drm_i915_private *dev_priv); |
- | |
378 | extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv); |
- | |
379 | extern void gen6_disable_rps(struct drm_device *dev); |
- | |
Line 380... | Line 531... | ||
380 | extern void intel_init_emon(struct drm_device *dev); |
531 | extern void intel_enable_clock_gating(struct drm_device *dev); |
381 | 532 | ||
382 | extern int intel_pin_and_fence_fb_obj(struct drm_device *dev, |
533 | extern int intel_pin_and_fence_fb_obj(struct drm_device *dev, |
- | 534 | struct drm_i915_gem_object *obj, |
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Line 383... | Line 535... | ||
383 | struct drm_i915_gem_object *obj, |
535 | struct intel_ring_buffer *pipelined); |
384 | struct intel_ring_buffer *pipelined); |
536 | extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj); |
385 | 537 | ||
386 | extern int intel_framebuffer_init(struct drm_device *dev, |
538 | extern int intel_framebuffer_init(struct drm_device *dev, |
387 | struct intel_framebuffer *ifb, |
539 | struct intel_framebuffer *ifb, |
388 | struct drm_mode_fb_cmd2 *mode_cmd, |
540 | struct drm_mode_fb_cmd2 *mode_cmd, |
389 | struct drm_i915_gem_object *obj); |
- | |
- | 541 | struct drm_i915_gem_object *obj); |
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390 | extern int intel_fbdev_init(struct drm_device *dev); |
542 | extern int intel_fbdev_init(struct drm_device *dev); |
391 | extern void intel_fbdev_fini(struct drm_device *dev); |
543 | extern void intel_fbdev_fini(struct drm_device *dev); |
392 | 544 | extern void intel_fbdev_set_suspend(struct drm_device *dev, int state); |
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Line 393... | Line 545... | ||
393 | extern void intel_prepare_page_flip(struct drm_device *dev, int plane); |
545 | extern void intel_prepare_page_flip(struct drm_device *dev, int plane); |
Line 412... | Line 564... | ||
412 | 564 | ||
413 | extern void intel_init_clock_gating(struct drm_device *dev); |
565 | extern void intel_init_clock_gating(struct drm_device *dev); |
414 | extern void intel_write_eld(struct drm_encoder *encoder, |
566 | extern void intel_write_eld(struct drm_encoder *encoder, |
415 | struct drm_display_mode *mode); |
567 | struct drm_display_mode *mode); |
- | 568 | extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe); |
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- | 569 | extern void intel_prepare_ddi(struct drm_device *dev); |
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- | 570 | extern void hsw_fdi_link_train(struct drm_crtc *crtc); |
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Line 416... | Line 571... | ||
416 | extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe); |
571 | extern void intel_ddi_init(struct drm_device *dev, enum port port); |
417 | 572 | ||
418 | /* For use by IVB LP watermark workaround in intel_sprite.c */ |
573 | /* For use by IVB LP watermark workaround in intel_sprite.c */ |
419 | extern void sandybridge_update_wm(struct drm_device *dev); |
574 | extern void intel_update_watermarks(struct drm_device *dev); |
420 | extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe, |
575 | extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe, |
- | 576 | uint32_t sprite_width, |
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- | 577 | int pixel_size); |
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Line 421... | Line 578... | ||
421 | uint32_t sprite_width, |
578 | extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe, |
422 | int pixel_size); |
579 | struct drm_display_mode *mode); |
423 | 580 | ||
424 | extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data, |
581 | extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data, |
Line -... | Line 582... | ||
- | 582 | struct drm_file *file_priv); |
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- | 583 | extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data, |
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- | 584 | struct drm_file *file_priv); |
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- | 585 | ||
- | 586 | extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg); |
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- | 587 | ||
- | 588 | /* Power-related functions, located in intel_pm.c */ |
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- | 589 | extern void intel_init_pm(struct drm_device *dev); |
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- | 590 | /* FBC */ |
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- | 591 | extern bool intel_fbc_enabled(struct drm_device *dev); |
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- | 592 | extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval); |
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- | 593 | extern void intel_update_fbc(struct drm_device *dev); |
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- | 594 | /* IPS */ |
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- | 595 | extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv); |
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- | 596 | extern void intel_gpu_ips_teardown(void); |
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- | 597 | ||
- | 598 | extern void intel_init_power_wells(struct drm_device *dev); |
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- | 599 | extern void intel_enable_gt_powersave(struct drm_device *dev); |
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- | 600 | extern void intel_disable_gt_powersave(struct drm_device *dev); |
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- | 601 | extern void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv); |
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- | 602 | extern void ironlake_teardown_rc6(struct drm_device *dev); |
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- | 603 | ||
- | 604 | extern void intel_enable_ddi(struct intel_encoder *encoder); |
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- | 605 | extern void intel_disable_ddi(struct intel_encoder *encoder); |
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- | 606 | extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder, |
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- | 607 | enum pipe *pipe); |
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425 | struct drm_file *file_priv); |
608 | extern void intel_ddi_mode_set(struct drm_encoder *encoder, |