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1 | /* |
1 | /* |
2 | * Copyright © 2008 Intel Corporation |
2 | * Copyright © 2008 Intel Corporation |
3 | * 2014 Red Hat Inc. |
3 | * 2014 Red Hat Inc. |
4 | * |
4 | * |
5 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * Permission is hereby granted, free of charge, to any person obtaining a |
6 | * copy of this software and associated documentation files (the "Software"), |
6 | * copy of this software and associated documentation files (the "Software"), |
7 | * to deal in the Software without restriction, including without limitation |
7 | * to deal in the Software without restriction, including without limitation |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
9 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * and/or sell copies of the Software, and to permit persons to whom the |
10 | * Software is furnished to do so, subject to the following conditions: |
10 | * Software is furnished to do so, subject to the following conditions: |
11 | * |
11 | * |
12 | * The above copyright notice and this permission notice (including the next |
12 | * The above copyright notice and this permission notice (including the next |
13 | * paragraph) shall be included in all copies or substantial portions of the |
13 | * paragraph) shall be included in all copies or substantial portions of the |
14 | * Software. |
14 | * Software. |
15 | * |
15 | * |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
22 | * IN THE SOFTWARE. |
22 | * IN THE SOFTWARE. |
23 | * |
23 | * |
24 | */ |
24 | */ |
25 | 25 | ||
26 | #include |
26 | #include |
27 | #include "i915_drv.h" |
27 | #include "i915_drv.h" |
28 | #include "intel_drv.h" |
28 | #include "intel_drv.h" |
- | 29 | #include |
|
29 | #include |
30 | #include |
30 | #include |
31 | #include |
31 | 32 | ||
32 | static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, |
33 | static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, |
33 | struct intel_crtc_config *pipe_config) |
34 | struct intel_crtc_state *pipe_config) |
34 | { |
35 | { |
- | 36 | struct drm_device *dev = encoder->base.dev; |
|
35 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
37 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
36 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
38 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
37 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
39 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
38 | struct drm_device *dev = encoder->base.dev; |
40 | struct drm_atomic_state *state; |
39 | int bpp; |
41 | int bpp, i; |
40 | int lane_count, slots; |
42 | int lane_count, slots; |
41 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; |
43 | const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
- | 44 | struct drm_connector *drm_connector; |
|
42 | struct intel_connector *found = NULL, *intel_connector; |
45 | struct intel_connector *connector, *found = NULL; |
- | 46 | struct drm_connector_state *connector_state; |
|
43 | int mst_pbn; |
47 | int mst_pbn; |
44 | 48 | ||
45 | pipe_config->dp_encoder_is_mst = true; |
49 | pipe_config->dp_encoder_is_mst = true; |
46 | pipe_config->has_pch_encoder = false; |
50 | pipe_config->has_pch_encoder = false; |
47 | pipe_config->has_dp_encoder = true; |
51 | pipe_config->has_dp_encoder = true; |
48 | bpp = 24; |
52 | bpp = 24; |
49 | /* |
53 | /* |
50 | * for MST we always configure max link bw - the spec doesn't |
54 | * for MST we always configure max link bw - the spec doesn't |
51 | * seem to suggest we should do otherwise. |
55 | * seem to suggest we should do otherwise. |
52 | */ |
56 | */ |
53 | lane_count = drm_dp_max_lane_count(intel_dp->dpcd); |
57 | lane_count = drm_dp_max_lane_count(intel_dp->dpcd); |
54 | intel_dp->link_bw = intel_dp_max_link_bw(intel_dp); |
- | |
- | 58 | ||
- | 59 | ||
55 | intel_dp->lane_count = lane_count; |
60 | pipe_config->lane_count = lane_count; |
56 | 61 | ||
57 | pipe_config->pipe_bpp = 24; |
62 | pipe_config->pipe_bpp = 24; |
- | 63 | pipe_config->port_clock = intel_dp_max_link_rate(intel_dp); |
|
- | 64 | ||
58 | pipe_config->port_clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw); |
65 | state = pipe_config->base.state; |
- | 66 | ||
- | 67 | for_each_connector_in_state(state, drm_connector, connector_state, i) { |
|
59 | 68 | connector = to_intel_connector(drm_connector); |
|
60 | list_for_each_entry(intel_connector, &dev->mode_config.connector_list, base.head) { |
69 | |
61 | if (intel_connector->new_encoder == encoder) { |
70 | if (connector_state->best_encoder == &encoder->base) { |
62 | found = intel_connector; |
71 | found = connector; |
63 | break; |
72 | break; |
64 | } |
73 | } |
65 | } |
74 | } |
66 | 75 | ||
67 | if (!found) { |
76 | if (!found) { |
68 | DRM_ERROR("can't find connector\n"); |
77 | DRM_ERROR("can't find connector\n"); |
69 | return false; |
78 | return false; |
70 | } |
79 | } |
71 | 80 | ||
72 | mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); |
81 | mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp); |
73 | 82 | ||
74 | pipe_config->pbn = mst_pbn; |
83 | pipe_config->pbn = mst_pbn; |
75 | slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); |
84 | slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); |
76 | 85 | ||
77 | intel_link_compute_m_n(bpp, lane_count, |
86 | intel_link_compute_m_n(bpp, lane_count, |
78 | adjusted_mode->crtc_clock, |
87 | adjusted_mode->crtc_clock, |
79 | pipe_config->port_clock, |
88 | pipe_config->port_clock, |
80 | &pipe_config->dp_m_n); |
89 | &pipe_config->dp_m_n); |
81 | 90 | ||
82 | pipe_config->dp_m_n.tu = slots; |
91 | pipe_config->dp_m_n.tu = slots; |
- | 92 | ||
- | 93 | if (IS_HASWELL(dev) || IS_BROADWELL(dev)) |
|
- | 94 | hsw_dp_set_ddi_pll_sel(pipe_config); |
|
- | 95 | ||
83 | return true; |
96 | return true; |
84 | 97 | ||
85 | } |
98 | } |
86 | 99 | ||
87 | static void intel_mst_disable_dp(struct intel_encoder *encoder) |
100 | static void intel_mst_disable_dp(struct intel_encoder *encoder) |
88 | { |
101 | { |
89 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
102 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
90 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
103 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
91 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
104 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
92 | int ret; |
105 | int ret; |
93 | 106 | ||
94 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
107 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
95 | 108 | ||
96 | drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port); |
109 | drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port); |
97 | 110 | ||
98 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); |
111 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); |
99 | if (ret) { |
112 | if (ret) { |
100 | DRM_ERROR("failed to update payload %d\n", ret); |
113 | DRM_ERROR("failed to update payload %d\n", ret); |
101 | } |
114 | } |
102 | } |
115 | } |
103 | 116 | ||
104 | static void intel_mst_post_disable_dp(struct intel_encoder *encoder) |
117 | static void intel_mst_post_disable_dp(struct intel_encoder *encoder) |
105 | { |
118 | { |
106 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
119 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
107 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
120 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
108 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
121 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
109 | 122 | ||
110 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
123 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
111 | 124 | ||
112 | /* this can fail */ |
125 | /* this can fail */ |
113 | drm_dp_check_act_status(&intel_dp->mst_mgr); |
126 | drm_dp_check_act_status(&intel_dp->mst_mgr); |
114 | /* and this can also fail */ |
127 | /* and this can also fail */ |
115 | drm_dp_update_payload_part2(&intel_dp->mst_mgr); |
128 | drm_dp_update_payload_part2(&intel_dp->mst_mgr); |
116 | 129 | ||
117 | drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port); |
130 | drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port); |
118 | 131 | ||
119 | intel_dp->active_mst_links--; |
132 | intel_dp->active_mst_links--; |
120 | intel_mst->port = NULL; |
133 | intel_mst->port = NULL; |
121 | if (intel_dp->active_mst_links == 0) { |
134 | if (intel_dp->active_mst_links == 0) { |
122 | intel_dig_port->base.post_disable(&intel_dig_port->base); |
135 | intel_dig_port->base.post_disable(&intel_dig_port->base); |
123 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); |
136 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); |
124 | } |
137 | } |
125 | } |
138 | } |
126 | 139 | ||
127 | static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) |
140 | static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) |
128 | { |
141 | { |
129 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
142 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
130 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
143 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
131 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
144 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
132 | struct drm_device *dev = encoder->base.dev; |
145 | struct drm_device *dev = encoder->base.dev; |
133 | struct drm_i915_private *dev_priv = dev->dev_private; |
146 | struct drm_i915_private *dev_priv = dev->dev_private; |
134 | enum port port = intel_dig_port->port; |
147 | enum port port = intel_dig_port->port; |
135 | int ret; |
148 | int ret; |
136 | uint32_t temp; |
149 | uint32_t temp; |
137 | struct intel_connector *found = NULL, *intel_connector; |
150 | struct intel_connector *found = NULL, *connector; |
138 | int slots; |
151 | int slots; |
139 | struct drm_crtc *crtc = encoder->base.crtc; |
152 | struct drm_crtc *crtc = encoder->base.crtc; |
140 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
153 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
141 | 154 | ||
142 | list_for_each_entry(intel_connector, &dev->mode_config.connector_list, base.head) { |
155 | for_each_intel_connector(dev, connector) { |
143 | if (intel_connector->new_encoder == encoder) { |
156 | if (connector->base.state->best_encoder == &encoder->base) { |
144 | found = intel_connector; |
157 | found = connector; |
145 | break; |
158 | break; |
146 | } |
159 | } |
147 | } |
160 | } |
148 | 161 | ||
149 | if (!found) { |
162 | if (!found) { |
150 | DRM_ERROR("can't find connector\n"); |
163 | DRM_ERROR("can't find connector\n"); |
151 | return; |
164 | return; |
152 | } |
165 | } |
- | 166 | ||
- | 167 | /* MST encoders are bound to a crtc, not to a connector, |
|
- | 168 | * force the mapping here for get_hw_state. |
|
- | 169 | */ |
|
- | 170 | found->encoder = encoder; |
|
153 | 171 | ||
154 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
172 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
155 | intel_mst->port = found->port; |
173 | intel_mst->port = found->port; |
156 | 174 | ||
157 | if (intel_dp->active_mst_links == 0) { |
175 | if (intel_dp->active_mst_links == 0) { |
158 | enum port port = intel_ddi_get_encoder_port(encoder); |
176 | enum port port = intel_ddi_get_encoder_port(encoder); |
- | 177 | ||
- | 178 | intel_dp_set_link_params(intel_dp, intel_crtc->config); |
|
- | 179 | ||
- | 180 | /* FIXME: add support for SKL */ |
|
- | 181 | if (INTEL_INFO(dev)->gen < 9) |
|
159 | 182 | I915_WRITE(PORT_CLK_SEL(port), |
|
160 | I915_WRITE(PORT_CLK_SEL(port), intel_crtc->config.ddi_pll_sel); |
183 | intel_crtc->config->ddi_pll_sel); |
161 | 184 | ||
162 | intel_ddi_init_dp_buf_reg(&intel_dig_port->base); |
185 | intel_ddi_init_dp_buf_reg(&intel_dig_port->base); |
163 | 186 | ||
164 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); |
187 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); |
165 | 188 | ||
166 | 189 | ||
167 | intel_dp_start_link_train(intel_dp); |
190 | intel_dp_start_link_train(intel_dp); |
168 | intel_dp_complete_link_train(intel_dp); |
- | |
169 | intel_dp_stop_link_train(intel_dp); |
191 | intel_dp_stop_link_train(intel_dp); |
170 | } |
192 | } |
171 | 193 | ||
172 | ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, |
194 | ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, |
- | 195 | intel_mst->port, |
|
173 | intel_mst->port, intel_crtc->config.pbn, &slots); |
196 | intel_crtc->config->pbn, &slots); |
174 | if (ret == false) { |
197 | if (ret == false) { |
175 | DRM_ERROR("failed to allocate vcpi\n"); |
198 | DRM_ERROR("failed to allocate vcpi\n"); |
176 | return; |
199 | return; |
177 | } |
200 | } |
178 | 201 | ||
179 | 202 | ||
180 | intel_dp->active_mst_links++; |
203 | intel_dp->active_mst_links++; |
181 | temp = I915_READ(DP_TP_STATUS(port)); |
204 | temp = I915_READ(DP_TP_STATUS(port)); |
182 | I915_WRITE(DP_TP_STATUS(port), temp); |
205 | I915_WRITE(DP_TP_STATUS(port), temp); |
183 | 206 | ||
184 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); |
207 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); |
185 | } |
208 | } |
186 | 209 | ||
187 | static void intel_mst_enable_dp(struct intel_encoder *encoder) |
210 | static void intel_mst_enable_dp(struct intel_encoder *encoder) |
188 | { |
211 | { |
189 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
212 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
190 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
213 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
191 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
214 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
192 | struct drm_device *dev = intel_dig_port->base.base.dev; |
215 | struct drm_device *dev = intel_dig_port->base.base.dev; |
193 | struct drm_i915_private *dev_priv = dev->dev_private; |
216 | struct drm_i915_private *dev_priv = dev->dev_private; |
194 | enum port port = intel_dig_port->port; |
217 | enum port port = intel_dig_port->port; |
195 | int ret; |
218 | int ret; |
196 | 219 | ||
197 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
220 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
198 | 221 | ||
199 | if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT), |
222 | if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT), |
200 | 1)) |
223 | 1)) |
201 | DRM_ERROR("Timed out waiting for ACT sent\n"); |
224 | DRM_ERROR("Timed out waiting for ACT sent\n"); |
202 | 225 | ||
203 | ret = drm_dp_check_act_status(&intel_dp->mst_mgr); |
226 | ret = drm_dp_check_act_status(&intel_dp->mst_mgr); |
204 | 227 | ||
205 | ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); |
228 | ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); |
206 | } |
229 | } |
207 | 230 | ||
208 | static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, |
231 | static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, |
209 | enum pipe *pipe) |
232 | enum pipe *pipe) |
210 | { |
233 | { |
211 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
234 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
212 | *pipe = intel_mst->pipe; |
235 | *pipe = intel_mst->pipe; |
213 | if (intel_mst->port) |
236 | if (intel_mst->port) |
214 | return true; |
237 | return true; |
215 | return false; |
238 | return false; |
216 | } |
239 | } |
217 | 240 | ||
218 | static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, |
241 | static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, |
219 | struct intel_crtc_config *pipe_config) |
242 | struct intel_crtc_state *pipe_config) |
220 | { |
243 | { |
221 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
244 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); |
222 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
245 | struct intel_digital_port *intel_dig_port = intel_mst->primary; |
223 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
246 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
224 | struct drm_device *dev = encoder->base.dev; |
247 | struct drm_device *dev = encoder->base.dev; |
225 | struct drm_i915_private *dev_priv = dev->dev_private; |
248 | struct drm_i915_private *dev_priv = dev->dev_private; |
226 | enum transcoder cpu_transcoder = crtc->config.cpu_transcoder; |
249 | enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; |
227 | u32 temp, flags = 0; |
250 | u32 temp, flags = 0; |
228 | 251 | ||
229 | pipe_config->has_dp_encoder = true; |
252 | pipe_config->has_dp_encoder = true; |
230 | 253 | ||
231 | temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); |
254 | temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); |
232 | if (temp & TRANS_DDI_PHSYNC) |
255 | if (temp & TRANS_DDI_PHSYNC) |
233 | flags |= DRM_MODE_FLAG_PHSYNC; |
256 | flags |= DRM_MODE_FLAG_PHSYNC; |
234 | else |
257 | else |
235 | flags |= DRM_MODE_FLAG_NHSYNC; |
258 | flags |= DRM_MODE_FLAG_NHSYNC; |
236 | if (temp & TRANS_DDI_PVSYNC) |
259 | if (temp & TRANS_DDI_PVSYNC) |
237 | flags |= DRM_MODE_FLAG_PVSYNC; |
260 | flags |= DRM_MODE_FLAG_PVSYNC; |
238 | else |
261 | else |
239 | flags |= DRM_MODE_FLAG_NVSYNC; |
262 | flags |= DRM_MODE_FLAG_NVSYNC; |
240 | 263 | ||
241 | switch (temp & TRANS_DDI_BPC_MASK) { |
264 | switch (temp & TRANS_DDI_BPC_MASK) { |
242 | case TRANS_DDI_BPC_6: |
265 | case TRANS_DDI_BPC_6: |
243 | pipe_config->pipe_bpp = 18; |
266 | pipe_config->pipe_bpp = 18; |
244 | break; |
267 | break; |
245 | case TRANS_DDI_BPC_8: |
268 | case TRANS_DDI_BPC_8: |
246 | pipe_config->pipe_bpp = 24; |
269 | pipe_config->pipe_bpp = 24; |
247 | break; |
270 | break; |
248 | case TRANS_DDI_BPC_10: |
271 | case TRANS_DDI_BPC_10: |
249 | pipe_config->pipe_bpp = 30; |
272 | pipe_config->pipe_bpp = 30; |
250 | break; |
273 | break; |
251 | case TRANS_DDI_BPC_12: |
274 | case TRANS_DDI_BPC_12: |
252 | pipe_config->pipe_bpp = 36; |
275 | pipe_config->pipe_bpp = 36; |
253 | break; |
276 | break; |
254 | default: |
277 | default: |
255 | break; |
278 | break; |
256 | } |
279 | } |
257 | pipe_config->adjusted_mode.flags |= flags; |
280 | pipe_config->base.adjusted_mode.flags |= flags; |
- | 281 | ||
- | 282 | pipe_config->lane_count = |
|
- | 283 | ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1; |
|
- | 284 | ||
258 | intel_dp_get_m_n(crtc, pipe_config); |
285 | intel_dp_get_m_n(crtc, pipe_config); |
259 | 286 | ||
260 | intel_ddi_clock_get(&intel_dig_port->base, pipe_config); |
287 | intel_ddi_clock_get(&intel_dig_port->base, pipe_config); |
261 | } |
288 | } |
262 | 289 | ||
263 | static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) |
290 | static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) |
264 | { |
291 | { |
265 | struct intel_connector *intel_connector = to_intel_connector(connector); |
292 | struct intel_connector *intel_connector = to_intel_connector(connector); |
266 | struct intel_dp *intel_dp = intel_connector->mst_port; |
293 | struct intel_dp *intel_dp = intel_connector->mst_port; |
267 | struct edid *edid; |
294 | struct edid *edid; |
268 | int ret; |
295 | int ret; |
269 | 296 | ||
270 | edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); |
297 | edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); |
271 | if (!edid) |
298 | if (!edid) |
272 | return 0; |
299 | return 0; |
273 | 300 | ||
274 | ret = intel_connector_update_modes(connector, edid); |
301 | ret = intel_connector_update_modes(connector, edid); |
275 | kfree(edid); |
302 | kfree(edid); |
276 | 303 | ||
277 | return ret; |
304 | return ret; |
278 | } |
305 | } |
279 | 306 | ||
280 | static enum drm_connector_status |
307 | static enum drm_connector_status |
281 | intel_dp_mst_detect(struct drm_connector *connector, bool force) |
308 | intel_dp_mst_detect(struct drm_connector *connector, bool force) |
282 | { |
309 | { |
283 | struct intel_connector *intel_connector = to_intel_connector(connector); |
310 | struct intel_connector *intel_connector = to_intel_connector(connector); |
284 | struct intel_dp *intel_dp = intel_connector->mst_port; |
311 | struct intel_dp *intel_dp = intel_connector->mst_port; |
285 | 312 | ||
286 | return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port); |
313 | return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port); |
287 | } |
314 | } |
288 | 315 | ||
289 | static int |
316 | static int |
290 | intel_dp_mst_set_property(struct drm_connector *connector, |
317 | intel_dp_mst_set_property(struct drm_connector *connector, |
291 | struct drm_property *property, |
318 | struct drm_property *property, |
292 | uint64_t val) |
319 | uint64_t val) |
293 | { |
320 | { |
294 | return 0; |
321 | return 0; |
295 | } |
322 | } |
296 | 323 | ||
297 | static void |
324 | static void |
298 | intel_dp_mst_connector_destroy(struct drm_connector *connector) |
325 | intel_dp_mst_connector_destroy(struct drm_connector *connector) |
299 | { |
326 | { |
300 | struct intel_connector *intel_connector = to_intel_connector(connector); |
327 | struct intel_connector *intel_connector = to_intel_connector(connector); |
301 | 328 | ||
302 | if (!IS_ERR_OR_NULL(intel_connector->edid)) |
329 | if (!IS_ERR_OR_NULL(intel_connector->edid)) |
303 | kfree(intel_connector->edid); |
330 | kfree(intel_connector->edid); |
304 | 331 | ||
305 | drm_connector_cleanup(connector); |
332 | drm_connector_cleanup(connector); |
306 | kfree(connector); |
333 | kfree(connector); |
307 | } |
334 | } |
308 | 335 | ||
309 | static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { |
336 | static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { |
310 | .dpms = intel_connector_dpms, |
337 | .dpms = drm_atomic_helper_connector_dpms, |
311 | .detect = intel_dp_mst_detect, |
338 | .detect = intel_dp_mst_detect, |
312 | .fill_modes = drm_helper_probe_single_connector_modes, |
339 | .fill_modes = drm_helper_probe_single_connector_modes, |
313 | .set_property = intel_dp_mst_set_property, |
340 | .set_property = intel_dp_mst_set_property, |
- | 341 | .atomic_get_property = intel_connector_atomic_get_property, |
|
314 | .destroy = intel_dp_mst_connector_destroy, |
342 | .destroy = intel_dp_mst_connector_destroy, |
- | 343 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
|
- | 344 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, |
|
315 | }; |
345 | }; |
316 | 346 | ||
317 | static int intel_dp_mst_get_modes(struct drm_connector *connector) |
347 | static int intel_dp_mst_get_modes(struct drm_connector *connector) |
318 | { |
348 | { |
319 | return intel_dp_mst_get_ddc_modes(connector); |
349 | return intel_dp_mst_get_ddc_modes(connector); |
320 | } |
350 | } |
321 | 351 | ||
322 | static enum drm_mode_status |
352 | static enum drm_mode_status |
323 | intel_dp_mst_mode_valid(struct drm_connector *connector, |
353 | intel_dp_mst_mode_valid(struct drm_connector *connector, |
324 | struct drm_display_mode *mode) |
354 | struct drm_display_mode *mode) |
325 | { |
355 | { |
326 | /* TODO - validate mode against available PBN for link */ |
356 | /* TODO - validate mode against available PBN for link */ |
327 | if (mode->clock < 10000) |
357 | if (mode->clock < 10000) |
328 | return MODE_CLOCK_LOW; |
358 | return MODE_CLOCK_LOW; |
329 | 359 | ||
330 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) |
360 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) |
331 | return MODE_H_ILLEGAL; |
361 | return MODE_H_ILLEGAL; |
332 | 362 | ||
333 | return MODE_OK; |
363 | return MODE_OK; |
334 | } |
364 | } |
- | 365 | ||
- | 366 | static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector, |
|
- | 367 | struct drm_connector_state *state) |
|
- | 368 | { |
|
- | 369 | struct intel_connector *intel_connector = to_intel_connector(connector); |
|
- | 370 | struct intel_dp *intel_dp = intel_connector->mst_port; |
|
- | 371 | struct intel_crtc *crtc = to_intel_crtc(state->crtc); |
|
- | 372 | ||
- | 373 | return &intel_dp->mst_encoders[crtc->pipe]->base.base; |
|
- | 374 | } |
|
335 | 375 | ||
336 | static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) |
376 | static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) |
337 | { |
377 | { |
338 | struct intel_connector *intel_connector = to_intel_connector(connector); |
378 | struct intel_connector *intel_connector = to_intel_connector(connector); |
339 | struct intel_dp *intel_dp = intel_connector->mst_port; |
379 | struct intel_dp *intel_dp = intel_connector->mst_port; |
340 | return &intel_dp->mst_encoders[0]->base.base; |
380 | return &intel_dp->mst_encoders[0]->base.base; |
341 | } |
381 | } |
342 | 382 | ||
343 | static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { |
383 | static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { |
344 | .get_modes = intel_dp_mst_get_modes, |
384 | .get_modes = intel_dp_mst_get_modes, |
345 | .mode_valid = intel_dp_mst_mode_valid, |
385 | .mode_valid = intel_dp_mst_mode_valid, |
- | 386 | .atomic_best_encoder = intel_mst_atomic_best_encoder, |
|
346 | .best_encoder = intel_mst_best_encoder, |
387 | .best_encoder = intel_mst_best_encoder, |
347 | }; |
388 | }; |
348 | 389 | ||
349 | static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) |
390 | static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) |
350 | { |
391 | { |
351 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); |
392 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); |
352 | 393 | ||
353 | drm_encoder_cleanup(encoder); |
394 | drm_encoder_cleanup(encoder); |
354 | kfree(intel_mst); |
395 | kfree(intel_mst); |
355 | } |
396 | } |
356 | 397 | ||
357 | static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { |
398 | static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { |
358 | .destroy = intel_dp_mst_encoder_destroy, |
399 | .destroy = intel_dp_mst_encoder_destroy, |
359 | }; |
400 | }; |
360 | 401 | ||
361 | static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) |
402 | static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) |
362 | { |
403 | { |
363 | if (connector->encoder) { |
404 | if (connector->encoder && connector->base.state->crtc) { |
364 | enum pipe pipe; |
405 | enum pipe pipe; |
365 | if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) |
406 | if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) |
366 | return false; |
407 | return false; |
367 | return true; |
408 | return true; |
368 | } |
409 | } |
369 | return false; |
410 | return false; |
370 | } |
411 | } |
371 | 412 | ||
372 | static void intel_connector_add_to_fbdev(struct intel_connector *connector) |
413 | static void intel_connector_add_to_fbdev(struct intel_connector *connector) |
373 | { |
414 | { |
374 | #ifdef CONFIG_DRM_I915_FBDEV |
415 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
375 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
416 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
376 | drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base); |
417 | drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base); |
377 | #endif |
418 | #endif |
378 | } |
419 | } |
379 | 420 | ||
380 | static void intel_connector_remove_from_fbdev(struct intel_connector *connector) |
421 | static void intel_connector_remove_from_fbdev(struct intel_connector *connector) |
381 | { |
422 | { |
382 | #ifdef CONFIG_DRM_I915_FBDEV |
423 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
383 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
424 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
384 | drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base); |
425 | drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base); |
385 | #endif |
426 | #endif |
386 | } |
427 | } |
387 | 428 | ||
388 | static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) |
429 | static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) |
389 | { |
430 | { |
390 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); |
431 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); |
391 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
432 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
392 | struct drm_device *dev = intel_dig_port->base.base.dev; |
433 | struct drm_device *dev = intel_dig_port->base.base.dev; |
393 | struct intel_connector *intel_connector; |
434 | struct intel_connector *intel_connector; |
394 | struct drm_connector *connector; |
435 | struct drm_connector *connector; |
395 | int i; |
436 | int i; |
396 | 437 | ||
397 | intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL); |
438 | intel_connector = intel_connector_alloc(); |
398 | if (!intel_connector) |
439 | if (!intel_connector) |
399 | return NULL; |
440 | return NULL; |
400 | 441 | ||
401 | connector = &intel_connector->base; |
442 | connector = &intel_connector->base; |
402 | drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); |
443 | drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); |
403 | drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); |
444 | drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); |
404 | 445 | ||
405 | intel_connector->unregister = intel_connector_unregister; |
446 | intel_connector->unregister = intel_connector_unregister; |
406 | intel_connector->get_hw_state = intel_dp_mst_get_hw_state; |
447 | intel_connector->get_hw_state = intel_dp_mst_get_hw_state; |
407 | intel_connector->mst_port = intel_dp; |
448 | intel_connector->mst_port = intel_dp; |
408 | intel_connector->port = port; |
449 | intel_connector->port = port; |
409 | 450 | ||
410 | for (i = PIPE_A; i <= PIPE_C; i++) { |
451 | for (i = PIPE_A; i <= PIPE_C; i++) { |
411 | drm_mode_connector_attach_encoder(&intel_connector->base, |
452 | drm_mode_connector_attach_encoder(&intel_connector->base, |
412 | &intel_dp->mst_encoders[i]->base.base); |
453 | &intel_dp->mst_encoders[i]->base.base); |
413 | } |
454 | } |
414 | intel_dp_add_properties(intel_dp, connector); |
455 | intel_dp_add_properties(intel_dp, connector); |
415 | 456 | ||
416 | drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); |
457 | drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); |
417 | drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); |
458 | drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); |
418 | 459 | ||
419 | drm_mode_connector_set_path_property(connector, pathprop); |
460 | drm_mode_connector_set_path_property(connector, pathprop); |
- | 461 | return connector; |
|
- | 462 | } |
|
- | 463 | ||
- | 464 | static void intel_dp_register_mst_connector(struct drm_connector *connector) |
|
- | 465 | { |
|
- | 466 | struct intel_connector *intel_connector = to_intel_connector(connector); |
|
420 | drm_reinit_primary_mode_group(dev); |
467 | struct drm_device *dev = connector->dev; |
421 | mutex_lock(&dev->mode_config.mutex); |
468 | drm_modeset_lock_all(dev); |
422 | intel_connector_add_to_fbdev(intel_connector); |
469 | intel_connector_add_to_fbdev(intel_connector); |
423 | mutex_unlock(&dev->mode_config.mutex); |
470 | drm_modeset_unlock_all(dev); |
424 | drm_connector_register(&intel_connector->base); |
471 | drm_connector_register(&intel_connector->base); |
425 | return connector; |
- | |
426 | } |
472 | } |
427 | 473 | ||
428 | static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, |
474 | static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, |
429 | struct drm_connector *connector) |
475 | struct drm_connector *connector) |
430 | { |
476 | { |
431 | struct intel_connector *intel_connector = to_intel_connector(connector); |
477 | struct intel_connector *intel_connector = to_intel_connector(connector); |
432 | struct drm_device *dev = connector->dev; |
478 | struct drm_device *dev = connector->dev; |
- | 479 | ||
433 | /* need to nuke the connector */ |
480 | /* need to nuke the connector */ |
- | 481 | drm_modeset_lock_all(dev); |
|
- | 482 | if (connector->state->crtc) { |
|
434 | mutex_lock(&dev->mode_config.mutex); |
483 | struct drm_mode_set set; |
- | 484 | int ret; |
|
- | 485 | ||
- | 486 | memset(&set, 0, sizeof(set)); |
|
435 | intel_connector_dpms(connector, DRM_MODE_DPMS_OFF); |
487 | set.crtc = connector->state->crtc, |
- | 488 | ||
436 | mutex_unlock(&dev->mode_config.mutex); |
489 | ret = drm_atomic_helper_set_config(&set); |
- | 490 | ||
- | 491 | WARN(ret, "Disabling mst crtc failed with %i\n", ret); |
|
- | 492 | } |
|
- | 493 | drm_modeset_unlock_all(dev); |
|
437 | 494 | ||
438 | intel_connector->unregister(intel_connector); |
495 | intel_connector->unregister(intel_connector); |
439 | 496 | ||
440 | mutex_lock(&dev->mode_config.mutex); |
497 | drm_modeset_lock_all(dev); |
441 | intel_connector_remove_from_fbdev(intel_connector); |
498 | intel_connector_remove_from_fbdev(intel_connector); |
442 | drm_connector_cleanup(connector); |
- | |
443 | mutex_unlock(&dev->mode_config.mutex); |
- | |
444 | 499 | drm_connector_cleanup(connector); |
|
445 | drm_reinit_primary_mode_group(dev); |
500 | drm_modeset_unlock_all(dev); |
446 | 501 | ||
447 | kfree(intel_connector); |
502 | kfree(intel_connector); |
448 | DRM_DEBUG_KMS("\n"); |
503 | DRM_DEBUG_KMS("\n"); |
449 | } |
504 | } |
450 | 505 | ||
451 | static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) |
506 | static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) |
452 | { |
507 | { |
453 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); |
508 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); |
454 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
509 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); |
455 | struct drm_device *dev = intel_dig_port->base.base.dev; |
510 | struct drm_device *dev = intel_dig_port->base.base.dev; |
456 | 511 | ||
457 | drm_kms_helper_hotplug_event(dev); |
512 | drm_kms_helper_hotplug_event(dev); |
458 | } |
513 | } |
459 | 514 | ||
460 | static struct drm_dp_mst_topology_cbs mst_cbs = { |
515 | static struct drm_dp_mst_topology_cbs mst_cbs = { |
461 | .add_connector = intel_dp_add_mst_connector, |
516 | .add_connector = intel_dp_add_mst_connector, |
- | 517 | .register_connector = intel_dp_register_mst_connector, |
|
462 | .destroy_connector = intel_dp_destroy_mst_connector, |
518 | .destroy_connector = intel_dp_destroy_mst_connector, |
463 | .hotplug = intel_dp_mst_hotplug, |
519 | .hotplug = intel_dp_mst_hotplug, |
464 | }; |
520 | }; |
465 | 521 | ||
466 | static struct intel_dp_mst_encoder * |
522 | static struct intel_dp_mst_encoder * |
467 | intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) |
523 | intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) |
468 | { |
524 | { |
469 | struct intel_dp_mst_encoder *intel_mst; |
525 | struct intel_dp_mst_encoder *intel_mst; |
470 | struct intel_encoder *intel_encoder; |
526 | struct intel_encoder *intel_encoder; |
471 | struct drm_device *dev = intel_dig_port->base.base.dev; |
527 | struct drm_device *dev = intel_dig_port->base.base.dev; |
472 | 528 | ||
473 | intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); |
529 | intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); |
474 | 530 | ||
475 | if (!intel_mst) |
531 | if (!intel_mst) |
476 | return NULL; |
532 | return NULL; |
477 | 533 | ||
478 | intel_mst->pipe = pipe; |
534 | intel_mst->pipe = pipe; |
479 | intel_encoder = &intel_mst->base; |
535 | intel_encoder = &intel_mst->base; |
480 | intel_mst->primary = intel_dig_port; |
536 | intel_mst->primary = intel_dig_port; |
481 | 537 | ||
482 | drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, |
538 | drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, |
483 | DRM_MODE_ENCODER_DPMST); |
539 | DRM_MODE_ENCODER_DPMST); |
484 | 540 | ||
485 | intel_encoder->type = INTEL_OUTPUT_DP_MST; |
541 | intel_encoder->type = INTEL_OUTPUT_DP_MST; |
486 | intel_encoder->crtc_mask = 0x7; |
542 | intel_encoder->crtc_mask = 0x7; |
487 | intel_encoder->cloneable = 0; |
543 | intel_encoder->cloneable = 0; |
488 | 544 | ||
489 | intel_encoder->compute_config = intel_dp_mst_compute_config; |
545 | intel_encoder->compute_config = intel_dp_mst_compute_config; |
490 | intel_encoder->disable = intel_mst_disable_dp; |
546 | intel_encoder->disable = intel_mst_disable_dp; |
491 | intel_encoder->post_disable = intel_mst_post_disable_dp; |
547 | intel_encoder->post_disable = intel_mst_post_disable_dp; |
492 | intel_encoder->pre_enable = intel_mst_pre_enable_dp; |
548 | intel_encoder->pre_enable = intel_mst_pre_enable_dp; |
493 | intel_encoder->enable = intel_mst_enable_dp; |
549 | intel_encoder->enable = intel_mst_enable_dp; |
494 | intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; |
550 | intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; |
495 | intel_encoder->get_config = intel_dp_mst_enc_get_config; |
551 | intel_encoder->get_config = intel_dp_mst_enc_get_config; |
496 | 552 | ||
497 | return intel_mst; |
553 | return intel_mst; |
498 | 554 | ||
499 | } |
555 | } |
500 | 556 | ||
501 | static bool |
557 | static bool |
502 | intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) |
558 | intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) |
503 | { |
559 | { |
504 | int i; |
560 | int i; |
505 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
561 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
506 | 562 | ||
507 | for (i = PIPE_A; i <= PIPE_C; i++) |
563 | for (i = PIPE_A; i <= PIPE_C; i++) |
508 | intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i); |
564 | intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i); |
509 | return true; |
565 | return true; |
510 | } |
566 | } |
511 | 567 | ||
512 | int |
568 | int |
513 | intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) |
569 | intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) |
514 | { |
570 | { |
515 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
571 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
516 | struct drm_device *dev = intel_dig_port->base.base.dev; |
572 | struct drm_device *dev = intel_dig_port->base.base.dev; |
517 | int ret; |
573 | int ret; |
518 | 574 | ||
519 | intel_dp->can_mst = true; |
575 | intel_dp->can_mst = true; |
520 | intel_dp->mst_mgr.cbs = &mst_cbs; |
576 | intel_dp->mst_mgr.cbs = &mst_cbs; |
521 | 577 | ||
522 | /* create encoders */ |
578 | /* create encoders */ |
523 | intel_dp_create_fake_mst_encoders(intel_dig_port); |
579 | intel_dp_create_fake_mst_encoders(intel_dig_port); |
524 | ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id); |
580 | ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id); |
525 | if (ret) { |
581 | if (ret) { |
526 | intel_dp->can_mst = false; |
582 | intel_dp->can_mst = false; |
527 | return ret; |
583 | return ret; |
528 | } |
584 | } |
529 | return 0; |
585 | return 0; |
530 | } |
586 | } |
531 | 587 | ||
532 | void |
588 | void |
533 | intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) |
589 | intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) |
534 | { |
590 | { |
535 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
591 | struct intel_dp *intel_dp = &intel_dig_port->dp; |
536 | 592 | ||
537 | if (!intel_dp->can_mst) |
593 | if (!intel_dp->can_mst) |
538 | return; |
594 | return; |
539 | 595 | ||
540 | drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); |
596 | drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); |
541 | /* encoders will get killed by normal cleanup */ |
597 | /* encoders will get killed by normal cleanup */ |
542 | }=>=>> |
598 | }=>=>>> |