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Rev 6320 Rev 6660
Line 3624... Line 3624...
3624
 
3624
 
3625
static bool
3625
static bool
3626
intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP,
3626
intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP,
3627
			uint8_t dp_train_pat)
3627
			uint8_t dp_train_pat)
3628
{
-
 
3629
	if (!intel_dp->train_set_valid)
3628
{
3630
		memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
3629
		memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
3631
	intel_dp_set_signal_levels(intel_dp, DP);
3630
	intel_dp_set_signal_levels(intel_dp, DP);
3632
	return intel_dp_set_link_train(intel_dp, DP, dp_train_pat);
3631
	return intel_dp_set_link_train(intel_dp, DP, dp_train_pat);
Line 3742... Line 3741...
3742
		if (drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) {
3741
		if (drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) {
3743
			DRM_DEBUG_KMS("clock recovery OK\n");
3742
			DRM_DEBUG_KMS("clock recovery OK\n");
3744
			break;
3743
			break;
3745
		}
3744
		}
Line 3746... Line -...
3746
 
-
 
3747
		/*
-
 
3748
		 * if we used previously trained voltage and pre-emphasis values
-
 
3749
		 * and we don't get clock recovery, reset link training values
-
 
3750
		 */
-
 
3751
		if (intel_dp->train_set_valid) {
-
 
3752
			DRM_DEBUG_KMS("clock recovery not ok, reset");
-
 
3753
			/* clear the flag as we are not reusing train set */
-
 
3754
			intel_dp->train_set_valid = false;
-
 
3755
			if (!intel_dp_reset_link_train(intel_dp, &DP,
-
 
3756
						       DP_TRAINING_PATTERN_1 |
-
 
3757
						       DP_LINK_SCRAMBLING_DISABLE)) {
-
 
3758
				DRM_ERROR("failed to enable link training\n");
-
 
3759
				return;
-
 
3760
			}
-
 
3761
			continue;
-
 
Line 3762... Line 3745...
3762
		}
3745
 
3763
 
3746
 
3764
		/* Check to see if we've tried the max voltage */
3747
		/* Check to see if we've tried the max voltage */
3765
		for (i = 0; i < intel_dp->lane_count; i++)
3748
		for (i = 0; i < intel_dp->lane_count; i++)
Line 3850... Line 3833...
3850
		}
3833
		}
Line 3851... Line 3834...
3851
 
3834
 
3852
		/* Make sure clock is still ok */
3835
		/* Make sure clock is still ok */
3853
		if (!drm_dp_clock_recovery_ok(link_status,
3836
		if (!drm_dp_clock_recovery_ok(link_status,
3854
					      intel_dp->lane_count)) {
-
 
3855
			intel_dp->train_set_valid = false;
3837
					      intel_dp->lane_count)) {
3856
			intel_dp_link_training_clock_recovery(intel_dp);
3838
			intel_dp_link_training_clock_recovery(intel_dp);
3857
			intel_dp_set_link_train(intel_dp, &DP,
3839
			intel_dp_set_link_train(intel_dp, &DP,
3858
						training_pattern |
3840
						training_pattern |
3859
						DP_LINK_SCRAMBLING_DISABLE);
3841
						DP_LINK_SCRAMBLING_DISABLE);
Line 3867... Line 3849...
3867
			break;
3849
			break;
3868
		}
3850
		}
Line 3869... Line 3851...
3869
 
3851
 
3870
		/* Try 5 times, then try clock recovery if that fails */
3852
		/* Try 5 times, then try clock recovery if that fails */
3871
		if (tries > 5) {
-
 
3872
			intel_dp->train_set_valid = false;
3853
		if (tries > 5) {
3873
			intel_dp_link_training_clock_recovery(intel_dp);
3854
			intel_dp_link_training_clock_recovery(intel_dp);
3874
			intel_dp_set_link_train(intel_dp, &DP,
3855
			intel_dp_set_link_train(intel_dp, &DP,
3875
						training_pattern |
3856
						training_pattern |
3876
						DP_LINK_SCRAMBLING_DISABLE);
3857
						DP_LINK_SCRAMBLING_DISABLE);
Line 3889... Line 3870...
3889
 
3870
 
Line 3890... Line 3871...
3890
	intel_dp_set_idle_link_train(intel_dp);
3871
	intel_dp_set_idle_link_train(intel_dp);
Line 3891... Line 3872...
3891
 
3872
 
3892
	intel_dp->DP = DP;
-
 
3893
 
3873
	intel_dp->DP = DP;
3894
	if (channel_eq) {
3874
 
3895
		intel_dp->train_set_valid = true;
-
 
Line 3896... Line 3875...
3896
		DRM_DEBUG_KMS("Channel EQ done. DP Training successful\n");
3875
	if (channel_eq)
3897
	}
3876
		DRM_DEBUG_KMS("Channel EQ done. DP Training successful\n");
3898
}
3877
	}
3899
 
3878
 
Line 4609... Line 4588...
4609
	}
4588
	}
Line 4610... Line 4589...
4610
 
4589
 
4611
	return I915_READ(PORT_HOTPLUG_STAT) & bit;
4590
	return I915_READ(PORT_HOTPLUG_STAT) & bit;
Line 4612... Line 4591...
4612
}
4591
}
4613
 
4592
 
4614
static bool vlv_digital_port_connected(struct drm_i915_private *dev_priv,
4593
static bool gm45_digital_port_connected(struct drm_i915_private *dev_priv,
4615
				       struct intel_digital_port *port)
4594
				       struct intel_digital_port *port)
Line 4616... Line 4595...
4616
{
4595
{
4617
	u32 bit;
4596
	u32 bit;
4618
 
4597
 
4619
	switch (port->port) {
4598
	switch (port->port) {
4620
	case PORT_B:
4599
	case PORT_B:
4621
		bit = PORTB_HOTPLUG_LIVE_STATUS_VLV;
4600
		bit = PORTB_HOTPLUG_LIVE_STATUS_GM45;
4622
		break;
4601
		break;
4623
	case PORT_C:
4602
	case PORT_C:
4624
		bit = PORTC_HOTPLUG_LIVE_STATUS_VLV;
4603
		bit = PORTC_HOTPLUG_LIVE_STATUS_GM45;
4625
		break;
4604
		break;
4626
	case PORT_D:
4605
	case PORT_D:
4627
		bit = PORTD_HOTPLUG_LIVE_STATUS_VLV;
4606
		bit = PORTD_HOTPLUG_LIVE_STATUS_GM45;
4628
		break;
4607
		break;
4629
	default:
4608
	default:
Line 4674... Line 4653...
4674
		return ibx_digital_port_connected(dev_priv, port);
4653
		return ibx_digital_port_connected(dev_priv, port);
4675
	if (HAS_PCH_SPLIT(dev_priv))
4654
	if (HAS_PCH_SPLIT(dev_priv))
4676
		return cpt_digital_port_connected(dev_priv, port);
4655
		return cpt_digital_port_connected(dev_priv, port);
4677
	else if (IS_BROXTON(dev_priv))
4656
	else if (IS_BROXTON(dev_priv))
4678
		return bxt_digital_port_connected(dev_priv, port);
4657
		return bxt_digital_port_connected(dev_priv, port);
4679
	else if (IS_VALLEYVIEW(dev_priv))
4658
	else if (IS_GM45(dev_priv))
4680
		return vlv_digital_port_connected(dev_priv, port);
4659
		return gm45_digital_port_connected(dev_priv, port);
4681
	else
4660
	else
4682
		return g4x_digital_port_connected(dev_priv, port);
4661
		return g4x_digital_port_connected(dev_priv, port);
4683
}
4662
}
Line 4684... Line 4663...
4684
 
4663
 
Line 5027... Line 5006...
5027
	}
5006
	}
5028
	drm_encoder_cleanup(encoder);
5007
	drm_encoder_cleanup(encoder);
5029
	kfree(intel_dig_port);
5008
	kfree(intel_dig_port);
5030
}
5009
}
Line 5031... Line 5010...
5031
 
5010
 
5032
static void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder)
5011
void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder)
5033
{
5012
{
Line 5034... Line 5013...
5034
	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base);
5013
	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base);
5035
 
5014
 
Line 5069... Line 5048...
5069
	intel_display_power_get(dev_priv, power_domain);
5048
	intel_display_power_get(dev_priv, power_domain);
Line 5070... Line 5049...
5070
 
5049
 
5071
	edp_panel_vdd_schedule_off(intel_dp);
5050
	edp_panel_vdd_schedule_off(intel_dp);
Line 5072... Line 5051...
5072
}
5051
}
5073
 
5052
 
-
 
5053
void intel_dp_encoder_reset(struct drm_encoder *encoder)
5074
static void intel_dp_encoder_reset(struct drm_encoder *encoder)
5054
{
-
 
5055
	struct drm_i915_private *dev_priv = to_i915(encoder->dev);
-
 
5056
	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-
 
5057
 
Line 5075... Line 5058...
5075
{
5058
	if (!HAS_DDI(dev_priv))
5076
	struct intel_dp *intel_dp;
5059
		intel_dp->DP = I915_READ(intel_dp->output_reg);
Line 5077... Line -...
5077
 
-
 
5078
	if (to_intel_encoder(encoder)->type != INTEL_OUTPUT_EDP)
-
 
5079
		return;
5060
 
Line 5080... Line 5061...
5080
 
5061
	if (to_intel_encoder(encoder)->type != INTEL_OUTPUT_EDP)
5081
	intel_dp = enc_to_intel_dp(encoder);
5062
		return;
5082
 
5063
 
Line 5149... Line 5130...
5149
 
5130
 
5150
	power_domain = intel_display_port_aux_power_domain(intel_encoder);
5131
	power_domain = intel_display_port_aux_power_domain(intel_encoder);
Line 5151... Line 5132...
5151
	intel_display_power_get(dev_priv, power_domain);
5132
	intel_display_power_get(dev_priv, power_domain);
5152
 
-
 
5153
	if (long_hpd) {
-
 
5154
		/* indicate that we need to restart link training */
-
 
5155
		intel_dp->train_set_valid = false;
5133
 
5156
 
5134
	if (long_hpd) {
Line 5157... Line 5135...
5157
		if (!intel_digital_port_connected(dev_priv, intel_dig_port))
5135
		if (!intel_digital_port_connected(dev_priv, intel_dig_port))
5158
			goto mst_fail;
5136
			goto mst_fail;
Line 6125... Line 6103...
6125
	i915_debugfs_connector_add(connector);
6103
	i915_debugfs_connector_add(connector);
Line 6126... Line 6104...
6126
 
6104
 
6127
	return true;
6105
	return true;
Line 6128... Line -...
6128
}
-
 
6129
 
6106
}
-
 
6107
 
-
 
6108
bool intel_dp_init(struct drm_device *dev,
6130
void
6109
		   int output_reg,
6131
intel_dp_init(struct drm_device *dev, int output_reg, enum port port)
6110
		   enum port port)
6132
{
6111
{
6133
	struct drm_i915_private *dev_priv = dev->dev_private;
6112
	struct drm_i915_private *dev_priv = dev->dev_private;
6134
	struct intel_digital_port *intel_dig_port;
6113
	struct intel_digital_port *intel_dig_port;
6135
	struct intel_encoder *intel_encoder;
6114
	struct intel_encoder *intel_encoder;
Line 6136... Line 6115...
6136
	struct drm_encoder *encoder;
6115
	struct drm_encoder *encoder;
6137
	struct intel_connector *intel_connector;
6116
	struct intel_connector *intel_connector;
6138
 
6117
 
Line 6139... Line 6118...
6139
	intel_dig_port = kzalloc(sizeof(*intel_dig_port), GFP_KERNEL);
6118
	intel_dig_port = kzalloc(sizeof(*intel_dig_port), GFP_KERNEL);
6140
	if (!intel_dig_port)
6119
	if (!intel_dig_port)
6141
		return;
6120
		return false;
Line 6191... Line 6170...
6191
	dev_priv->hotplug.irq_port[port] = intel_dig_port;
6170
	dev_priv->hotplug.irq_port[port] = intel_dig_port;
Line 6192... Line 6171...
6192
 
6171
 
6193
	if (!intel_dp_init_connector(intel_dig_port, intel_connector))
6172
	if (!intel_dp_init_connector(intel_dig_port, intel_connector))
Line 6194... Line 6173...
6194
		goto err_init_connector;
6173
		goto err_init_connector;
Line 6195... Line 6174...
6195
 
6174
 
6196
	return;
6175
	return true;
6197
 
6176
 
6198
err_init_connector:
6177
err_init_connector:
6199
	drm_encoder_cleanup(encoder);
6178
	drm_encoder_cleanup(encoder);
6200
	kfree(intel_connector);
-
 
6201
err_connector_alloc:
6179
	kfree(intel_connector);
6202
	kfree(intel_dig_port);
6180
err_connector_alloc:
Line 6203... Line 6181...
6203
 
6181
	kfree(intel_dig_port);
6204
	return;
6182
	return false;
6205
}
6183
}