Rev 6937 | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 6937 | Rev 7144 | ||
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Line 42... | Line 42... | ||
42 | */ |
42 | */ |
Line 43... | Line 43... | ||
43 | 43 | ||
44 | #define I915_CSR_SKL "i915/skl_dmc_ver1.bin" |
44 | #define I915_CSR_SKL "i915/skl_dmc_ver1.bin" |
Line -... | Line 45... | ||
- | 45 | #define I915_CSR_BXT "i915/bxt_dmc_ver1.bin" |
|
- | 46 | ||
45 | #define I915_CSR_BXT "i915/bxt_dmc_ver1.bin" |
47 | #define FIRMWARE_URL "https://01.org/linuxgraphics/intel-linux-graphics-firmwares" |
46 | 48 | ||
Line 47... | Line 49... | ||
47 | MODULE_FIRMWARE(I915_CSR_SKL); |
49 | MODULE_FIRMWARE(I915_CSR_SKL); |
Line 216... | Line 218... | ||
216 | * |
218 | * |
217 | * CSR firmware is read from a .bin file and kept in internal memory one time. |
219 | * CSR firmware is read from a .bin file and kept in internal memory one time. |
218 | * Everytime display comes back from low power state this function is called to |
220 | * Everytime display comes back from low power state this function is called to |
219 | * copy the firmware from internal memory to registers. |
221 | * copy the firmware from internal memory to registers. |
220 | */ |
222 | */ |
221 | void intel_csr_load_program(struct drm_i915_private *dev_priv) |
223 | bool intel_csr_load_program(struct drm_i915_private *dev_priv) |
222 | { |
224 | { |
223 | u32 *payload = dev_priv->csr.dmc_payload; |
225 | u32 *payload = dev_priv->csr.dmc_payload; |
224 | uint32_t i, fw_size; |
226 | uint32_t i, fw_size; |
Line 225... | Line 227... | ||
225 | 227 | ||
226 | if (!IS_GEN9(dev_priv)) { |
228 | if (!IS_GEN9(dev_priv)) { |
227 | DRM_ERROR("No CSR support available for this platform\n"); |
229 | DRM_ERROR("No CSR support available for this platform\n"); |
228 | return; |
230 | return false; |
Line 229... | Line 231... | ||
229 | } |
231 | } |
230 | 232 | ||
231 | if (!dev_priv->csr.dmc_payload) { |
233 | if (!dev_priv->csr.dmc_payload) { |
232 | DRM_ERROR("Tried to program CSR with empty payload\n"); |
234 | DRM_ERROR("Tried to program CSR with empty payload\n"); |
Line 233... | Line 235... | ||
233 | return; |
235 | return false; |
234 | } |
236 | } |
235 | 237 | ||
Line 241... | Line 243... | ||
241 | I915_WRITE(dev_priv->csr.mmioaddr[i], |
243 | I915_WRITE(dev_priv->csr.mmioaddr[i], |
242 | dev_priv->csr.mmiodata[i]); |
244 | dev_priv->csr.mmiodata[i]); |
243 | } |
245 | } |
Line 244... | Line 246... | ||
244 | 246 | ||
- | 247 | dev_priv->csr.dc_state = 0; |
|
- | 248 | ||
245 | dev_priv->csr.dc_state = 0; |
249 | return true; |
Line 246... | Line 250... | ||
246 | } |
250 | } |
247 | 251 | ||
248 | static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, |
252 | static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, |
Line 279... | Line 283... | ||
279 | return NULL; |
283 | return NULL; |
280 | } |
284 | } |
Line 281... | Line 285... | ||
281 | 285 | ||
Line -... | Line 286... | ||
- | 286 | csr->version = css_header->version; |
|
282 | csr->version = css_header->version; |
287 | |
283 | 288 | if ((IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) && |
|
284 | if (IS_SKYLAKE(dev) && csr->version < SKL_CSR_VERSION_REQUIRED) { |
289 | csr->version < SKL_CSR_VERSION_REQUIRED) { |
285 | DRM_INFO("Refusing to load old Skylake DMC firmware v%u.%u," |
290 | DRM_INFO("Refusing to load old Skylake DMC firmware v%u.%u," |
286 | " please upgrade to v%u.%u or later" |
291 | " please upgrade to v%u.%u or later" |
287 | " [https://01.org/linuxgraphics/intel-linux-graphics-firmwares].\n", |
292 | " [" FIRMWARE_URL "].\n", |
288 | CSR_VERSION_MAJOR(csr->version), |
293 | CSR_VERSION_MAJOR(csr->version), |
289 | CSR_VERSION_MINOR(csr->version), |
294 | CSR_VERSION_MINOR(csr->version), |
290 | CSR_VERSION_MAJOR(SKL_CSR_VERSION_REQUIRED), |
295 | CSR_VERSION_MAJOR(SKL_CSR_VERSION_REQUIRED), |
Line 369... | Line 374... | ||
369 | memcpy(dmc_payload, &fw->data[readcount], nbytes); |
374 | memcpy(dmc_payload, &fw->data[readcount], nbytes); |
Line 370... | Line 375... | ||
370 | 375 | ||
371 | return dmc_payload; |
376 | return dmc_payload; |
Line 372... | Line 377... | ||
372 | } |
377 | } |
373 | 378 | ||
- | 379 | static void csr_load_work_fn(struct work_struct *work) |
|
374 | static void csr_load_work_fn(struct drm_i915_private *dev_priv) |
380 | { |
375 | { |
381 | struct drm_i915_private *dev_priv; |
376 | struct intel_csr *csr; |
382 | struct intel_csr *csr; |
Line -... | Line 383... | ||
- | 383 | const struct firmware *fw; |
|
377 | const struct firmware *fw; |
384 | int ret; |
Line 378... | Line 385... | ||
378 | int ret; |
385 | |
379 | 386 | dev_priv = container_of(work, typeof(*dev_priv), csr.work); |
|
380 | csr = &dev_priv->csr; |
387 | csr = &dev_priv->csr; |
Line 398... | Line 405... | ||
398 | DRM_INFO("Finished loading %s (v%u.%u)\n", |
405 | DRM_INFO("Finished loading %s (v%u.%u)\n", |
399 | dev_priv->csr.fw_path, |
406 | dev_priv->csr.fw_path, |
400 | CSR_VERSION_MAJOR(csr->version), |
407 | CSR_VERSION_MAJOR(csr->version), |
401 | CSR_VERSION_MINOR(csr->version)); |
408 | CSR_VERSION_MINOR(csr->version)); |
402 | } else { |
409 | } else { |
- | 410 | dev_notice(dev_priv->dev->dev, |
|
403 | DRM_ERROR("Failed to load DMC firmware, disabling rpm\n"); |
411 | "Failed to load DMC firmware" |
- | 412 | " [" FIRMWARE_URL "]," |
|
- | 413 | " disabling runtime power management.\n"); |
|
404 | } |
414 | } |
Line 405... | Line 415... | ||
405 | 415 | ||
406 | release_firmware(fw); |
416 | release_firmware(fw); |
Line 415... | Line 425... | ||
415 | */ |
425 | */ |
416 | void intel_csr_ucode_init(struct drm_i915_private *dev_priv) |
426 | void intel_csr_ucode_init(struct drm_i915_private *dev_priv) |
417 | { |
427 | { |
418 | struct intel_csr *csr = &dev_priv->csr; |
428 | struct intel_csr *csr = &dev_priv->csr; |
Line -... | Line 429... | ||
- | 429 | ||
- | 430 | INIT_WORK(&dev_priv->csr.work, csr_load_work_fn); |
|
419 | 431 | ||
420 | if (!HAS_CSR(dev_priv)) |
432 | if (!HAS_CSR(dev_priv)) |
Line 421... | Line 433... | ||
421 | return; |
433 | return; |
422 | 434 | ||
423 | if (IS_SKYLAKE(dev_priv)) |
435 | if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) |
424 | csr->fw_path = I915_CSR_SKL; |
436 | csr->fw_path = I915_CSR_SKL; |
425 | else if (IS_BROXTON(dev_priv)) |
437 | else if (IS_BROXTON(dev_priv)) |
426 | csr->fw_path = I915_CSR_BXT; |
438 | csr->fw_path = I915_CSR_BXT; |
Line 435... | Line 447... | ||
435 | * Obtain a runtime pm reference, until CSR is loaded, |
447 | * Obtain a runtime pm reference, until CSR is loaded, |
436 | * to avoid entering runtime-suspend. |
448 | * to avoid entering runtime-suspend. |
437 | */ |
449 | */ |
438 | intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); |
450 | intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); |
Line 439... | Line 451... | ||
439 | 451 | ||
440 | csr_load_work_fn(dev_priv); |
452 | schedule_work(&dev_priv->csr.work); |
Line 441... | Line 453... | ||
441 | } |
453 | } |
442 | 454 | ||
443 | /** |
455 | /** |