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| 1 | /* |
1 | /* |
| 2 | * Copyright © 2006 Intel Corporation |
2 | * Copyright © 2006 Intel Corporation |
| 3 | * |
3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| Line 118... | Line 118... | ||
| 118 | u8 download_ext_vbt:1; |
118 | u8 download_ext_vbt:1; |
| 119 | u8 enable_ssc:1; |
119 | u8 enable_ssc:1; |
| 120 | u8 ssc_freq:1; |
120 | u8 ssc_freq:1; |
| 121 | u8 enable_lfp_on_override:1; |
121 | u8 enable_lfp_on_override:1; |
| 122 | u8 disable_ssc_ddt:1; |
122 | u8 disable_ssc_ddt:1; |
| - | 123 | u8 rsvd7:1; |
|
| - | 124 | u8 display_clock_mode:1; |
|
| 123 | u8 rsvd8:3; /* finish byte */ |
125 | u8 rsvd8:1; /* finish byte */ |
| Line 124... | Line 126... | ||
| 124 | 126 | ||
| 125 | /* bits 3 */ |
127 | /* bits 3 */ |
| 126 | u8 disable_smooth_vision:1; |
128 | u8 disable_smooth_vision:1; |
| 127 | u8 single_dvi:1; |
129 | u8 single_dvi:1; |
| Line 131... | Line 133... | ||
| 131 | u8 legacy_monitor_detect; |
133 | u8 legacy_monitor_detect; |
| Line 132... | Line 134... | ||
| 132 | 134 | ||
| 133 | /* bits 5 */ |
135 | /* bits 5 */ |
| 134 | u8 int_crt_support:1; |
136 | u8 int_crt_support:1; |
| - | 137 | u8 int_tv_support:1; |
|
| - | 138 | u8 int_efp_support:1; |
|
| - | 139 | u8 dp_ssc_enb:1; /* PCH attached eDP supports SSC */ |
|
| 135 | u8 int_tv_support:1; |
140 | u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */ |
| 136 | u8 rsvd11:6; /* finish byte */ |
141 | u8 rsvd11:3; /* finish byte */ |
| Line 137... | Line 142... | ||
| 137 | } __attribute__((packed)); |
142 | } __attribute__((packed)); |
| 138 | 143 | ||
| 139 | /* pre-915 */ |
144 | /* pre-915 */ |
| Line 195... | Line 200... | ||
| 195 | #define DEVICE_PORT_DVOC 0x02 |
200 | #define DEVICE_PORT_DVOC 0x02 |
| Line 196... | Line 201... | ||
| 196 | 201 | ||
| 197 | struct child_device_config { |
202 | struct child_device_config { |
| 198 | u16 handle; |
203 | u16 handle; |
| 199 | u16 device_type; |
- | |
| 200 | u8 i2c_speed; |
204 | u16 device_type; |
| 201 | u8 rsvd[9]; |
205 | u8 device_id[10]; /* ascii string */ |
| 202 | u16 addin_offset; |
206 | u16 addin_offset; |
| 203 | u8 dvo_port; /* See Device_PORT_* above */ |
207 | u8 dvo_port; /* See Device_PORT_* above */ |
| 204 | u8 i2c_pin; |
208 | u8 i2c_pin; |
| 205 | u8 slave_addr; |
209 | u8 slave_addr; |
| Line 444... | Line 448... | ||
| 444 | #define EDP_VSWING_0_6V 1 |
448 | #define EDP_VSWING_0_6V 1 |
| 445 | #define EDP_VSWING_0_8V 2 |
449 | #define EDP_VSWING_0_8V 2 |
| 446 | #define EDP_VSWING_1_2V 3 |
450 | #define EDP_VSWING_1_2V 3 |
| Line 447... | Line 451... | ||
| 447 | 451 | ||
| 448 | struct edp_power_seq { |
452 | struct edp_power_seq { |
| 449 | u16 t3; |
453 | u16 t1_t3; |
| 450 | u16 t7; |
454 | u16 t8; |
| 451 | u16 t9; |
455 | u16 t9; |
| 452 | u16 t10; |
456 | u16 t10; |
| 453 | u16 t12; |
457 | u16 t11_t12; |
| Line 454... | Line 458... | ||
| 454 | } __attribute__ ((packed)); |
458 | } __attribute__ ((packed)); |
| 455 | 459 | ||
| 456 | struct edp_link_params { |
460 | struct edp_link_params { |
| Line 461... | Line 465... | ||
| 461 | } __attribute__ ((packed)); |
465 | } __attribute__ ((packed)); |
| Line 462... | Line 466... | ||
| 462 | 466 | ||
| 463 | struct bdb_edp { |
467 | struct bdb_edp { |
| 464 | struct edp_power_seq power_seqs[16]; |
468 | struct edp_power_seq power_seqs[16]; |
| 465 | u32 color_depth; |
- | |
| 466 | u32 sdrrs_msa_timing_delay; |
469 | u32 color_depth; |
| - | 470 | struct edp_link_params link_params[16]; |
|
| - | 471 | u32 sdrrs_msa_timing_delay; |
|
| - | 472 | ||
| - | 473 | /* ith bit indicates enabled/disabled for (i+1)th panel */ |
|
| - | 474 | u16 edp_s3d_feature; |
|
| 467 | struct edp_link_params link_params[16]; |
475 | u16 edp_t3_optimization; |
| Line 468... | Line 476... | ||
| 468 | } __attribute__ ((packed)); |
476 | } __attribute__ ((packed)); |
| 469 | 477 | ||