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Rev 6296 | Rev 6320 | ||
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Line 1655... | Line 1655... | ||
1655 | spin_unlock(&dev_priv->irq_lock); |
1655 | spin_unlock(&dev_priv->irq_lock); |
Line 1656... | Line 1656... | ||
1656 | 1656 | ||
1657 | for_each_pipe(dev_priv, pipe) { |
1657 | for_each_pipe(dev_priv, pipe) { |
1658 | if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS && |
1658 | if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS && |
1659 | intel_pipe_handle_vblank(dev, pipe)) |
1659 | intel_pipe_handle_vblank(dev, pipe)) |
Line 1660... | Line 1660... | ||
1660 | /*intel_check_page_flip(dev, pipe)*/; |
1660 | intel_check_page_flip(dev, pipe); |
1661 | 1661 | ||
1662 | if (pipe_stats[pipe] & PLANE_FLIP_DONE_INT_STATUS_VLV) { |
1662 | if (pipe_stats[pipe] & PLANE_FLIP_DONE_INT_STATUS_VLV) { |
1663 | // intel_prepare_page_flip(dev, pipe); |
1663 | intel_prepare_page_flip(dev, pipe); |
Line 1664... | Line 1664... | ||
1664 | // intel_finish_page_flip(dev, pipe); |
1664 | intel_finish_page_flip(dev, pipe); |
1665 | } |
1665 | } |
Line 2026... | Line 2026... | ||
2026 | DRM_ERROR("Poison interrupt\n"); |
2026 | DRM_ERROR("Poison interrupt\n"); |
Line 2027... | Line 2027... | ||
2027 | 2027 | ||
2028 | for_each_pipe(dev_priv, pipe) { |
2028 | for_each_pipe(dev_priv, pipe) { |
2029 | if (de_iir & DE_PIPE_VBLANK(pipe) && |
2029 | if (de_iir & DE_PIPE_VBLANK(pipe) && |
2030 | intel_pipe_handle_vblank(dev, pipe)) |
2030 | intel_pipe_handle_vblank(dev, pipe)) |
Line 2031... | Line 2031... | ||
2031 | /*intel_check_page_flip(dev, pipe)*/; |
2031 | intel_check_page_flip(dev, pipe); |
2032 | 2032 | ||
Line 2033... | Line 2033... | ||
2033 | if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe)) |
2033 | if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe)) |
2034 | intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe); |
2034 | intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe); |
Line 2035... | Line 2035... | ||
2035 | 2035 | ||
2036 | if (de_iir & DE_PIPE_CRC_DONE(pipe)) |
2036 | if (de_iir & DE_PIPE_CRC_DONE(pipe)) |
2037 | i9xx_pipe_crc_irq_handler(dev, pipe); |
2037 | i9xx_pipe_crc_irq_handler(dev, pipe); |
2038 | 2038 | ||
2039 | /* plane/pipes map 1:1 on ilk+ */ |
2039 | /* plane/pipes map 1:1 on ilk+ */ |
2040 | if (de_iir & DE_PLANE_FLIP_DONE(pipe)) { |
2040 | if (de_iir & DE_PLANE_FLIP_DONE(pipe)) { |
Line 2041... | Line 2041... | ||
2041 | // intel_prepare_page_flip(dev, pipe); |
2041 | intel_prepare_page_flip(dev, pipe); |
2042 | // intel_finish_page_flip_plane(dev, pipe); |
2042 | intel_finish_page_flip_plane(dev, pipe); |
Line 2079... | Line 2079... | ||
2079 | intel_opregion_asle_intr(dev); |
2079 | intel_opregion_asle_intr(dev); |
Line 2080... | Line 2080... | ||
2080 | 2080 | ||
2081 | for_each_pipe(dev_priv, pipe) { |
2081 | for_each_pipe(dev_priv, pipe) { |
2082 | if (de_iir & (DE_PIPE_VBLANK_IVB(pipe)) && |
2082 | if (de_iir & (DE_PIPE_VBLANK_IVB(pipe)) && |
2083 | intel_pipe_handle_vblank(dev, pipe)) |
2083 | intel_pipe_handle_vblank(dev, pipe)) |
Line 2084... | Line 2084... | ||
2084 | /*intel_check_page_flip(dev, pipe)*/; |
2084 | intel_check_page_flip(dev, pipe); |
2085 | 2085 | ||
2086 | /* plane/pipes map 1:1 on ilk+ */ |
2086 | /* plane/pipes map 1:1 on ilk+ */ |
2087 | if (de_iir & DE_PLANE_FLIP_DONE_IVB(pipe)) { |
2087 | if (de_iir & DE_PLANE_FLIP_DONE_IVB(pipe)) { |
2088 | // intel_prepare_page_flip(dev, pipe); |
2088 | intel_prepare_page_flip(dev, pipe); |
2089 | // intel_finish_page_flip_plane(dev, pipe); |
2089 | intel_finish_page_flip_plane(dev, pipe); |
Line 2090... | Line 2090... | ||
2090 | } |
2090 | } |
2091 | } |
2091 | } |
Line 2288... | Line 2288... | ||
2288 | ret = IRQ_HANDLED; |
2288 | ret = IRQ_HANDLED; |
2289 | I915_WRITE(GEN8_DE_PIPE_IIR(pipe), pipe_iir); |
2289 | I915_WRITE(GEN8_DE_PIPE_IIR(pipe), pipe_iir); |
Line 2290... | Line 2290... | ||
2290 | 2290 | ||
2291 | if (pipe_iir & GEN8_PIPE_VBLANK && |
2291 | if (pipe_iir & GEN8_PIPE_VBLANK && |
2292 | intel_pipe_handle_vblank(dev, pipe)) |
2292 | intel_pipe_handle_vblank(dev, pipe)) |
Line 2293... | Line 2293... | ||
2293 | /* intel_check_page_flip(dev, pipe)*/; |
2293 | intel_check_page_flip(dev, pipe); |
2294 | 2294 | ||
2295 | if (INTEL_INFO(dev_priv)->gen >= 9) |
2295 | if (INTEL_INFO(dev_priv)->gen >= 9) |
2296 | flip_done = pipe_iir & GEN9_PIPE_PLANE1_FLIP_DONE; |
2296 | flip_done = pipe_iir & GEN9_PIPE_PLANE1_FLIP_DONE; |
Line -... | Line 2297... | ||
- | 2297 | else |
|
- | 2298 | flip_done = pipe_iir & GEN8_PIPE_PRIMARY_FLIP_DONE; |
|
- | 2299 | ||
- | 2300 | if (flip_done) { |
|
Line 2297... | Line 2301... | ||
2297 | else |
2301 | intel_prepare_page_flip(dev, pipe); |
2298 | flip_done = pipe_iir & GEN8_PIPE_PRIMARY_FLIP_DONE; |
2302 | intel_finish_page_flip_plane(dev, pipe); |
Line 2299... | Line 2303... | ||
2299 | 2303 | } |
|
Line 2333... | Line 2337... | ||
2333 | 2337 | ||
2334 | if (HAS_PCH_SPT(dev_priv)) |
2338 | if (HAS_PCH_SPT(dev_priv)) |
2335 | spt_irq_handler(dev, pch_iir); |
2339 | spt_irq_handler(dev, pch_iir); |
2336 | else |
2340 | else |
2337 | cpt_irq_handler(dev, pch_iir); |
2341 | cpt_irq_handler(dev, pch_iir); |
- | 2342 | } else { |
|
- | 2343 | /* |
|
- | 2344 | * Like on previous PCH there seems to be something |
|
- | 2345 | * fishy going on with forwarding PCH interrupts. |
|
2338 | } else |
2346 | */ |
2339 | DRM_ERROR("The master control interrupt lied (SDE)!\n"); |
2347 | DRM_DEBUG_DRIVER("The master control interrupt lied (SDE)!\n"); |
2340 | 2348 | } |
|
Line 2341... | Line 2349... | ||
2341 | } |
2349 | } |
2342 | 2350 | ||
Line 2361... | Line 2369... | ||
2361 | 2369 | ||
2362 | /* Wake up __wait_seqno, potentially holding dev->struct_mutex. */ |
2370 | /* Wake up __wait_seqno, potentially holding dev->struct_mutex. */ |
2363 | for_each_ring(ring, dev_priv, i) |
2371 | for_each_ring(ring, dev_priv, i) |
Line -... | Line 2372... | ||
- | 2372 | wake_up_all(&ring->irq_queue); |
|
- | 2373 | ||
Line 2364... | Line 2374... | ||
2364 | wake_up_all(&ring->irq_queue); |
2374 | /* Wake up intel_crtc_wait_for_pending_flips, holding crtc->mutex. */ |
2365 | 2375 | wake_up_all(&dev_priv->pending_flip_queue); |
|
2366 | 2376 | ||
2367 | /* |
2377 | /* |
Line 3773... | Line 3783... | ||
3773 | * an interrupt per se, we watch for the change at vblank. |
3783 | * an interrupt per se, we watch for the change at vblank. |
3774 | */ |
3784 | */ |
3775 | if (I915_READ16(ISR) & flip_pending) |
3785 | if (I915_READ16(ISR) & flip_pending) |
3776 | goto check_page_flip; |
3786 | goto check_page_flip; |
Line 3777... | Line 3787... | ||
3777 | 3787 | ||
3778 | // intel_prepare_page_flip(dev, plane); |
3788 | intel_prepare_page_flip(dev, plane); |
3779 | // intel_finish_page_flip(dev, pipe); |
3789 | intel_finish_page_flip(dev, pipe); |
Line 3780... | Line 3790... | ||
3780 | return true; |
3790 | return true; |
3781 | 3791 | ||
3782 | check_page_flip: |
3792 | check_page_flip: |
3783 | // intel_check_page_flip(dev, pipe); |
3793 | intel_check_page_flip(dev, pipe); |
Line 3784... | Line 3794... | ||
3784 | return false; |
3794 | return false; |
3785 | } |
3795 | } |
Line 3957... | Line 3967... | ||
3957 | * an interrupt per se, we watch for the change at vblank. |
3967 | * an interrupt per se, we watch for the change at vblank. |
3958 | */ |
3968 | */ |
3959 | if (I915_READ(ISR) & flip_pending) |
3969 | if (I915_READ(ISR) & flip_pending) |
3960 | goto check_page_flip; |
3970 | goto check_page_flip; |
Line -... | Line 3971... | ||
- | 3971 | ||
- | 3972 | intel_prepare_page_flip(dev, plane); |
|
3961 | 3973 | intel_finish_page_flip(dev, pipe); |
|
Line 3962... | Line 3974... | ||
3962 | return true; |
3974 | return true; |
- | 3975 | ||
3963 | 3976 | check_page_flip: |
|
3964 | check_page_flip: |
3977 | intel_check_page_flip(dev, pipe); |
Line 3965... | Line 3978... | ||
3965 | return false; |
3978 | return false; |
3966 | } |
3979 | } |
Line 4447... | Line 4460... | ||
4447 | * resources acquired in the init functions. |
4460 | * resources acquired in the init functions. |
4448 | */ |
4461 | */ |
4449 | void intel_irq_uninstall(struct drm_i915_private *dev_priv) |
4462 | void intel_irq_uninstall(struct drm_i915_private *dev_priv) |
4450 | { |
4463 | { |
4451 | // drm_irq_uninstall(dev_priv->dev); |
4464 | // drm_irq_uninstall(dev_priv->dev); |
4452 | // intel_hpd_cancel_work(dev_priv); |
4465 | intel_hpd_cancel_work(dev_priv); |
4453 | dev_priv->pm.irqs_enabled = false; |
4466 | dev_priv->pm.irqs_enabled = false; |
4454 | } |
4467 | } |
Line 4455... | Line 4468... | ||
4455 | 4468 | ||
4456 | /** |
4469 | /** |