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Rev 5367 | Rev 6084 | ||
---|---|---|---|
Line 28... | Line 28... | ||
28 | */ |
28 | */ |
Line 29... | Line 29... | ||
29 | 29 | ||
Line 30... | Line 30... | ||
30 | #include "i915_drv.h" |
30 | #include "i915_drv.h" |
31 | - | ||
32 | #if 0 |
- | |
33 | static const char *yesno(int v) |
- | |
34 | { |
- | |
Line 35... | Line 31... | ||
35 | return v ? "yes" : "no"; |
31 | |
36 | } |
32 | #if 0 |
37 | 33 | ||
38 | static const char *ring_str(int ring) |
34 | static const char *ring_str(int ring) |
Line 190... | Line 186... | ||
190 | static void print_error_buffers(struct drm_i915_error_state_buf *m, |
186 | static void print_error_buffers(struct drm_i915_error_state_buf *m, |
191 | const char *name, |
187 | const char *name, |
192 | struct drm_i915_error_buffer *err, |
188 | struct drm_i915_error_buffer *err, |
193 | int count) |
189 | int count) |
194 | { |
190 | { |
- | 191 | int i; |
|
- | 192 | ||
195 | err_printf(m, " %s [%d]:\n", name, count); |
193 | err_printf(m, " %s [%d]:\n", name, count); |
Line 196... | Line 194... | ||
196 | 194 | ||
197 | while (count--) { |
195 | while (count--) { |
198 | err_printf(m, " %08x %8u %02x %02x %x %x", |
196 | err_printf(m, " %08x_%08x %8u %02x %02x [ ", |
- | 197 | upper_32_bits(err->gtt_offset), |
|
199 | err->gtt_offset, |
198 | lower_32_bits(err->gtt_offset), |
200 | err->size, |
199 | err->size, |
201 | err->read_domains, |
200 | err->read_domains, |
- | 201 | err->write_domain); |
|
- | 202 | for (i = 0; i < I915_NUM_RINGS; i++) |
|
- | 203 | err_printf(m, "%02x ", err->rseqno[i]); |
|
202 | err->write_domain, |
204 | |
203 | err->rseqno, err->wseqno); |
205 | err_printf(m, "] %02x", err->wseqno); |
204 | err_puts(m, pin_flag(err->pinned)); |
206 | err_puts(m, pin_flag(err->pinned)); |
205 | err_puts(m, tiling_flag(err->tiling)); |
207 | err_puts(m, tiling_flag(err->tiling)); |
206 | err_puts(m, dirty_flag(err->dirty)); |
208 | err_puts(m, dirty_flag(err->dirty)); |
207 | err_puts(m, purgeable_flag(err->purgeable)); |
209 | err_puts(m, purgeable_flag(err->purgeable)); |
Line 240... | Line 242... | ||
240 | return "unknown"; |
242 | return "unknown"; |
241 | } |
243 | } |
Line 242... | Line 244... | ||
242 | 244 | ||
243 | static void i915_ring_error_state(struct drm_i915_error_state_buf *m, |
245 | static void i915_ring_error_state(struct drm_i915_error_state_buf *m, |
244 | struct drm_device *dev, |
246 | struct drm_device *dev, |
- | 247 | struct drm_i915_error_state *error, |
|
245 | struct drm_i915_error_ring *ring) |
248 | int ring_idx) |
- | 249 | { |
|
- | 250 | struct drm_i915_error_ring *ring = &error->ring[ring_idx]; |
|
246 | { |
251 | |
247 | if (!ring->valid) |
252 | if (!ring->valid) |
Line -... | Line 253... | ||
- | 253 | return; |
|
- | 254 | ||
248 | return; |
255 | err_printf(m, "%s command stream:\n", ring_str(ring_idx)); |
249 | 256 | err_printf(m, " START: 0x%08x\n", ring->start); |
|
250 | err_printf(m, " HEAD: 0x%08x\n", ring->head); |
257 | err_printf(m, " HEAD: 0x%08x\n", ring->head); |
251 | err_printf(m, " TAIL: 0x%08x\n", ring->tail); |
258 | err_printf(m, " TAIL: 0x%08x\n", ring->tail); |
252 | err_printf(m, " CTL: 0x%08x\n", ring->ctl); |
259 | err_printf(m, " CTL: 0x%08x\n", ring->ctl); |
Line 327... | Line 334... | ||
327 | const struct i915_error_state_file_priv *error_priv) |
334 | const struct i915_error_state_file_priv *error_priv) |
328 | { |
335 | { |
329 | struct drm_device *dev = error_priv->dev; |
336 | struct drm_device *dev = error_priv->dev; |
330 | struct drm_i915_private *dev_priv = dev->dev_private; |
337 | struct drm_i915_private *dev_priv = dev->dev_private; |
331 | struct drm_i915_error_state *error = error_priv->error; |
338 | struct drm_i915_error_state *error = error_priv->error; |
- | 339 | struct drm_i915_error_object *obj; |
|
332 | int i, j, offset, elt; |
340 | int i, j, offset, elt; |
333 | int max_hangcheck_score; |
341 | int max_hangcheck_score; |
Line 334... | Line 342... | ||
334 | 342 | ||
335 | if (!error) { |
343 | if (!error) { |
Line 356... | Line 364... | ||
356 | } |
364 | } |
357 | } |
365 | } |
358 | err_printf(m, "Reset count: %u\n", error->reset_count); |
366 | err_printf(m, "Reset count: %u\n", error->reset_count); |
359 | err_printf(m, "Suspend count: %u\n", error->suspend_count); |
367 | err_printf(m, "Suspend count: %u\n", error->suspend_count); |
360 | err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device); |
368 | err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device); |
- | 369 | err_printf(m, "IOMMU enabled?: %d\n", error->iommu); |
|
361 | err_printf(m, "EIR: 0x%08x\n", error->eir); |
370 | err_printf(m, "EIR: 0x%08x\n", error->eir); |
362 | err_printf(m, "IER: 0x%08x\n", error->ier); |
371 | err_printf(m, "IER: 0x%08x\n", error->ier); |
- | 372 | if (INTEL_INFO(dev)->gen >= 8) { |
|
- | 373 | for (i = 0; i < 4; i++) |
|
- | 374 | err_printf(m, "GTIER gt %d: 0x%08x\n", i, |
|
- | 375 | error->gtier[i]); |
|
- | 376 | } else if (HAS_PCH_SPLIT(dev) || IS_VALLEYVIEW(dev)) |
|
- | 377 | err_printf(m, "GTIER: 0x%08x\n", error->gtier[0]); |
|
363 | err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); |
378 | err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); |
364 | err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake); |
379 | err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake); |
365 | err_printf(m, "DERRMR: 0x%08x\n", error->derrmr); |
380 | err_printf(m, "DERRMR: 0x%08x\n", error->derrmr); |
366 | err_printf(m, "CCID: 0x%08x\n", error->ccid); |
381 | err_printf(m, "CCID: 0x%08x\n", error->ccid); |
367 | err_printf(m, "Missed interrupts: 0x%08lx\n", dev_priv->gpu_error.missed_irq_rings); |
382 | err_printf(m, "Missed interrupts: 0x%08lx\n", dev_priv->gpu_error.missed_irq_rings); |
Line 373... | Line 388... | ||
373 | err_printf(m, " INSTDONE_%d: 0x%08x\n", i, |
388 | err_printf(m, " INSTDONE_%d: 0x%08x\n", i, |
374 | error->extra_instdone[i]); |
389 | error->extra_instdone[i]); |
Line 375... | Line 390... | ||
375 | 390 | ||
376 | if (INTEL_INFO(dev)->gen >= 6) { |
391 | if (INTEL_INFO(dev)->gen >= 6) { |
- | 392 | err_printf(m, "ERROR: 0x%08x\n", error->error); |
|
- | 393 | ||
- | 394 | if (INTEL_INFO(dev)->gen >= 8) |
|
- | 395 | err_printf(m, "FAULT_TLB_DATA: 0x%08x 0x%08x\n", |
|
- | 396 | error->fault_data1, error->fault_data0); |
|
377 | err_printf(m, "ERROR: 0x%08x\n", error->error); |
397 | |
378 | err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg); |
398 | err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg); |
Line 379... | Line 399... | ||
379 | } |
399 | } |
380 | 400 | ||
Line 381... | Line 401... | ||
381 | if (INTEL_INFO(dev)->gen == 7) |
401 | if (INTEL_INFO(dev)->gen == 7) |
382 | err_printf(m, "ERR_INT: 0x%08x\n", error->err_int); |
- | |
383 | 402 | err_printf(m, "ERR_INT: 0x%08x\n", error->err_int); |
|
384 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) { |
403 | |
- | 404 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) |
|
- | 405 | i915_ring_error_state(m, dev, error, i); |
|
Line 385... | Line -... | ||
385 | err_printf(m, "%s command stream:\n", ring_str(i)); |
- | |
386 | i915_ring_error_state(m, dev, &error->ring[i]); |
406 | |
387 | } |
407 | for (i = 0; i < error->vm_count; i++) { |
388 | 408 | err_printf(m, "vm[%d]\n", i); |
|
Line 389... | Line -... | ||
389 | if (error->active_bo) |
- | |
390 | print_error_buffers(m, "Active", |
409 | |
391 | error->active_bo[0], |
410 | print_error_buffers(m, "Active", |
392 | error->active_bo_count[0]); |
411 | error->active_bo[i], |
- | 412 | error->active_bo_count[i]); |
|
Line 393... | Line 413... | ||
393 | 413 | ||
394 | if (error->pinned_bo) |
- | |
395 | print_error_buffers(m, "Pinned", |
- | |
396 | error->pinned_bo[0], |
414 | print_error_buffers(m, "Pinned", |
397 | error->pinned_bo_count[0]); |
415 | error->pinned_bo[i], |
398 | 416 | error->pinned_bo_count[i]); |
|
399 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) { |
417 | } |
400 | struct drm_i915_error_object *obj; |
418 | |
401 | 419 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) { |
|
402 | obj = error->ring[i].batchbuffer; |
420 | obj = error->ring[i].batchbuffer; |
403 | if (obj) { |
421 | if (obj) { |
- | 422 | err_puts(m, dev_priv->ring[i].name); |
|
404 | err_puts(m, dev_priv->ring[i].name); |
423 | if (error->ring[i].pid != -1) |
405 | if (error->ring[i].pid != -1) |
424 | err_printf(m, " (submitted by %s [%d])", |
406 | err_printf(m, " (submitted by %s [%d])", |
425 | error->ring[i].comm, |
Line 407... | Line 426... | ||
407 | error->ring[i].comm, |
426 | error->ring[i].pid); |
408 | error->ring[i].pid); |
427 | err_printf(m, " --- gtt_offset = 0x%08x %08x\n", |
409 | err_printf(m, " --- gtt_offset = 0x%08x\n", |
428 | upper_32_bits(obj->gtt_offset), |
410 | obj->gtt_offset); |
429 | lower_32_bits(obj->gtt_offset)); |
- | 430 | print_error_obj(m, obj); |
|
411 | print_error_obj(m, obj); |
431 | } |
412 | } |
432 | |
Line 413... | Line 433... | ||
413 | 433 | obj = error->ring[i].wa_batchbuffer; |
|
414 | obj = error->ring[i].wa_batchbuffer; |
434 | if (obj) { |
Line 431... | Line 451... | ||
431 | } |
451 | } |
Line 432... | Line 452... | ||
432 | 452 | ||
433 | if ((obj = error->ring[i].ringbuffer)) { |
453 | if ((obj = error->ring[i].ringbuffer)) { |
434 | err_printf(m, "%s --- ringbuffer = 0x%08x\n", |
454 | err_printf(m, "%s --- ringbuffer = 0x%08x\n", |
435 | dev_priv->ring[i].name, |
455 | dev_priv->ring[i].name, |
436 | obj->gtt_offset); |
456 | lower_32_bits(obj->gtt_offset)); |
437 | print_error_obj(m, obj); |
457 | print_error_obj(m, obj); |
Line 438... | Line 458... | ||
438 | } |
458 | } |
- | 459 | ||
- | 460 | if ((obj = error->ring[i].hws_page)) { |
|
- | 461 | u64 hws_offset = obj->gtt_offset; |
|
- | 462 | u32 *hws_page = &obj->pages[0][0]; |
|
- | 463 | ||
- | 464 | if (i915.enable_execlists) { |
|
- | 465 | hws_offset += LRC_PPHWSP_PN * PAGE_SIZE; |
|
439 | 466 | hws_page = &obj->pages[LRC_PPHWSP_PN][0]; |
|
440 | if ((obj = error->ring[i].hws_page)) { |
467 | } |
441 | err_printf(m, "%s --- HW Status = 0x%08x\n", |
- | |
442 | dev_priv->ring[i].name, |
468 | err_printf(m, "%s --- HW Status = 0x%08llx\n", |
443 | obj->gtt_offset); |
469 | dev_priv->ring[i].name, hws_offset); |
444 | offset = 0; |
470 | offset = 0; |
445 | for (elt = 0; elt < PAGE_SIZE/16; elt += 4) { |
471 | for (elt = 0; elt < PAGE_SIZE/16; elt += 4) { |
446 | err_printf(m, "[%04x] %08x %08x %08x %08x\n", |
472 | err_printf(m, "[%04x] %08x %08x %08x %08x\n", |
447 | offset, |
473 | offset, |
448 | obj->pages[0][elt], |
474 | hws_page[elt], |
449 | obj->pages[0][elt+1], |
475 | hws_page[elt+1], |
450 | obj->pages[0][elt+2], |
476 | hws_page[elt+2], |
451 | obj->pages[0][elt+3]); |
477 | hws_page[elt+3]); |
452 | offset += 16; |
478 | offset += 16; |
Line 453... | Line 479... | ||
453 | } |
479 | } |
454 | } |
480 | } |
455 | 481 | ||
456 | if ((obj = error->ring[i].ctx)) { |
482 | if ((obj = error->ring[i].ctx)) { |
457 | err_printf(m, "%s --- HW Context = 0x%08x\n", |
483 | err_printf(m, "%s --- HW Context = 0x%08x\n", |
458 | dev_priv->ring[i].name, |
484 | dev_priv->ring[i].name, |
459 | obj->gtt_offset); |
485 | lower_32_bits(obj->gtt_offset)); |
Line -... | Line 486... | ||
- | 486 | print_error_obj(m, obj); |
|
- | 487 | } |
|
- | 488 | } |
|
- | 489 | ||
- | 490 | if ((obj = error->semaphore_obj)) { |
|
- | 491 | err_printf(m, "Semaphore page = 0x%08x\n", |
|
- | 492 | lower_32_bits(obj->gtt_offset)); |
|
- | 493 | for (elt = 0; elt < PAGE_SIZE/16; elt += 4) { |
|
- | 494 | err_printf(m, "[%04x] %08x %08x %08x %08x\n", |
|
- | 495 | elt * 4, |
|
- | 496 | obj->pages[0][elt], |
|
- | 497 | obj->pages[0][elt+1], |
|
- | 498 | obj->pages[0][elt+2], |
|
460 | print_error_obj(m, obj); |
499 | obj->pages[0][elt+3]); |
461 | } |
500 | } |
Line 462... | Line 501... | ||
462 | } |
501 | } |
463 | 502 | ||
Line 473... | Line 512... | ||
473 | 512 | ||
474 | return 0; |
513 | return 0; |
Line 475... | Line 514... | ||
475 | } |
514 | } |
- | 515 | ||
476 | 516 | int i915_error_state_buf_init(struct drm_i915_error_state_buf *ebuf, |
|
477 | int i915_error_state_buf_init(struct drm_i915_error_state_buf *ebuf, |
517 | struct drm_i915_private *i915, |
478 | size_t count, loff_t pos) |
518 | size_t count, loff_t pos) |
- | 519 | { |
|
Line 479... | Line 520... | ||
479 | { |
520 | memset(ebuf, 0, sizeof(*ebuf)); |
480 | memset(ebuf, 0, sizeof(*ebuf)); |
521 | ebuf->i915 = i915; |
481 | 522 | ||
482 | /* We need to have enough room to store any i915_error_state printf |
523 | /* We need to have enough room to store any i915_error_state printf |
Line 523... | Line 564... | ||
523 | typeof(*error), ref); |
564 | typeof(*error), ref); |
524 | int i; |
565 | int i; |
Line 525... | Line 566... | ||
525 | 566 | ||
526 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) { |
567 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) { |
- | 568 | i915_error_object_free(error->ring[i].batchbuffer); |
|
527 | i915_error_object_free(error->ring[i].batchbuffer); |
569 | i915_error_object_free(error->ring[i].wa_batchbuffer); |
528 | i915_error_object_free(error->ring[i].ringbuffer); |
570 | i915_error_object_free(error->ring[i].ringbuffer); |
529 | i915_error_object_free(error->ring[i].hws_page); |
571 | i915_error_object_free(error->ring[i].hws_page); |
530 | i915_error_object_free(error->ring[i].ctx); |
572 | i915_error_object_free(error->ring[i].ctx); |
531 | kfree(error->ring[i].requests); |
573 | kfree(error->ring[i].requests); |
Line -... | Line 574... | ||
- | 574 | } |
|
- | 575 | ||
- | 576 | i915_error_object_free(error->semaphore_obj); |
|
- | 577 | ||
- | 578 | for (i = 0; i < error->vm_count; i++) |
|
532 | } |
579 | kfree(error->active_bo[i]); |
- | 580 | ||
- | 581 | kfree(error->active_bo); |
|
- | 582 | kfree(error->active_bo_count); |
|
533 | 583 | kfree(error->pinned_bo); |
|
534 | kfree(error->active_bo); |
584 | kfree(error->pinned_bo_count); |
535 | kfree(error->overlay); |
585 | kfree(error->overlay); |
536 | kfree(error->display); |
586 | kfree(error->display); |
Line 537... | Line 587... | ||
537 | kfree(error); |
587 | kfree(error); |
538 | } |
588 | } |
539 | 589 | ||
540 | static struct drm_i915_error_object * |
590 | static struct drm_i915_error_object * |
541 | i915_error_object_create_sized(struct drm_i915_private *dev_priv, |
- | |
542 | struct drm_i915_gem_object *src, |
591 | i915_error_object_create(struct drm_i915_private *dev_priv, |
543 | struct i915_address_space *vm, |
592 | struct drm_i915_gem_object *src, |
- | 593 | struct i915_address_space *vm) |
|
- | 594 | { |
|
- | 595 | struct drm_i915_error_object *dst; |
|
544 | const int num_pages) |
596 | struct i915_vma *vma = NULL; |
545 | { |
597 | int num_pages; |
Line 546... | Line 598... | ||
546 | struct drm_i915_error_object *dst; |
598 | bool use_ggtt; |
547 | int i; |
599 | int i = 0; |
Line -... | Line 600... | ||
- | 600 | u64 reloc_offset; |
|
- | 601 | ||
548 | u32 reloc_offset; |
602 | if (src == NULL || src->pages == NULL) |
549 | 603 | return NULL; |
|
550 | if (src == NULL || src->pages == NULL) |
604 | |
Line -... | Line 605... | ||
- | 605 | num_pages = src->base.size >> PAGE_SHIFT; |
|
551 | return NULL; |
606 | |
- | 607 | dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), GFP_ATOMIC); |
|
- | 608 | if (dst == NULL) |
|
- | 609 | return NULL; |
|
- | 610 | ||
- | 611 | if (i915_gem_obj_bound(src, vm)) |
|
- | 612 | dst->gtt_offset = i915_gem_obj_offset(src, vm); |
|
- | 613 | else |
|
- | 614 | dst->gtt_offset = -1; |
|
- | 615 | ||
- | 616 | reloc_offset = dst->gtt_offset; |
|
- | 617 | if (i915_is_ggtt(vm)) |
|
- | 618 | vma = i915_gem_obj_to_ggtt(src); |
|
- | 619 | use_ggtt = (src->cache_level == I915_CACHE_NONE && |
|
- | 620 | vma && (vma->bound & GLOBAL_BIND) && |
|
- | 621 | reloc_offset + num_pages * PAGE_SIZE <= dev_priv->gtt.mappable_end); |
|
- | 622 | ||
- | 623 | /* Cannot access stolen address directly, try to use the aperture */ |
|
- | 624 | if (src->stolen) { |
|
- | 625 | use_ggtt = true; |
|
- | 626 | ||
- | 627 | if (!(vma && vma->bound & GLOBAL_BIND)) |
|
- | 628 | goto unwind; |
|
- | 629 | ||
- | 630 | reloc_offset = i915_gem_obj_ggtt_offset(src); |
|
- | 631 | if (reloc_offset + num_pages * PAGE_SIZE > dev_priv->gtt.mappable_end) |
|
- | 632 | goto unwind; |
|
- | 633 | } |
|
552 | 634 | ||
553 | dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), GFP_ATOMIC); |
635 | /* Cannot access snooped pages through the aperture */ |
554 | if (dst == NULL) |
636 | if (use_ggtt && src->cache_level != I915_CACHE_NONE && !HAS_LLC(dev_priv->dev)) |
Line 555... | Line 637... | ||
555 | return NULL; |
637 | goto unwind; |
556 | 638 | ||
557 | reloc_offset = dst->gtt_offset = i915_gem_obj_offset(src, vm); |
639 | dst->page_count = num_pages; |
Line 558... | Line 640... | ||
558 | for (i = 0; i < num_pages; i++) { |
640 | while (num_pages--) { |
559 | unsigned long flags; |
- | |
560 | void *d; |
- | |
561 | - | ||
562 | d = kmalloc(PAGE_SIZE, GFP_ATOMIC); |
641 | unsigned long flags; |
563 | if (d == NULL) |
642 | void *d; |
Line 564... | Line 643... | ||
564 | goto unwind; |
643 | |
565 | 644 | d = kmalloc(PAGE_SIZE, GFP_ATOMIC); |
|
566 | local_irq_save(flags); |
645 | if (d == NULL) |
Line 577... | Line 656... | ||
577 | 656 | ||
578 | s = io_mapping_map_atomic_wc(dev_priv->gtt.mappable, |
657 | s = io_mapping_map_atomic_wc(dev_priv->gtt.mappable, |
579 | reloc_offset); |
658 | reloc_offset); |
580 | memcpy_fromio(d, s, PAGE_SIZE); |
659 | memcpy_fromio(d, s, PAGE_SIZE); |
581 | io_mapping_unmap_atomic(s); |
- | |
582 | } else if (src->stolen) { |
- | |
583 | unsigned long offset; |
- | |
584 | - | ||
585 | offset = dev_priv->mm.stolen_base; |
- | |
586 | offset += src->stolen->start; |
- | |
587 | offset += i << PAGE_SHIFT; |
- | |
588 | - | ||
589 | memcpy_fromio(d, (void __iomem *) offset, PAGE_SIZE); |
660 | io_mapping_unmap_atomic(s); |
590 | } else { |
661 | } else { |
591 | struct page *page; |
662 | struct page *page; |
Line 592... | Line 663... | ||
592 | void *s; |
663 | void *s; |
Line 601... | Line 672... | ||
601 | 672 | ||
602 | drm_clflush_pages(&page, 1); |
673 | drm_clflush_pages(&page, 1); |
603 | } |
674 | } |
Line 604... | Line 675... | ||
604 | local_irq_restore(flags); |
675 | local_irq_restore(flags); |
605 | - | ||
606 | dst->pages[i] = d; |
676 | |
607 | 677 | dst->pages[i++] = d; |
|
608 | reloc_offset += PAGE_SIZE; |
- | |
Line 609... | Line 678... | ||
609 | } |
678 | reloc_offset += PAGE_SIZE; |
Line 610... | Line 679... | ||
610 | dst->page_count = num_pages; |
679 | } |
611 | 680 | ||
612 | return dst; |
681 | return dst; |
613 | 682 | ||
614 | unwind: |
683 | unwind: |
615 | while (i--) |
684 | while (i--) |
616 | kfree(dst->pages[i]); |
- | |
617 | kfree(dst); |
- | |
618 | return NULL; |
- | |
619 | } |
- | |
620 | #define i915_error_object_create(dev_priv, src, vm) \ |
685 | kfree(dst->pages[i]); |
621 | i915_error_object_create_sized((dev_priv), (src), (vm), \ |
686 | kfree(dst); |
622 | (src)->base.size>>PAGE_SHIFT) |
- | |
Line 623... | Line 687... | ||
623 | 687 | return NULL; |
|
624 | #define i915_error_ggtt_object_create(dev_priv, src) \ |
688 | } |
625 | i915_error_object_create_sized((dev_priv), (src), &(dev_priv)->gtt.base, \ |
689 | #define i915_error_ggtt_object_create(dev_priv, src) \ |
- | 690 | i915_error_object_create((dev_priv), (src), &(dev_priv)->gtt.base) |
|
- | 691 | ||
- | 692 | static void capture_bo(struct drm_i915_error_buffer *err, |
|
626 | (src)->base.size>>PAGE_SHIFT) |
693 | struct i915_vma *vma) |
627 | 694 | { |
|
- | 695 | struct drm_i915_gem_object *obj = vma->obj; |
|
628 | static void capture_bo(struct drm_i915_error_buffer *err, |
696 | int i; |
629 | struct drm_i915_gem_object *obj) |
697 | |
630 | { |
698 | err->size = obj->base.size; |
631 | err->size = obj->base.size; |
699 | err->name = obj->base.name; |
632 | err->name = obj->base.name; |
700 | for (i = 0; i < I915_NUM_RINGS; i++) |
633 | err->rseqno = obj->last_read_seqno; |
701 | err->rseqno[i] = i915_gem_request_get_seqno(obj->last_read_req[i]); |
634 | err->wseqno = obj->last_write_seqno; |
702 | err->wseqno = i915_gem_request_get_seqno(obj->last_write_req); |
635 | err->gtt_offset = i915_gem_obj_ggtt_offset(obj); |
703 | err->gtt_offset = vma->node.start; |
636 | err->read_domains = obj->base.read_domains; |
704 | err->read_domains = obj->base.read_domains; |
637 | err->write_domain = obj->base.write_domain; |
- | |
638 | err->fence_reg = obj->fence_reg; |
- | |
639 | err->pinned = 0; |
705 | err->write_domain = obj->base.write_domain; |
640 | if (i915_gem_obj_is_pinned(obj)) |
706 | err->fence_reg = obj->fence_reg; |
641 | err->pinned = 1; |
707 | err->pinned = 0; |
642 | if (obj->user_pin_count > 0) |
708 | if (i915_gem_obj_is_pinned(obj)) |
643 | err->pinned = -1; |
709 | err->pinned = 1; |
- | 710 | err->tiling = obj->tiling_mode; |
|
644 | err->tiling = obj->tiling_mode; |
711 | err->dirty = obj->dirty; |
645 | err->dirty = obj->dirty; |
712 | err->purgeable = obj->madv != I915_MADV_WILLNEED; |
Line 646... | Line 713... | ||
646 | err->purgeable = obj->madv != I915_MADV_WILLNEED; |
713 | err->userptr = obj->userptr.mm != NULL; |
647 | err->userptr = obj->userptr.mm != NULL; |
714 | err->ring = obj->last_write_req ? |
648 | err->ring = obj->ring ? obj->ring->id : -1; |
715 | i915_gem_request_get_ring(obj->last_write_req)->id : -1; |
649 | err->cache_level = obj->cache_level; |
716 | err->cache_level = obj->cache_level; |
650 | } |
717 | } |
Line 651... | Line 718... | ||
651 | 718 | ||
652 | static u32 capture_active_bo(struct drm_i915_error_buffer *err, |
719 | static u32 capture_active_bo(struct drm_i915_error_buffer *err, |
653 | int count, struct list_head *head) |
720 | int count, struct list_head *head) |
654 | { |
721 | { |
655 | struct i915_vma *vma; |
722 | struct i915_vma *vma; |
Line 656... | Line 723... | ||
656 | int i = 0; |
723 | int i = 0; |
657 | 724 | ||
Line 658... | Line 725... | ||
658 | list_for_each_entry(vma, head, mm_list) { |
725 | list_for_each_entry(vma, head, mm_list) { |
659 | capture_bo(err++, vma->obj); |
726 | capture_bo(err++, vma); |
- | 727 | if (++i == count) |
|
660 | if (++i == count) |
728 | break; |
661 | break; |
729 | } |
662 | } |
730 | |
- | 731 | return i; |
|
Line 663... | Line 732... | ||
663 | 732 | } |
|
664 | return i; |
- | |
665 | } |
733 | |
Line 666... | Line -... | ||
666 | - | ||
667 | static u32 capture_pinned_bo(struct drm_i915_error_buffer *err, |
734 | static u32 capture_pinned_bo(struct drm_i915_error_buffer *err, |
668 | int count, struct list_head *head) |
735 | int count, struct list_head *head, |
- | 736 | struct i915_address_space *vm) |
|
- | 737 | { |
|
- | 738 | struct drm_i915_gem_object *obj; |
|
- | 739 | struct drm_i915_error_buffer * const first = err; |
|
669 | { |
740 | struct drm_i915_error_buffer * const last = err + count; |
Line 670... | Line 741... | ||
670 | struct drm_i915_gem_object *obj; |
741 | |
671 | int i = 0; |
742 | list_for_each_entry(obj, head, global_list) { |
Line 672... | Line 743... | ||
672 | 743 | struct i915_vma *vma; |
|
673 | list_for_each_entry(obj, head, global_list) { |
744 | |
674 | if (!i915_gem_obj_is_pinned(obj)) |
745 | if (err == last) |
Line 719... | Line 790... | ||
719 | struct drm_i915_error_state *error) |
790 | struct drm_i915_error_state *error) |
720 | { |
791 | { |
721 | struct drm_i915_private *dev_priv = dev->dev_private; |
792 | struct drm_i915_private *dev_priv = dev->dev_private; |
722 | int i; |
793 | int i; |
Line 723... | Line -... | ||
723 | - | ||
724 | /* Fences */ |
794 | |
725 | switch (INTEL_INFO(dev)->gen) { |
- | |
726 | case 8: |
- | |
727 | case 7: |
- | |
728 | case 6: |
795 | if (IS_GEN3(dev) || IS_GEN2(dev)) { |
729 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
- | |
730 | error->fence[i] = I915_READ64(FENCE_REG_SANDYBRIDGE_0 + (i * 8)); |
- | |
731 | break; |
- | |
732 | case 5: |
- | |
733 | case 4: |
- | |
734 | for (i = 0; i < 16; i++) |
796 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
735 | error->fence[i] = I915_READ64(FENCE_REG_965_0 + (i * 8)); |
- | |
736 | break; |
- | |
737 | case 3: |
797 | error->fence[i] = I915_READ(FENCE_REG(i)); |
738 | if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) |
798 | } else if (IS_GEN5(dev) || IS_GEN4(dev)) { |
739 | for (i = 0; i < 8; i++) |
799 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
740 | error->fence[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4)); |
800 | error->fence[i] = I915_READ64(FENCE_REG_965_LO(i)); |
741 | case 2: |
801 | } else if (INTEL_INFO(dev)->gen >= 6) { |
742 | for (i = 0; i < 8; i++) |
802 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
743 | error->fence[i] = I915_READ(FENCE_REG_830_0 + (i * 4)); |
- | |
744 | break; |
- | |
745 | - | ||
746 | default: |
- | |
747 | BUG(); |
803 | error->fence[i] = I915_READ64(FENCE_REG_GEN6_LO(i)); |
748 | } |
804 | } |
Line -... | Line 805... | ||
- | 805 | } |
|
749 | } |
806 | |
- | 807 | ||
750 | 808 | static void gen8_record_semaphore_state(struct drm_i915_private *dev_priv, |
|
751 | static void i915_record_ring_state(struct drm_device *dev, |
809 | struct drm_i915_error_state *error, |
752 | struct intel_engine_cs *ring, |
810 | struct intel_engine_cs *ring, |
753 | struct drm_i915_error_ring *ering) |
811 | struct drm_i915_error_ring *ering) |
- | 812 | { |
|
Line -... | Line 813... | ||
- | 813 | struct intel_engine_cs *to; |
|
- | 814 | int i; |
|
- | 815 | ||
754 | { |
816 | if (!i915_semaphore_is_enabled(dev_priv->dev)) |
- | 817 | return; |
|
- | 818 | ||
755 | struct drm_i915_private *dev_priv = dev->dev_private; |
819 | if (!error->semaphore_obj) |
- | 820 | error->semaphore_obj = |
|
- | 821 | i915_error_ggtt_object_create(dev_priv, |
|
- | 822 | dev_priv->semaphore_obj); |
|
- | 823 | ||
- | 824 | for_each_ring(to, dev_priv, i) { |
|
- | 825 | int idx; |
|
- | 826 | u16 signal_offset; |
|
- | 827 | u32 *tmp; |
|
- | 828 | ||
756 | 829 | if (ring == to) |
|
- | 830 | continue; |
|
757 | if (INTEL_INFO(dev)->gen >= 6) { |
831 | |
758 | ering->rc_psmi = I915_READ(ring->mmio_base + 0x50); |
832 | signal_offset = (GEN8_SIGNAL_OFFSET(ring, i) & (PAGE_SIZE - 1)) |
- | 833 | / 4; |
|
759 | ering->fault_reg = I915_READ(RING_FAULT_REG(ring)); |
834 | tmp = error->semaphore_obj->pages[0]; |
- | 835 | idx = intel_ring_sync_index(ring, to); |
|
- | 836 | ||
- | 837 | ering->semaphore_mboxes[idx] = tmp[signal_offset]; |
|
- | 838 | ering->semaphore_seqno[idx] = ring->semaphore.sync_seqno[idx]; |
|
- | 839 | } |
|
- | 840 | } |
|
- | 841 | ||
- | 842 | static void gen6_record_semaphore_state(struct drm_i915_private *dev_priv, |
|
- | 843 | struct intel_engine_cs *ring, |
|
760 | ering->semaphore_mboxes[0] |
844 | struct drm_i915_error_ring *ering) |
761 | = I915_READ(RING_SYNC_0(ring->mmio_base)); |
845 | { |
762 | ering->semaphore_mboxes[1] |
846 | ering->semaphore_mboxes[0] = I915_READ(RING_SYNC_0(ring->mmio_base)); |
763 | = I915_READ(RING_SYNC_1(ring->mmio_base)); |
- | |
Line 764... | Line 847... | ||
764 | ering->semaphore_seqno[0] = ring->semaphore.sync_seqno[0]; |
847 | ering->semaphore_mboxes[1] = I915_READ(RING_SYNC_1(ring->mmio_base)); |
765 | ering->semaphore_seqno[1] = ring->semaphore.sync_seqno[1]; |
848 | ering->semaphore_seqno[0] = ring->semaphore.sync_seqno[0]; |
766 | } |
849 | ering->semaphore_seqno[1] = ring->semaphore.sync_seqno[1]; |
767 | 850 | ||
768 | if (HAS_VEBOX(dev)) { |
851 | if (HAS_VEBOX(dev_priv->dev)) { |
- | 852 | ering->semaphore_mboxes[2] = |
|
- | 853 | I915_READ(RING_SYNC_2(ring->mmio_base)); |
|
- | 854 | ering->semaphore_seqno[2] = ring->semaphore.sync_seqno[2]; |
|
- | 855 | } |
|
- | 856 | } |
|
- | 857 | ||
- | 858 | static void i915_record_ring_state(struct drm_device *dev, |
|
- | 859 | struct drm_i915_error_state *error, |
|
- | 860 | struct intel_engine_cs *ring, |
|
- | 861 | struct drm_i915_error_ring *ering) |
|
- | 862 | { |
|
- | 863 | struct drm_i915_private *dev_priv = dev->dev_private; |
|
- | 864 | ||
- | 865 | if (INTEL_INFO(dev)->gen >= 6) { |
|
- | 866 | ering->rc_psmi = I915_READ(ring->mmio_base + 0x50); |
|
- | 867 | ering->fault_reg = I915_READ(RING_FAULT_REG(ring)); |
|
- | 868 | if (INTEL_INFO(dev)->gen >= 8) |
|
Line 769... | Line 869... | ||
769 | ering->semaphore_mboxes[2] = |
869 | gen8_record_semaphore_state(dev_priv, error, ring, ering); |
770 | I915_READ(RING_SYNC_2(ring->mmio_base)); |
870 | else |
771 | ering->semaphore_seqno[2] = ring->semaphore.sync_seqno[2]; |
871 | gen6_record_semaphore_state(dev_priv, ring, ering); |
772 | } |
872 | } |
Line 785... | Line 885... | ||
785 | ering->bbstate = I915_READ(RING_BBSTATE(ring->mmio_base)); |
885 | ering->bbstate = I915_READ(RING_BBSTATE(ring->mmio_base)); |
786 | } else { |
886 | } else { |
787 | ering->faddr = I915_READ(DMA_FADD_I8XX); |
887 | ering->faddr = I915_READ(DMA_FADD_I8XX); |
788 | ering->ipeir = I915_READ(IPEIR); |
888 | ering->ipeir = I915_READ(IPEIR); |
789 | ering->ipehr = I915_READ(IPEHR); |
889 | ering->ipehr = I915_READ(IPEHR); |
790 | ering->instdone = I915_READ(INSTDONE); |
890 | ering->instdone = I915_READ(GEN2_INSTDONE); |
791 | } |
891 | } |
Line 792... | Line 892... | ||
792 | 892 | ||
793 | ering->waiting = waitqueue_active(&ring->irq_queue); |
893 | ering->waiting = waitqueue_active(&ring->irq_queue); |
794 | ering->instpm = I915_READ(RING_INSTPM(ring->mmio_base)); |
894 | ering->instpm = I915_READ(RING_INSTPM(ring->mmio_base)); |
795 | ering->seqno = ring->get_seqno(ring, false); |
895 | ering->seqno = ring->get_seqno(ring, false); |
- | 896 | ering->acthd = intel_ring_get_active_head(ring); |
|
796 | ering->acthd = intel_ring_get_active_head(ring); |
897 | ering->start = I915_READ_START(ring); |
797 | ering->head = I915_READ_HEAD(ring); |
898 | ering->head = I915_READ_HEAD(ring); |
798 | ering->tail = I915_READ_TAIL(ring); |
899 | ering->tail = I915_READ_TAIL(ring); |
Line 799... | Line 900... | ||
799 | ering->ctl = I915_READ_CTL(ring); |
900 | ering->ctl = I915_READ_CTL(ring); |
Line 825... | Line 926... | ||
825 | } |
926 | } |
Line 826... | Line 927... | ||
826 | 927 | ||
827 | ering->hws = I915_READ(mmio); |
928 | ering->hws = I915_READ(mmio); |
Line 828... | Line -... | ||
828 | } |
- | |
829 | - | ||
830 | ering->cpu_ring_head = ring->buffer->head; |
- | |
831 | ering->cpu_ring_tail = ring->buffer->tail; |
929 | } |
832 | 930 | ||
Line 833... | Line 931... | ||
833 | ering->hangcheck_score = ring->hangcheck.score; |
931 | ering->hangcheck_score = ring->hangcheck.score; |
834 | ering->hangcheck_action = ring->hangcheck.action; |
932 | ering->hangcheck_action = ring->hangcheck.action; |
Line 835... | Line 933... | ||
835 | 933 | ||
Line 836... | Line 934... | ||
836 | if (USES_PPGTT(dev)) { |
934 | if (USES_PPGTT(dev)) { |
- | 935 | int i; |
|
- | 936 | ||
837 | int i; |
937 | ering->vm_info.gfx_mode = I915_READ(RING_MODE_GEN7(ring)); |
- | 938 | ||
- | 939 | if (IS_GEN6(dev)) |
|
- | 940 | ering->vm_info.pp_dir_base = |
|
838 | 941 | I915_READ(RING_PP_DIR_BASE_READ(ring)); |
|
839 | ering->vm_info.gfx_mode = I915_READ(RING_MODE_GEN7(ring)); |
942 | else if (IS_GEN7(dev)) |
840 | 943 | ering->vm_info.pp_dir_base = |
|
841 | switch (INTEL_INFO(dev)->gen) { |
944 | I915_READ(RING_PP_DIR_BASE(ring)); |
842 | case 8: |
945 | else if (INTEL_INFO(dev)->gen >= 8) |
843 | for (i = 0; i < 4; i++) { |
946 | for (i = 0; i < 4; i++) { |
844 | ering->vm_info.pdp[i] = |
947 | ering->vm_info.pdp[i] = |
845 | I915_READ(GEN8_RING_PDP_UDW(ring, i)); |
- | |
846 | ering->vm_info.pdp[i] <<= 32; |
- | |
847 | ering->vm_info.pdp[i] |= |
- | |
848 | I915_READ(GEN8_RING_PDP_LDW(ring, i)); |
- | |
849 | } |
- | |
850 | break; |
- | |
851 | case 7: |
- | |
852 | ering->vm_info.pp_dir_base = |
- | |
853 | I915_READ(RING_PP_DIR_BASE(ring)); |
- | |
854 | break; |
- | |
855 | case 6: |
948 | I915_READ(GEN8_RING_PDP_UDW(ring, i)); |
856 | ering->vm_info.pp_dir_base = |
949 | ering->vm_info.pdp[i] <<= 32; |
Line 857... | Line 950... | ||
857 | I915_READ(RING_PP_DIR_BASE_READ(ring)); |
950 | ering->vm_info.pdp[i] |= |
Line 871... | Line 964... | ||
871 | /* Currently render ring is the only HW context user */ |
964 | /* Currently render ring is the only HW context user */ |
872 | if (ring->id != RCS || !error->ccid) |
965 | if (ring->id != RCS || !error->ccid) |
873 | return; |
966 | return; |
Line 874... | Line 967... | ||
874 | 967 | ||
- | 968 | list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) { |
|
- | 969 | if (!i915_gem_obj_ggtt_bound(obj)) |
|
- | 970 | continue; |
|
875 | list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) { |
971 | |
876 | if ((error->ccid & PAGE_MASK) == i915_gem_obj_ggtt_offset(obj)) { |
972 | if ((error->ccid & PAGE_MASK) == i915_gem_obj_ggtt_offset(obj)) { |
877 | ering->ctx = i915_error_ggtt_object_create(dev_priv, obj); |
973 | ering->ctx = i915_error_ggtt_object_create(dev_priv, obj); |
878 | break; |
974 | break; |
879 | } |
975 | } |
Line 887... | Line 983... | ||
887 | struct drm_i915_gem_request *request; |
983 | struct drm_i915_gem_request *request; |
888 | int i, count; |
984 | int i, count; |
Line 889... | Line 985... | ||
889 | 985 | ||
890 | for (i = 0; i < I915_NUM_RINGS; i++) { |
986 | for (i = 0; i < I915_NUM_RINGS; i++) { |
- | 987 | struct intel_engine_cs *ring = &dev_priv->ring[i]; |
|
Line 891... | Line 988... | ||
891 | struct intel_engine_cs *ring = &dev_priv->ring[i]; |
988 | struct intel_ringbuffer *rbuf; |
Line 892... | Line 989... | ||
892 | 989 | ||
893 | error->ring[i].pid = -1; |
990 | error->ring[i].pid = -1; |
Line 894... | Line 991... | ||
894 | 991 | ||
Line 895... | Line 992... | ||
895 | if (ring->dev == NULL) |
992 | if (ring->dev == NULL) |
Line 896... | Line 993... | ||
896 | continue; |
993 | continue; |
897 | 994 | ||
- | 995 | error->ring[i].valid = true; |
|
- | 996 | ||
- | 997 | i915_record_ring_state(dev, error, ring, &error->ring[i]); |
|
- | 998 | ||
- | 999 | request = i915_gem_find_active_request(ring); |
|
- | 1000 | if (request) { |
|
898 | error->ring[i].valid = true; |
1001 | struct i915_address_space *vm; |
899 | 1002 | ||
900 | i915_record_ring_state(dev, ring, &error->ring[i]); |
1003 | vm = request->ctx && request->ctx->ppgtt ? |
901 | 1004 | &request->ctx->ppgtt->base : |
|
902 | request = i915_gem_find_active_request(ring); |
1005 | &dev_priv->gtt.base; |
903 | if (request) { |
1006 | |
904 | /* We need to copy these to an anonymous buffer |
1007 | /* We need to copy these to an anonymous buffer |
905 | * as the simplest method to avoid being overwritten |
1008 | * as the simplest method to avoid being overwritten |
906 | * by userspace. |
- | |
907 | */ |
- | |
Line 908... | Line 1009... | ||
908 | error->ring[i].batchbuffer = |
1009 | * by userspace. |
909 | i915_error_object_create(dev_priv, |
- | |
910 | request->batch_obj, |
1010 | */ |
911 | request->ctx ? |
1011 | error->ring[i].batchbuffer = |
912 | request->ctx->vm : |
1012 | i915_error_object_create(dev_priv, |
Line 913... | Line 1013... | ||
913 | &dev_priv->gtt.base); |
1013 | request->batch_obj, |
914 | 1014 | vm); |
|
Line 915... | Line 1015... | ||
915 | if (HAS_BROKEN_CS_TLB(dev_priv->dev) && |
1015 | |
916 | ring->scratch.obj) |
1016 | if (HAS_BROKEN_CS_TLB(dev_priv->dev)) |
917 | error->ring[i].wa_batchbuffer = |
- | |
918 | i915_error_ggtt_object_create(dev_priv, |
1017 | error->ring[i].wa_batchbuffer = |
919 | ring->scratch.obj); |
1018 | i915_error_ggtt_object_create(dev_priv, |
920 | 1019 | ring->scratch.obj); |
|
921 | if (request->file_priv) { |
1020 | |
922 | struct task_struct *task; |
1021 | if (request->pid) { |
923 | 1022 | struct task_struct *task; |
|
924 | rcu_read_lock(); |
1023 | |
Line -... | Line 1024... | ||
- | 1024 | rcu_read_lock(); |
|
- | 1025 | task = pid_task(request->pid, PIDTYPE_PID); |
|
- | 1026 | if (task) { |
|
- | 1027 | strcpy(error->ring[i].comm, task->comm); |
|
- | 1028 | error->ring[i].pid = task->pid; |
|
- | 1029 | } |
|
- | 1030 | rcu_read_unlock(); |
|
- | 1031 | } |
|
- | 1032 | } |
|
- | 1033 | ||
- | 1034 | if (i915.enable_execlists) { |
|
- | 1035 | /* TODO: This is only a small fix to keep basic error |
|
- | 1036 | * capture working, but we need to add more information |
|
- | 1037 | * for it to be useful (e.g. dump the context being |
|
- | 1038 | * executed). |
|
- | 1039 | */ |
|
925 | task = pid_task(request->file_priv->file->pid, |
1040 | if (request) |
926 | PIDTYPE_PID); |
1041 | rbuf = request->ctx->engine[ring->id].ringbuf; |
Line 927... | Line -... | ||
927 | if (task) { |
- | |
928 | strcpy(error->ring[i].comm, task->comm); |
1042 | else |
929 | error->ring[i].pid = task->pid; |
1043 | rbuf = ring->default_context->engine[ring->id].ringbuf; |
Line 930... | Line 1044... | ||
930 | } |
1044 | } else |
Line 959... | Line 1073... | ||
959 | struct drm_i915_error_request *erq; |
1073 | struct drm_i915_error_request *erq; |
Line 960... | Line 1074... | ||
960 | 1074 | ||
961 | erq = &error->ring[i].requests[count++]; |
1075 | erq = &error->ring[i].requests[count++]; |
962 | erq->seqno = request->seqno; |
1076 | erq->seqno = request->seqno; |
963 | erq->jiffies = request->emitted_jiffies; |
1077 | erq->jiffies = request->emitted_jiffies; |
964 | erq->tail = request->tail; |
1078 | erq->tail = request->postfix; |
965 | } |
1079 | } |
966 | } |
1080 | } |
Line 967... | Line 1081... | ||
967 | } |
1081 | } |
Line 981... | Line 1095... | ||
981 | 1095 | ||
982 | i = 0; |
1096 | i = 0; |
983 | list_for_each_entry(vma, &vm->active_list, mm_list) |
1097 | list_for_each_entry(vma, &vm->active_list, mm_list) |
984 | i++; |
1098 | i++; |
- | 1099 | error->active_bo_count[ndx] = i; |
|
985 | error->active_bo_count[ndx] = i; |
1100 | |
- | 1101 | list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) { |
|
986 | list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) |
1102 | list_for_each_entry(vma, &obj->vma_list, vma_link) |
987 | if (i915_gem_obj_is_pinned(obj)) |
1103 | if (vma->vm == vm && vma->pin_count > 0) |
- | 1104 | i++; |
|
988 | i++; |
1105 | } |
Line 989... | Line 1106... | ||
989 | error->pinned_bo_count[ndx] = i - error->active_bo_count[ndx]; |
1106 | error->pinned_bo_count[ndx] = i - error->active_bo_count[ndx]; |
990 | 1107 | ||
991 | if (i) { |
1108 | if (i) { |
Line 1002... | Line 1119... | ||
1002 | 1119 | ||
1003 | if (pinned_bo) |
1120 | if (pinned_bo) |
1004 | error->pinned_bo_count[ndx] = |
1121 | error->pinned_bo_count[ndx] = |
1005 | capture_pinned_bo(pinned_bo, |
1122 | capture_pinned_bo(pinned_bo, |
1006 | error->pinned_bo_count[ndx], |
1123 | error->pinned_bo_count[ndx], |
1007 | &dev_priv->mm.bound_list); |
1124 | &dev_priv->mm.bound_list, vm); |
1008 | error->active_bo[ndx] = active_bo; |
1125 | error->active_bo[ndx] = active_bo; |
1009 | error->pinned_bo[ndx] = pinned_bo; |
1126 | error->pinned_bo[ndx] = pinned_bo; |
Line 1010... | Line 1127... | ||
1010 | } |
1127 | } |
Line 1023... | Line 1140... | ||
1023 | error->active_bo_count = kcalloc(cnt, sizeof(*error->active_bo_count), |
1140 | error->active_bo_count = kcalloc(cnt, sizeof(*error->active_bo_count), |
1024 | GFP_ATOMIC); |
1141 | GFP_ATOMIC); |
1025 | error->pinned_bo_count = kcalloc(cnt, sizeof(*error->pinned_bo_count), |
1142 | error->pinned_bo_count = kcalloc(cnt, sizeof(*error->pinned_bo_count), |
1026 | GFP_ATOMIC); |
1143 | GFP_ATOMIC); |
Line -... | Line 1144... | ||
- | 1144 | ||
- | 1145 | if (error->active_bo == NULL || |
|
- | 1146 | error->pinned_bo == NULL || |
|
- | 1147 | error->active_bo_count == NULL || |
|
- | 1148 | error->pinned_bo_count == NULL) { |
|
- | 1149 | kfree(error->active_bo); |
|
- | 1150 | kfree(error->active_bo_count); |
|
- | 1151 | kfree(error->pinned_bo); |
|
- | 1152 | kfree(error->pinned_bo_count); |
|
- | 1153 | ||
- | 1154 | error->active_bo = NULL; |
|
- | 1155 | error->active_bo_count = NULL; |
|
- | 1156 | error->pinned_bo = NULL; |
|
- | 1157 | error->pinned_bo_count = NULL; |
|
1027 | 1158 | } else { |
|
1028 | list_for_each_entry(vm, &dev_priv->vm_list, global_link) |
1159 | list_for_each_entry(vm, &dev_priv->vm_list, global_link) |
- | 1160 | i915_gem_capture_vm(dev_priv, error, vm, i++); |
|
- | 1161 | ||
- | 1162 | error->vm_count = cnt; |
|
1029 | i915_gem_capture_vm(dev_priv, error, vm, i++); |
1163 | } |
Line 1030... | Line 1164... | ||
1030 | } |
1164 | } |
1031 | 1165 | ||
1032 | /* Capture all registers which don't fit into another category. */ |
1166 | /* Capture all registers which don't fit into another category. */ |
1033 | static void i915_capture_reg_state(struct drm_i915_private *dev_priv, |
1167 | static void i915_capture_reg_state(struct drm_i915_private *dev_priv, |
1034 | struct drm_i915_error_state *error) |
1168 | struct drm_i915_error_state *error) |
- | 1169 | { |
|
Line 1035... | Line 1170... | ||
1035 | { |
1170 | struct drm_device *dev = dev_priv->dev; |
1036 | struct drm_device *dev = dev_priv->dev; |
1171 | int i; |
1037 | 1172 | ||
1038 | /* General organization |
1173 | /* General organization |
Line 1043... | Line 1178... | ||
1043 | * Please try to follow the order. |
1178 | * Please try to follow the order. |
1044 | */ |
1179 | */ |
Line 1045... | Line 1180... | ||
1045 | 1180 | ||
1046 | /* 1: Registers specific to a single generation */ |
1181 | /* 1: Registers specific to a single generation */ |
- | 1182 | if (IS_VALLEYVIEW(dev)) { |
|
1047 | if (IS_VALLEYVIEW(dev)) { |
1183 | error->gtier[0] = I915_READ(GTIER); |
1048 | error->ier = I915_READ(GTIER) | I915_READ(VLV_IER); |
1184 | error->ier = I915_READ(VLV_IER); |
1049 | error->forcewake = I915_READ(FORCEWAKE_VLV); |
1185 | error->forcewake = I915_READ(FORCEWAKE_VLV); |
Line 1050... | Line 1186... | ||
1050 | } |
1186 | } |
1051 | 1187 | ||
Line -... | Line 1188... | ||
- | 1188 | if (IS_GEN7(dev)) |
|
- | 1189 | error->err_int = I915_READ(GEN7_ERR_INT); |
|
- | 1190 | ||
- | 1191 | if (INTEL_INFO(dev)->gen >= 8) { |
|
- | 1192 | error->fault_data0 = I915_READ(GEN8_FAULT_TLB_DATA0); |
|
1052 | if (IS_GEN7(dev)) |
1193 | error->fault_data1 = I915_READ(GEN8_FAULT_TLB_DATA1); |
1053 | error->err_int = I915_READ(GEN7_ERR_INT); |
1194 | } |
1054 | 1195 | ||
1055 | if (IS_GEN6(dev)) { |
1196 | if (IS_GEN6(dev)) { |
1056 | error->forcewake = I915_READ(FORCEWAKE); |
1197 | error->forcewake = I915_READ(FORCEWAKE); |
Line 1076... | Line 1217... | ||
1076 | 1217 | ||
1077 | /* 4: Everything else */ |
1218 | /* 4: Everything else */ |
1078 | if (HAS_HW_CONTEXTS(dev)) |
1219 | if (HAS_HW_CONTEXTS(dev)) |
Line -... | Line 1220... | ||
- | 1220 | error->ccid = I915_READ(CCID); |
|
- | 1221 | ||
- | 1222 | if (INTEL_INFO(dev)->gen >= 8) { |
|
- | 1223 | error->ier = I915_READ(GEN8_DE_MISC_IER); |
|
1079 | error->ccid = I915_READ(CCID); |
1224 | for (i = 0; i < 4; i++) |
1080 | 1225 | error->gtier[i] = I915_READ(GEN8_GT_IER(i)); |
|
1081 | if (HAS_PCH_SPLIT(dev)) |
1226 | } else if (HAS_PCH_SPLIT(dev)) { |
1082 | error->ier = I915_READ(DEIER) | I915_READ(GTIER); |
1227 | error->ier = I915_READ(DEIER); |
1083 | else { |
1228 | error->gtier[0] = I915_READ(GTIER); |
1084 | if (IS_GEN2(dev)) |
1229 | } else if (IS_GEN2(dev)) { |
1085 | error->ier = I915_READ16(IER); |
1230 | error->ier = I915_READ16(IER); |
1086 | else |
1231 | } else if (!IS_VALLEYVIEW(dev)) { |
1087 | error->ier = I915_READ(IER); |
- | |
1088 | } |
- | |
1089 | 1232 | error->ier = I915_READ(IER); |
|
1090 | /* 4: Everything else */ |
1233 | } |
Line 1091... | Line 1234... | ||
1091 | error->eir = I915_READ(EIR); |
1234 | error->eir = I915_READ(EIR); |
1092 | error->pgtbl_er = I915_READ(PGTBL_ER); |
1235 | error->pgtbl_er = I915_READ(PGTBL_ER); |
Line 1104... | Line 1247... | ||
1104 | int ring_id = -1, len; |
1247 | int ring_id = -1, len; |
Line 1105... | Line 1248... | ||
1105 | 1248 | ||
Line 1106... | Line 1249... | ||
1106 | ecode = i915_error_generate_code(dev_priv, error, &ring_id); |
1249 | ecode = i915_error_generate_code(dev_priv, error, &ring_id); |
1107 | 1250 | ||
- | 1251 | len = scnprintf(error->error_msg, sizeof(error->error_msg), |
|
Line 1108... | Line 1252... | ||
1108 | len = scnprintf(error->error_msg, sizeof(error->error_msg), |
1252 | "GPU HANG: ecode %d:%d:0x%08x", |
1109 | "GPU HANG: ecode %d:0x%08x", ring_id, ecode); |
1253 | INTEL_INFO(dev)->gen, ring_id, ecode); |
1110 | 1254 | ||
1111 | if (ring_id != -1 && error->ring[ring_id].pid != -1) |
1255 | if (ring_id != -1 && error->ring[ring_id].pid != -1) |
Line 1122... | Line 1266... | ||
1122 | } |
1266 | } |
Line 1123... | Line 1267... | ||
1123 | 1267 | ||
1124 | static void i915_capture_gen_state(struct drm_i915_private *dev_priv, |
1268 | static void i915_capture_gen_state(struct drm_i915_private *dev_priv, |
1125 | struct drm_i915_error_state *error) |
1269 | struct drm_i915_error_state *error) |
- | 1270 | { |
|
- | 1271 | error->iommu = -1; |
|
- | 1272 | #ifdef CONFIG_INTEL_IOMMU |
|
- | 1273 | error->iommu = intel_iommu_gfx_mapped; |
|
1126 | { |
1274 | #endif |
1127 | error->reset_count = i915_reset_count(&dev_priv->gpu_error); |
1275 | error->reset_count = i915_reset_count(&dev_priv->gpu_error); |
1128 | error->suspend_count = dev_priv->suspend_count; |
1276 | error->suspend_count = dev_priv->suspend_count; |
Line 1129... | Line 1277... | ||
1129 | } |
1277 | } |
Line 1192... | Line 1340... | ||
1192 | 1340 | ||
1193 | void i915_error_state_get(struct drm_device *dev, |
1341 | void i915_error_state_get(struct drm_device *dev, |
1194 | struct i915_error_state_file_priv *error_priv) |
1342 | struct i915_error_state_file_priv *error_priv) |
1195 | { |
1343 | { |
1196 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
Line 1197... | Line 1344... | ||
1197 | unsigned long flags; |
1344 | struct drm_i915_private *dev_priv = dev->dev_private; |
1198 | 1345 | ||
1199 | spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); |
1346 | spin_lock_irq(&dev_priv->gpu_error.lock); |
1200 | error_priv->error = dev_priv->gpu_error.first_error; |
1347 | error_priv->error = dev_priv->gpu_error.first_error; |
1201 | if (error_priv->error) |
1348 | if (error_priv->error) |
Line 1202... | Line 1349... | ||
1202 | kref_get(&error_priv->error->ref); |
1349 | kref_get(&error_priv->error->ref); |
Line 1203... | Line 1350... | ||
1203 | spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); |
1350 | spin_unlock_irq(&dev_priv->gpu_error.lock); |
1204 | 1351 | ||
Line 1212... | Line 1359... | ||
1212 | 1359 | ||
1213 | void i915_destroy_error_state(struct drm_device *dev) |
1360 | void i915_destroy_error_state(struct drm_device *dev) |
1214 | { |
1361 | { |
1215 | struct drm_i915_private *dev_priv = dev->dev_private; |
1362 | struct drm_i915_private *dev_priv = dev->dev_private; |
1216 | struct drm_i915_error_state *error; |
- | |
Line 1217... | Line 1363... | ||
1217 | unsigned long flags; |
1363 | struct drm_i915_error_state *error; |
1218 | 1364 | ||
1219 | spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); |
1365 | spin_lock_irq(&dev_priv->gpu_error.lock); |
1220 | error = dev_priv->gpu_error.first_error; |
1366 | error = dev_priv->gpu_error.first_error; |
Line 1221... | Line 1367... | ||
1221 | dev_priv->gpu_error.first_error = NULL; |
1367 | dev_priv->gpu_error.first_error = NULL; |
1222 | spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); |
1368 | spin_unlock_irq(&dev_priv->gpu_error.lock); |
1223 | 1369 | ||
- | 1370 | if (error) |
|
Line 1224... | Line 1371... | ||
1224 | if (error) |
1371 | kref_put(&error->ref, i915_error_state_free); |
1225 | kref_put(&error->ref, i915_error_state_free); |
1372 | } |
1226 | } |
1373 | #endif |
1227 | 1374 | ||
1228 | const char *i915_cache_level_str(int type) |
1375 | const char *i915_cache_level_str(struct drm_i915_private *i915, int type) |
1229 | { |
1376 | { |
1230 | switch (type) { |
1377 | switch (type) { |
1231 | case I915_CACHE_NONE: return " uncached"; |
1378 | case I915_CACHE_NONE: return " uncached"; |
1232 | case I915_CACHE_LLC: return " snooped or LLC"; |
1379 | case I915_CACHE_LLC: return HAS_LLC(i915) ? " LLC" : " snooped"; |
1233 | case I915_CACHE_L3_LLC: return " L3+LLC"; |
1380 | case I915_CACHE_L3_LLC: return " L3+LLC"; |
1234 | case I915_CACHE_WT: return " WT"; |
- | |
Line 1235... | Line 1381... | ||
1235 | default: return ""; |
1381 | case I915_CACHE_WT: return " WT"; |
1236 | } |
1382 | default: return ""; |
1237 | } |
1383 | } |
1238 | #endif |
1384 | } |
1239 | 1385 | ||
Line 1240... | Line 1386... | ||
1240 | /* NB: please notice the memset */ |
1386 | /* NB: please notice the memset */ |
1241 | void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone) |
- | |
1242 | { |
- | |
1243 | struct drm_i915_private *dev_priv = dev->dev_private; |
1387 | void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone) |
1244 | memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG); |
- | |
1245 | - | ||
1246 | switch (INTEL_INFO(dev)->gen) { |
1388 | { |
1247 | case 2: |
- | |
1248 | case 3: |
1389 | struct drm_i915_private *dev_priv = dev->dev_private; |
1249 | instdone[0] = I915_READ(INSTDONE); |
1390 | memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG); |
1250 | break; |
- | |
1251 | case 4: |
- | |
1252 | case 5: |
1391 | |
1253 | case 6: |
- | |
1254 | instdone[0] = I915_READ(INSTDONE_I965); |
- | |
1255 | instdone[1] = I915_READ(INSTDONE1); |
- | |
1256 | break; |
1392 | if (IS_GEN2(dev) || IS_GEN3(dev)) |
1257 | default: |
1393 | instdone[0] = I915_READ(GEN2_INSTDONE); |
1258 | WARN_ONCE(1, "Unsupported platform\n"); |
1394 | else if (IS_GEN4(dev) || IS_GEN5(dev) || IS_GEN6(dev)) { |
1259 | case 7: |
1395 | instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE)); |
1260 | case 8: |
- | |
1261 | case 9: |
1396 | instdone[1] = I915_READ(GEN4_INSTDONE1); |
1262 | instdone[0] = I915_READ(GEN7_INSTDONE_1); |
1397 | } else if (INTEL_INFO(dev)->gen >= 7) { |