WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/i915_gem_render_state.c


/*
 * Copyright © 2014 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 *
 * Authors:
 *    Mika Kuoppala 
 *
 */
 
#include "i915_drv.h"
#include "intel_renderstate.h"
 
static const struct intel_renderstate_rodata *
render_state_get_rodata(struct drm_device *dev, const int gen)
{
	switch (gen) {
	case 6:
		return &gen6_null_state;
	case 7:
		return &gen7_null_state;
	case 8:
		return &gen8_null_state;
	case 9:
		return &gen9_null_state;
	}
 
	return NULL;
}
 
static int render_state_init(struct render_state *so, struct drm_device *dev)
{
	int ret;
 
	so->gen = INTEL_INFO(dev)->gen;
	so->rodata = render_state_get_rodata(dev, so->gen);
	if (so->rodata == NULL)
		return 0;
 
	if (so->rodata->batch_items * 4 > 4096)
		return -EINVAL;
 
	so->obj = i915_gem_alloc_object(dev, 4096);
	if (so->obj == NULL)
		return -ENOMEM;
 
	ret = i915_gem_obj_ggtt_pin(so->obj, 4096, 0);
	if (ret)
		goto free_gem;
 
	so->ggtt_offset = i915_gem_obj_ggtt_offset(so->obj);
	return 0;
 
free_gem:
	drm_gem_object_unreference(&so->obj->base);
	return ret;
}
 
/*
 * Macro to add commands to auxiliary batch.
 * This macro only checks for page overflow before inserting the commands,
 * this is sufficient as the null state generator makes the final batch
 * with two passes to build command and state separately. At this point
 * the size of both are known and it compacts them by relocating the state
 * right after the commands taking care of aligment so we should sufficient
 * space below them for adding new commands.
 */
#define OUT_BATCH(batch, i, val)				\
	do {							\
		if (WARN_ON((i) >= PAGE_SIZE / sizeof(u32))) {	\
			ret = -ENOSPC;				\
			goto err_out;				\
		}						\
		(batch)[(i)++] = (val);				\
	} while(0)
 
static int render_state_setup(struct render_state *so)
{
	const struct intel_renderstate_rodata *rodata = so->rodata;
	unsigned int i = 0, reloc_index = 0;
	struct page *page;
	u32 *d;
	int ret;
 
	ret = i915_gem_object_set_to_cpu_domain(so->obj, true);
	if (ret)
		return ret;
 
	page = i915_gem_object_get_dirty_page(so->obj, 0);
	d = kmap(page);
 
	while (i < rodata->batch_items) {
		u32 s = rodata->batch[i];
 
		if (i * 4  == rodata->reloc[reloc_index]) {
			u64 r = s + so->ggtt_offset;
			s = lower_32_bits(r);
			if (so->gen >= 8) {
				if (i + 1 >= rodata->batch_items ||
				    rodata->batch[i + 1] != 0) {
					ret = -EINVAL;
					goto err_out;
				}
 
				d[i++] = s;
				s = upper_32_bits(r);
			}
 
			reloc_index++;
		}
 
		d[i++] = s;
	}
 
	while (i % CACHELINE_DWORDS)
		OUT_BATCH(d, i, MI_NOOP);
 
	so->aux_batch_offset = i * sizeof(u32);
 
	OUT_BATCH(d, i, MI_BATCH_BUFFER_END);
	so->aux_batch_size = (i * sizeof(u32)) - so->aux_batch_offset;
 
	/*
	 * Since we are sending length, we need to strictly conform to
	 * all requirements. For Gen2 this must be a multiple of 8.
	 */
	so->aux_batch_size = ALIGN(so->aux_batch_size, 8);
 
	kunmap(page);
 
	ret = i915_gem_object_set_to_gtt_domain(so->obj, false);
	if (ret)
		return ret;
 
	if (rodata->reloc[reloc_index] != -1) {
		DRM_ERROR("only %d relocs resolved\n", reloc_index);
		return -EINVAL;
	}
 
	return 0;
 
err_out:
	kunmap(page);
	return ret;
}
 
#undef OUT_BATCH
 
void i915_gem_render_state_fini(struct render_state *so)
{
	i915_gem_object_ggtt_unpin(so->obj);
	drm_gem_object_unreference(&so->obj->base);
}
 
int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
				  struct render_state *so)
{
	int ret;
 
	if (WARN_ON(ring->id != RCS))
		return -ENOENT;
 
	ret = render_state_init(so, ring->dev);
	if (ret)
		return ret;
 
	if (so->rodata == NULL)
		return 0;
 
	ret = render_state_setup(so);
	if (ret) {
		i915_gem_render_state_fini(so);
		return ret;
	}
 
	return 0;
}
 
int i915_gem_render_state_init(struct drm_i915_gem_request *req)
{
	struct render_state so;
	int ret;
 
	ret = i915_gem_render_state_prepare(req->ring, &so);
	if (ret)
		return ret;
 
	if (so.rodata == NULL)
		return 0;
 
	ret = req->ring->dispatch_execbuffer(req, so.ggtt_offset,
					     so.rodata->batch_items * 4,
					     I915_DISPATCH_SECURE);
	if (ret)
		goto out;
 
	if (so.aux_batch_size > 8) {
		ret = req->ring->dispatch_execbuffer(req,
						     (so.ggtt_offset +
						      so.aux_batch_offset),
						     so.aux_batch_size,
						     I915_DISPATCH_SECURE);
		if (ret)
			goto out;
	}
 
	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req);
 
out:
	i915_gem_render_state_fini(&so);
	return ret;
}

Rev 6084	Rev 6937
1	/*	1	/*
2	* Copyright © 2014 Intel Corporation	2	* Copyright © 2014 Intel Corporation
3	*	3	*
4	* Permission is hereby granted, free of charge, to any person obtaining a	4	* Permission is hereby granted, free of charge, to any person obtaining a
5	* copy of this software and associated documentation files (the "Software"),	5	* copy of this software and associated documentation files (the "Software"),
6	* to deal in the Software without restriction, including without limitation	6	* to deal in the Software without restriction, including without limitation
7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8	* and/or sell copies of the Software, and to permit persons to whom the	8	* and/or sell copies of the Software, and to permit persons to whom the
9	* Software is furnished to do so, subject to the following conditions:	9	* Software is furnished to do so, subject to the following conditions:
10	*	10	*
11	* The above copyright notice and this permission notice (including the next	11	* The above copyright notice and this permission notice (including the next
12	* paragraph) shall be included in all copies or substantial portions of the	12	* paragraph) shall be included in all copies or substantial portions of the
13	* Software.	13	* Software.
14	*	14	*
15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER	18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING	19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS	20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21	* IN THE SOFTWARE.	21	* IN THE SOFTWARE.
22	*	22	*
23	* Authors:	23	* Authors:
24	* Mika Kuoppala	24	* Mika Kuoppala
25	*	25	*
26	*/	26	*/
27		27
28	#include "i915_drv.h"	28	#include "i915_drv.h"
29	#include "intel_renderstate.h"	29	#include "intel_renderstate.h"
30		30
31	static const struct intel_renderstate_rodata *	31	static const struct intel_renderstate_rodata *
32	render_state_get_rodata(struct drm_device *dev, const int gen)	32	render_state_get_rodata(struct drm_device *dev, const int gen)
33	{	33	{
34	switch (gen) {	34	switch (gen) {
35	case 6:	35	case 6:
36	return &gen6_null_state;	36	return &gen6_null_state;
37	case 7:	37	case 7:
38	return &gen7_null_state;	38	return &gen7_null_state;
39	case 8:	39	case 8:
40	return &gen8_null_state;	40	return &gen8_null_state;
41	case 9:	41	case 9:
42	return &gen9_null_state;	42	return &gen9_null_state;
43	}	43	}
44		44
45	return NULL;	45	return NULL;
46	}	46	}
47		47
48	static int render_state_init(struct render_state so, struct drm_device dev)	48	static int render_state_init(struct render_state so, struct drm_device dev)
49	{	49	{
50	int ret;	50	int ret;
51		51
52	so->gen = INTEL_INFO(dev)->gen;	52	so->gen = INTEL_INFO(dev)->gen;
53	so->rodata = render_state_get_rodata(dev, so->gen);	53	so->rodata = render_state_get_rodata(dev, so->gen);
54	if (so->rodata == NULL)	54	if (so->rodata == NULL)
55	return 0;	55	return 0;
56		56
57	if (so->rodata->batch_items * 4 > 4096)	57	if (so->rodata->batch_items * 4 > 4096)
58	return -EINVAL;	58	return -EINVAL;
59		59
60	so->obj = i915_gem_alloc_object(dev, 4096);	60	so->obj = i915_gem_alloc_object(dev, 4096);
61	if (so->obj == NULL)	61	if (so->obj == NULL)
62	return -ENOMEM;	62	return -ENOMEM;
63		63
64	ret = i915_gem_obj_ggtt_pin(so->obj, 4096, 0);	64	ret = i915_gem_obj_ggtt_pin(so->obj, 4096, 0);
65	if (ret)	65	if (ret)
66	goto free_gem;	66	goto free_gem;
67		67
68	so->ggtt_offset = i915_gem_obj_ggtt_offset(so->obj);	68	so->ggtt_offset = i915_gem_obj_ggtt_offset(so->obj);
69	return 0;	69	return 0;
70		70
71	free_gem:	71	free_gem:
72	drm_gem_object_unreference(&so->obj->base);	72	drm_gem_object_unreference(&so->obj->base);
73	return ret;	73	return ret;
74	}	74	}
75		75
76	/*	76	/*
77	* Macro to add commands to auxiliary batch.	77	* Macro to add commands to auxiliary batch.
78	* This macro only checks for page overflow before inserting the commands,	78	* This macro only checks for page overflow before inserting the commands,
79	* this is sufficient as the null state generator makes the final batch	79	* this is sufficient as the null state generator makes the final batch
80	* with two passes to build command and state separately. At this point	80	* with two passes to build command and state separately. At this point
81	* the size of both are known and it compacts them by relocating the state	81	* the size of both are known and it compacts them by relocating the state
82	* right after the commands taking care of aligment so we should sufficient	82	* right after the commands taking care of aligment so we should sufficient
83	* space below them for adding new commands.	83	* space below them for adding new commands.
84	*/	84	*/
85	#define OUT_BATCH(batch, i, val) \	85	#define OUT_BATCH(batch, i, val) \
86	do { \	86	do { \
87	if (WARN_ON((i) >= PAGE_SIZE / sizeof(u32))) { \	87	if (WARN_ON((i) >= PAGE_SIZE / sizeof(u32))) { \
88	ret = -ENOSPC; \	88	ret = -ENOSPC; \
89	goto err_out; \	89	goto err_out; \
90	} \	90	} \
91	(batch)[(i)++] = (val); \	91	(batch)[(i)++] = (val); \
92	} while(0)	92	} while(0)
93		93
94	static int render_state_setup(struct render_state *so)	94	static int render_state_setup(struct render_state *so)
95	{	95	{
96	const struct intel_renderstate_rodata *rodata = so->rodata;	96	const struct intel_renderstate_rodata *rodata = so->rodata;
97	unsigned int i = 0, reloc_index = 0;	97	unsigned int i = 0, reloc_index = 0;
98	struct page *page;	98	struct page *page;
99	u32 *d;	99	u32 *d;
100	int ret;	100	int ret;
101		101
102	ret = i915_gem_object_set_to_cpu_domain(so->obj, true);	102	ret = i915_gem_object_set_to_cpu_domain(so->obj, true);
103	if (ret)	103	if (ret)
104	return ret;	104	return ret;
105		105
106	page = sg_page(so->obj->pages->sgl);	106	page = i915_gem_object_get_dirty_page(so->obj, 0);
107	d = kmap(page);	107	d = kmap(page);
108		108
109	while (i < rodata->batch_items) {	109	while (i < rodata->batch_items) {
110	u32 s = rodata->batch[i];	110	u32 s = rodata->batch[i];
111		111
112	if (i * 4 == rodata->reloc[reloc_index]) {	112	if (i * 4 == rodata->reloc[reloc_index]) {
113	u64 r = s + so->ggtt_offset;	113	u64 r = s + so->ggtt_offset;
114	s = lower_32_bits(r);	114	s = lower_32_bits(r);
115	if (so->gen >= 8) {	115	if (so->gen >= 8) {
116	if (i + 1 >= rodata->batch_items \|\|	116	if (i + 1 >= rodata->batch_items \|\|
117	rodata->batch[i + 1] != 0) {	117	rodata->batch[i + 1] != 0) {
118	ret = -EINVAL;	118	ret = -EINVAL;
119	goto err_out;	119	goto err_out;
120	}	120	}
121		121
122	d[i++] = s;	122	d[i++] = s;
123	s = upper_32_bits(r);	123	s = upper_32_bits(r);
124	}	124	}
125		125
126	reloc_index++;	126	reloc_index++;
127	}	127	}
128		128
129	d[i++] = s;	129	d[i++] = s;
130	}	130	}
131		131
132	while (i % CACHELINE_DWORDS)	132	while (i % CACHELINE_DWORDS)
133	OUT_BATCH(d, i, MI_NOOP);	133	OUT_BATCH(d, i, MI_NOOP);
134		134
135	so->aux_batch_offset = i * sizeof(u32);	135	so->aux_batch_offset = i * sizeof(u32);
136		136
137	OUT_BATCH(d, i, MI_BATCH_BUFFER_END);	137	OUT_BATCH(d, i, MI_BATCH_BUFFER_END);
138	so->aux_batch_size = (i * sizeof(u32)) - so->aux_batch_offset;	138	so->aux_batch_size = (i * sizeof(u32)) - so->aux_batch_offset;
139		139
140	/*	140	/*
141	* Since we are sending length, we need to strictly conform to	141	* Since we are sending length, we need to strictly conform to
142	* all requirements. For Gen2 this must be a multiple of 8.	142	* all requirements. For Gen2 this must be a multiple of 8.
143	*/	143	*/
144	so->aux_batch_size = ALIGN(so->aux_batch_size, 8);	144	so->aux_batch_size = ALIGN(so->aux_batch_size, 8);
145		145
146	kunmap(page);	146	kunmap(page);
147		147
148	ret = i915_gem_object_set_to_gtt_domain(so->obj, false);	148	ret = i915_gem_object_set_to_gtt_domain(so->obj, false);
149	if (ret)	149	if (ret)
150	return ret;	150	return ret;
151		151
152	if (rodata->reloc[reloc_index] != -1) {	152	if (rodata->reloc[reloc_index] != -1) {
153	DRM_ERROR("only %d relocs resolved\n", reloc_index);	153	DRM_ERROR("only %d relocs resolved\n", reloc_index);
154	return -EINVAL;	154	return -EINVAL;
155	}	155	}
156		156
157	return 0;	157	return 0;
158		158
159	err_out:	159	err_out:
160	kunmap(page);	160	kunmap(page);
161	return ret;	161	return ret;
162	}	162	}
163		163
164	#undef OUT_BATCH	164	#undef OUT_BATCH
165		165
166	void i915_gem_render_state_fini(struct render_state *so)	166	void i915_gem_render_state_fini(struct render_state *so)
167	{	167	{
168	i915_gem_object_ggtt_unpin(so->obj);	168	i915_gem_object_ggtt_unpin(so->obj);
169	drm_gem_object_unreference(&so->obj->base);	169	drm_gem_object_unreference(&so->obj->base);
170	}	170	}
171		171
172	int i915_gem_render_state_prepare(struct intel_engine_cs *ring,	172	int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
173	struct render_state *so)	173	struct render_state *so)
174	{	174	{
175	int ret;	175	int ret;
176		176
177	if (WARN_ON(ring->id != RCS))	177	if (WARN_ON(ring->id != RCS))
178	return -ENOENT;	178	return -ENOENT;
179		179
180	ret = render_state_init(so, ring->dev);	180	ret = render_state_init(so, ring->dev);
181	if (ret)	181	if (ret)
182	return ret;	182	return ret;
183		183
184	if (so->rodata == NULL)	184	if (so->rodata == NULL)
185	return 0;	185	return 0;
186		186
187	ret = render_state_setup(so);	187	ret = render_state_setup(so);
188	if (ret) {	188	if (ret) {
189	i915_gem_render_state_fini(so);	189	i915_gem_render_state_fini(so);
190	return ret;	190	return ret;
191	}	191	}
192		192
193	return 0;	193	return 0;
194	}	194	}
195		195
196	int i915_gem_render_state_init(struct drm_i915_gem_request *req)	196	int i915_gem_render_state_init(struct drm_i915_gem_request *req)
197	{	197	{
198	struct render_state so;	198	struct render_state so;
199	int ret;	199	int ret;
200		200
201	ret = i915_gem_render_state_prepare(req->ring, &so);	201	ret = i915_gem_render_state_prepare(req->ring, &so);
202	if (ret)	202	if (ret)
203	return ret;	203	return ret;
204		204
205	if (so.rodata == NULL)	205	if (so.rodata == NULL)
206	return 0;	206	return 0;
207		207
208	ret = req->ring->dispatch_execbuffer(req, so.ggtt_offset,	208	ret = req->ring->dispatch_execbuffer(req, so.ggtt_offset,
209	so.rodata->batch_items * 4,	209	so.rodata->batch_items * 4,
210	I915_DISPATCH_SECURE);	210	I915_DISPATCH_SECURE);
211	if (ret)	211	if (ret)
212	goto out;	212	goto out;
213		213
214	if (so.aux_batch_size > 8) {	214	if (so.aux_batch_size > 8) {
215	ret = req->ring->dispatch_execbuffer(req,	215	ret = req->ring->dispatch_execbuffer(req,
216	(so.ggtt_offset +	216	(so.ggtt_offset +
217	so.aux_batch_offset),	217	so.aux_batch_offset),
218	so.aux_batch_size,	218	so.aux_batch_size,
219	I915_DISPATCH_SECURE);	219	I915_DISPATCH_SECURE);
220	if (ret)	220	if (ret)
221	goto out;	221	goto out;
222	}	222	}
223		223
224	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req);	224	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req);
225		225
226	out:	226	out:
227	i915_gem_render_state_fini(&so);	227	i915_gem_render_state_fini(&so);
228	return ret;	228	return ret;
229	}	229	}

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/i915_gem_render_state.c – Rev 6084 → 6937