Subversion Repositories Kolibri OS

typedef uint64_t gen8_ppgtt_pdpe_t;

typedef uint64_t gen8_ppgtt_pdpe_t;

typedef uint64_t gen8_ppgtt_pml4e_t;

typedef uint64_t gen8_ppgtt_pml4e_t;

#define gtt_total_entries(gtt) ((gtt).base.total >> PAGE_SHIFT)

/* gen6-hsw has bit 11-4 for physical addr bit 39-32 */

/* gen6-hsw has bit 11-4 for physical addr bit 39-32 */

#define GEN6_GTT_ADDR_ENCODE(addr)	((addr) | (((addr) >> 28) & 0xff0))

#define GEN6_GTT_ADDR_ENCODE(addr)	((addr) | (((addr) >> 28) & 0xff0))

#define GEN6_PTE_ADDR_ENCODE(addr)	GEN6_GTT_ADDR_ENCODE(addr)

#define GEN6_PTE_ADDR_ENCODE(addr)	GEN6_GTT_ADDR_ENCODE(addr)

	union {

	union {

		struct {

		struct {

			u64 offset;

			u64 offset;

			unsigned int size;

			unsigned int size;

		} partial;

		} partial;

	} params;

	} params;

	struct sg_table *pages;

	struct sg_table *pages;

	/** Flags and address space this VMA is bound to */

	/** Flags and address space this VMA is bound to */

#define GLOBAL_BIND	(1<<0)

#define GLOBAL_BIND	(1<<0)

#define LOCAL_BIND	(1<<1)

#define LOCAL_BIND	(1<<1)

	unsigned int bound : 4;

	bool is_ggtt : 1;

	/**

	/**

	 * Support different GGTT views into the same object.

	 * Support different GGTT views into the same object.

	 * assumed in GEM functions which take no ggtt view parameter.

	 * assumed in GEM functions which take no ggtt view parameter.

	 */

	 */

	struct i915_ggtt_view ggtt_view;

	struct i915_ggtt_view ggtt_view;

	struct list_head vma_link; /* Link in the object's VMA list */

	struct list_head obj_link; /* Link in the object's VMA list */

	struct drm_device *dev;

	struct drm_device *dev;

	struct list_head global_link;

	struct list_head global_link;

	u64 start;		/* Start offset always 0 for dri2 */

	u64 start;		/* Start offset always 0 for dri2 */

	u64 total;		/* size addr space maps (ex. 2GB for ggtt) */

	u64 total;		/* size addr space maps (ex. 2GB for ggtt) */

	struct i915_page_scratch *scratch_page;

	struct i915_page_scratch *scratch_page;

	struct i915_page_table *scratch_pt;

	struct i915_page_table *scratch_pt;

	struct i915_page_directory *scratch_pd;

	struct i915_page_directory *scratch_pd;

	int (*bind_vma)(struct i915_vma *vma,

	int (*bind_vma)(struct i915_vma *vma,

			enum i915_cache_level cache_level,

			enum i915_cache_level cache_level,

			u32 flags);

			u32 flags);

};

};

/* The Graphics Translation Table is the way in which GEN hardware translates a

/* The Graphics Translation Table is the way in which GEN hardware translates a

 * Graphics Virtual Address into a Physical Address. In addition to the normal

 * Graphics Virtual Address into a Physical Address. In addition to the normal

 * collateral associated with any va->pa translations GEN hardware also has a

 * collateral associated with any va->pa translations GEN hardware also has a

 * portion of the GTT which can be mapped by the CPU and remain both coherent

 * portion of the GTT which can be mapped by the CPU and remain both coherent

struct i915_gtt {

struct i915_gtt {

	struct i915_address_space base;

	struct i915_address_space base;

	size_t stolen_size;		/* Total size of stolen memory */

	size_t stolen_size;		/* Total size of stolen memory */

	size_t stolen_usable_size;	/* Total size minus BIOS reserved */

	size_t stolen_reserved_size;

	u64 mappable_end;		/* End offset that we can CPU map */

	u64 mappable_end;		/* End offset that we can CPU map */

	struct io_mapping *mappable;	/* Mapping to our CPU mappable region */

	struct io_mapping *mappable;	/* Mapping to our CPU mappable region */

	phys_addr_t mappable_base;	/* PA of our GMADR */

	phys_addr_t mappable_base;	/* PA of our GMADR */

 * GEN6_PTES for GEN6, and GEN8_PTES for GEN8.

 * GEN6_PTES for GEN6, and GEN8_PTES for GEN8.

*/

*/

static inline uint32_t i915_pte_count(uint64_t addr, size_t length,

static inline uint32_t i915_pte_count(uint64_t addr, size_t length,

				      uint32_t pde_shift)

				      uint32_t pde_shift)

{

{

	uint64_t end;

	uint64_t end;

	WARN_ON(length == 0);

	WARN_ON(length == 0);