Rev 6937 | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 6937 | Rev 7144 | ||
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| 32 | * fences used to track command completion but hardware detiler objects which |
32 | * fences used to track command completion but hardware detiler objects which |
| 33 | * wrap a given range of the global GTT. Each platform has only a fairly limited |
33 | * wrap a given range of the global GTT. Each platform has only a fairly limited |
| 34 | * set of these objects. |
34 | * set of these objects. |
| 35 | * |
35 | * |
| 36 | * Fences are used to detile GTT memory mappings. They're also connected to the |
36 | * Fences are used to detile GTT memory mappings. They're also connected to the |
| 37 | * hardware frontbuffer render tracking and hence interract with frontbuffer |
37 | * hardware frontbuffer render tracking and hence interact with frontbuffer |
| 38 | * conmpression. Furthermore on older platforms fences are required for tiled |
38 | * compression. Furthermore on older platforms fences are required for tiled |
| 39 | * objects used by the display engine. They can also be used by the render |
39 | * objects used by the display engine. They can also be used by the render |
| 40 | * engine - they're required for blitter commands and are optional for render |
40 | * engine - they're required for blitter commands and are optional for render |
| 41 | * commands. But on gen4+ both display (with the exception of fbc) and rendering |
41 | * commands. But on gen4+ both display (with the exception of fbc) and rendering |
| 42 | * have their own tiling state bits and don't need fences. |
42 | * have their own tiling state bits and don't need fences. |
| 43 | * |
43 | * |
| 44 | * Also note that fences only support X and Y tiling and hence can't be used for |
44 | * Also note that fences only support X and Y tiling and hence can't be used for |
| 45 | * the fancier new tiling formats like W, Ys and Yf. |
45 | * the fancier new tiling formats like W, Ys and Yf. |
| 46 | * |
46 | * |
| 47 | * Finally note that because fences are such a restricted resource they're |
47 | * Finally note that because fences are such a restricted resource they're |
| 48 | * dynamically associated with objects. Furthermore fence state is committed to |
48 | * dynamically associated with objects. Furthermore fence state is committed to |
| 49 | * the hardware lazily to avoid unecessary stalls on gen2/3. Therefore code must |
49 | * the hardware lazily to avoid unnecessary stalls on gen2/3. Therefore code must |
| 50 | * explictly call i915_gem_object_get_fence() to synchronize fencing status |
50 | * explicitly call i915_gem_object_get_fence() to synchronize fencing status |
| 51 | * for cpu access. Also note that some code wants an unfenced view, for those |
51 | * for cpu access. Also note that some code wants an unfenced view, for those |
| 52 | * cases the fence can be removed forcefully with i915_gem_object_put_fence(). |
52 | * cases the fence can be removed forcefully with i915_gem_object_put_fence(). |
| 53 | * |
53 | * |
| 54 | * Internally these functions will synchronize with userspace access by removing |
54 | * Internally these functions will synchronize with userspace access by removing |
| 55 | * CPU ptes into GTT mmaps (not the GTT ptes themselves) as needed. |
55 | * CPU ptes into GTT mmaps (not the GTT ptes themselves) as needed. |
| Line 525... | Line 525... | ||
| 525 | * |
525 | * |
| 526 | * If we don't have interleaved memory, all tiling is safe and no swizzling is |
526 | * If we don't have interleaved memory, all tiling is safe and no swizzling is |
| 527 | * required. |
527 | * required. |
| 528 | * |
528 | * |
| 529 | * When bit 17 is XORed in, we simply refuse to tile at all. Bit |
529 | * When bit 17 is XORed in, we simply refuse to tile at all. Bit |
| 530 | * 17 is not just a page offset, so as we page an objet out and back in, |
530 | * 17 is not just a page offset, so as we page an object out and back in, |
| 531 | * individual pages in it will have different bit 17 addresses, resulting in |
531 | * individual pages in it will have different bit 17 addresses, resulting in |
| 532 | * each 64 bytes being swapped with its neighbor! |
532 | * each 64 bytes being swapped with its neighbor! |
| 533 | * |
533 | * |
| 534 | * Otherwise, if interleaved, we have to tell the 3d driver what the address |
534 | * Otherwise, if interleaved, we have to tell the 3d driver what the address |
| 535 | * swizzling it needs to do is, since it's writing with the CPU to the pages |
535 | * swizzling it needs to do is, since it's writing with the CPU to the pages |