WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/i915_gem_execbuffer.c


/*
 * Copyright © 2008,2010 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 *
 * Authors:
 *    Eric Anholt 
 *    Chris Wilson 
 *
 */
 
#include 
#include 
#include "i915_drv.h"
#include "i915_trace.h"
#include "intel_drv.h"
//#include 
 
#define I915_EXEC_SECURE        (1<<9)
#define I915_EXEC_IS_PINNED     (1<<10)
#define I915_EXEC_VEBOX         (4<<0)
 
#define wmb() asm volatile ("sfence")
 
struct drm_i915_gem_object *get_fb_obj();
 
 
static unsigned long
copy_to_user(void __user *to, const void *from, unsigned long n)
{
    memcpy(to, from, n);
    return 0;
}
 
static unsigned long
copy_from_user(void *to, const void __user *from, unsigned long n)
{
    memcpy(to, from, n);
    return 0;
}
 
struct eb_objects {
	struct list_head objects;
	int and;
	union {
		struct drm_i915_gem_object *lut[0];
	struct hlist_head buckets[0];
	};
};
 
static struct eb_objects *
eb_create(struct drm_i915_gem_execbuffer2 *args)
{
	struct eb_objects *eb = NULL;
 
	if (args->flags & I915_EXEC_HANDLE_LUT) {
		int size = args->buffer_count;
		size *= sizeof(struct drm_i915_gem_object *);
		size += sizeof(struct eb_objects);
		eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
	}
 
	if (eb == NULL) {
		int size = args->buffer_count;
	int count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
		BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
		while (count > 2*size)
		count >>= 1;
	eb = kzalloc(count*sizeof(struct hlist_head) +
		     sizeof(struct eb_objects),
			     GFP_TEMPORARY);
	if (eb == NULL)
		return eb;
 
	eb->and = count - 1;
	} else
		eb->and = -args->buffer_count;
 
	INIT_LIST_HEAD(&eb->objects);
	return eb;
}
 
static void
eb_reset(struct eb_objects *eb)
{
	if (eb->and >= 0)
	memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
}
 
static int
eb_lookup_objects(struct eb_objects *eb,
		  struct drm_i915_gem_exec_object2 *exec,
		  const struct drm_i915_gem_execbuffer2 *args,
		  struct drm_file *file)
{
	int i;
 
	spin_lock(&file->table_lock);
	for (i = 0; i < args->buffer_count; i++) {
		struct drm_i915_gem_object *obj;
 
        if(exec[i].handle == -2)
            obj = get_fb_obj();
        else
		    obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
		if (obj == NULL) {
			spin_unlock(&file->table_lock);
			DRM_DEBUG("Invalid object handle %d at index %d\n",
				   exec[i].handle, i);
			return -ENOENT;
		}
 
		if (!list_empty(&obj->exec_list)) {
			spin_unlock(&file->table_lock);
			DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
				   obj, exec[i].handle, i);
			return -EINVAL;
		}
 
		drm_gem_object_reference(&obj->base);
		list_add_tail(&obj->exec_list, &eb->objects);
 
		obj->exec_entry = &exec[i];
 
        if(exec[i].handle == -2)
            continue;
 
		if (eb->and < 0) {
			eb->lut[i] = obj;
		} else {
			uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
			obj->exec_handle = handle;
	hlist_add_head(&obj->exec_node,
				       &eb->buckets[handle & eb->and]);
		}
	}
	spin_unlock(&file->table_lock);
 
	return 0;
}
 
static struct drm_i915_gem_object *
eb_get_object(struct eb_objects *eb, unsigned long handle)
{
 
    if(handle == -2)
        return get_fb_obj();
 
	if (eb->and < 0) {
		if (handle >= -eb->and)
			return NULL;
		return eb->lut[handle];
	} else {
	struct hlist_head *head;
	struct hlist_node *node;
 
	head = &eb->buckets[handle & eb->and];
	hlist_for_each(node, head) {
			struct drm_i915_gem_object *obj;
 
		obj = hlist_entry(node, struct drm_i915_gem_object, exec_node);
		if (obj->exec_handle == handle)
			return obj;
	}
	return NULL;
	}
}
 
static void
eb_destroy(struct eb_objects *eb)
{
	while (!list_empty(&eb->objects)) {
		struct drm_i915_gem_object *obj;
 
		obj = list_first_entry(&eb->objects,
				       struct drm_i915_gem_object,
				       exec_list);
		list_del_init(&obj->exec_list);
		drm_gem_object_unreference(&obj->base);
	}
	kfree(eb);
}
 
static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
{
	return (obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
		!obj->map_and_fenceable ||
		obj->cache_level != I915_CACHE_NONE);
}
 
static int
i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
				   struct eb_objects *eb,
				   struct drm_i915_gem_relocation_entry *reloc,
				   struct i915_address_space *vm)
{
	struct drm_device *dev = obj->base.dev;
	struct drm_gem_object *target_obj;
	struct drm_i915_gem_object *target_i915_obj;
	uint32_t target_offset;
	int ret = -EINVAL;
 
	/* we've already hold a reference to all valid objects */
	target_obj = &eb_get_object(eb, reloc->target_handle)->base;
	if (unlikely(target_obj == NULL))
		return -ENOENT;
 
	target_i915_obj = to_intel_bo(target_obj);
	target_offset = i915_gem_obj_ggtt_offset(target_i915_obj);
 
	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
	 * pipe_control writes because the gpu doesn't properly redirect them
	 * through the ppgtt for non_secure batchbuffers. */
	if (unlikely(IS_GEN6(dev) &&
	    reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
	    !target_i915_obj->has_global_gtt_mapping)) {
		i915_gem_gtt_bind_object(target_i915_obj,
					 target_i915_obj->cache_level);
	}
 
	/* Validate that the target is in a valid r/w GPU domain */
	if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
		DRM_DEBUG("reloc with multiple write domains: "
			  "obj %p target %d offset %d "
			  "read %08x write %08x",
			  obj, reloc->target_handle,
			  (int) reloc->offset,
			  reloc->read_domains,
			  reloc->write_domain);
		return ret;
	}
	if (unlikely((reloc->write_domain | reloc->read_domains)
		     & ~I915_GEM_GPU_DOMAINS)) {
		DRM_DEBUG("reloc with read/write non-GPU domains: "
			  "obj %p target %d offset %d "
			  "read %08x write %08x",
			  obj, reloc->target_handle,
			  (int) reloc->offset,
			  reloc->read_domains,
			  reloc->write_domain);
		return ret;
	}
 
	target_obj->pending_read_domains |= reloc->read_domains;
	target_obj->pending_write_domain |= reloc->write_domain;
 
	/* If the relocation already has the right value in it, no
	 * more work needs to be done.
	 */
	if (target_offset == reloc->presumed_offset)
		return 0;
 
	/* Check that the relocation address is valid... */
	if (unlikely(reloc->offset > obj->base.size - 4)) {
		DRM_DEBUG("Relocation beyond object bounds: "
			  "obj %p target %d offset %d size %d.\n",
			  obj, reloc->target_handle,
			  (int) reloc->offset,
			  (int) obj->base.size);
		return ret;
	}
	if (unlikely(reloc->offset & 3)) {
		DRM_DEBUG("Relocation not 4-byte aligned: "
			  "obj %p target %d offset %d.\n",
			  obj, reloc->target_handle,
			  (int) reloc->offset);
		return ret;
	}
 
	/* We can't wait for rendering with pagefaults disabled */
 
	reloc->delta += target_offset;
	if (use_cpu_reloc(obj)) {
		uint32_t page_offset = reloc->offset & ~PAGE_MASK;
		char *vaddr;
 
		ret = i915_gem_object_set_to_cpu_domain(obj, 1);
		if (ret)
			return ret;
 
        vaddr = (char *)MapIoMem((addr_t)i915_gem_object_get_page(obj,
                                 reloc->offset >> PAGE_SHIFT), 4096, 3);
		*(uint32_t *)(vaddr + page_offset) = reloc->delta;
        FreeKernelSpace(vaddr);
	} else {
		struct drm_i915_private *dev_priv = dev->dev_private;
		uint32_t __iomem *reloc_entry;
		void __iomem *reloc_page;
 
		ret = i915_gem_object_set_to_gtt_domain(obj, true);
		if (ret)
			return ret;
 
		ret = i915_gem_object_put_fence(obj);
		if (ret)
			return ret;
 
		/* Map the page containing the relocation we're going to perform.  */
        reloc->offset += i915_gem_obj_ggtt_offset(obj);
        reloc_page = (void*)MapIoMem(reloc->offset & PAGE_MASK, 4096, 3);
		reloc_entry = (uint32_t __iomem *)
			(reloc_page + (reloc->offset & ~PAGE_MASK));
		iowrite32(reloc->delta, reloc_entry);
        FreeKernelSpace(reloc_page);
	}
 
	/* and update the user's relocation entry */
	reloc->presumed_offset = target_offset;
 
	return 0;
}
 
static int
i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,
				    struct eb_objects *eb,
				    struct i915_address_space *vm)
{
#define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
	struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(64)];
	struct drm_i915_gem_relocation_entry __user *user_relocs;
	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
	int remain, ret;
 
	user_relocs = (void __user *)(uintptr_t)entry->relocs_ptr;
 
	remain = entry->relocation_count;
	while (remain) {
		struct drm_i915_gem_relocation_entry *r = stack_reloc;
		int count = remain;
		if (count > ARRAY_SIZE(stack_reloc))
			count = ARRAY_SIZE(stack_reloc);
		remain -= count;
 
        memcpy(r, user_relocs, count*sizeof(r[0]));
 
		do {
			u64 offset = r->presumed_offset;
 
			ret = i915_gem_execbuffer_relocate_entry(obj, eb, r,
								 vm);
			if (ret)
				return ret;
 
            memcpy(&user_relocs->presumed_offset,
                   &r->presumed_offset,
                   sizeof(r->presumed_offset));
 
			user_relocs++;
			r++;
		} while (--count);
	}
 
	return 0;
#undef N_RELOC
}
 
static int
i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj,
					 struct eb_objects *eb,
					 struct drm_i915_gem_relocation_entry *relocs,
					 struct i915_address_space *vm)
{
	const struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
	int i, ret;
 
	for (i = 0; i < entry->relocation_count; i++) {
		ret = i915_gem_execbuffer_relocate_entry(obj, eb, &relocs[i],
							 vm);
		if (ret)
			return ret;
	}
 
	return 0;
}
 
static int
i915_gem_execbuffer_relocate(struct eb_objects *eb,
			     struct i915_address_space *vm)
{
	struct drm_i915_gem_object *obj;
	int ret = 0;
 
	/* This is the fast path and we cannot handle a pagefault whilst
	 * holding the struct mutex lest the user pass in the relocations
	 * contained within a mmaped bo. For in such a case we, the page
	 * fault handler would call i915_gem_fault() and we would try to
	 * acquire the struct mutex again. Obviously this is bad and so
	 * lockdep complains vehemently.
	 */
//	pagefault_disable();
	list_for_each_entry(obj, &eb->objects, exec_list) {
		ret = i915_gem_execbuffer_relocate_object(obj, eb, vm);
		if (ret)
			break;
	}
//   pagefault_enable();
 
	return ret;
}
 
#define  __EXEC_OBJECT_HAS_PIN (1<<31)
#define  __EXEC_OBJECT_HAS_FENCE (1<<30)
 
static int
need_reloc_mappable(struct drm_i915_gem_object *obj)
{
	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
	return entry->relocation_count && !use_cpu_reloc(obj);
}
 
static int
i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,
				   struct intel_ring_buffer *ring,
				   struct i915_address_space *vm,
				   bool *need_reloc)
{
	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
	bool need_fence, need_mappable;
	int ret;
 
	need_fence =
		has_fenced_gpu_access &&
		entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
		obj->tiling_mode != I915_TILING_NONE;
	need_mappable = need_fence || need_reloc_mappable(obj);
 
	ret = i915_gem_object_pin(obj, vm, entry->alignment, need_mappable,
				  false);
	if (ret)
		return ret;
 
	entry->flags |= __EXEC_OBJECT_HAS_PIN;
 
	if (has_fenced_gpu_access) {
		if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
			ret = i915_gem_object_get_fence(obj);
			if (ret)
				return ret;
 
			if (i915_gem_object_pin_fence(obj))
				entry->flags |= __EXEC_OBJECT_HAS_FENCE;
 
			obj->pending_fenced_gpu_access = true;
		}
	}
 
	/* Ensure ppgtt mapping exists if needed */
	if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {
		i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
				       obj, obj->cache_level);
 
		obj->has_aliasing_ppgtt_mapping = 1;
	}
 
	if (entry->offset != i915_gem_obj_offset(obj, vm)) {
		entry->offset = i915_gem_obj_offset(obj, vm);
		*need_reloc = true;
	}
 
	if (entry->flags & EXEC_OBJECT_WRITE) {
		obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;
		obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;
	}
 
	if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&
	    !obj->has_global_gtt_mapping)
		i915_gem_gtt_bind_object(obj, obj->cache_level);
 
	return 0;
}
 
static void
i915_gem_execbuffer_unreserve_object(struct drm_i915_gem_object *obj)
{
	struct drm_i915_gem_exec_object2 *entry;
 
	if (!i915_gem_obj_bound_any(obj))
		return;
 
	entry = obj->exec_entry;
 
	if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
		i915_gem_object_unpin_fence(obj);
 
	if (entry->flags & __EXEC_OBJECT_HAS_PIN)
		i915_gem_object_unpin(obj);
 
	entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
}
 
static int
i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
			    struct list_head *objects,
			    struct i915_address_space *vm,
			    bool *need_relocs)
{
	struct drm_i915_gem_object *obj;
	struct list_head ordered_objects;
	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
	int retry;
 
	INIT_LIST_HEAD(&ordered_objects);
	while (!list_empty(objects)) {
		struct drm_i915_gem_exec_object2 *entry;
		bool need_fence, need_mappable;
 
		obj = list_first_entry(objects,
				       struct drm_i915_gem_object,
				       exec_list);
		entry = obj->exec_entry;
 
		need_fence =
			has_fenced_gpu_access &&
			entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
			obj->tiling_mode != I915_TILING_NONE;
		need_mappable = need_fence || need_reloc_mappable(obj);
 
		if (need_mappable)
			list_move(&obj->exec_list, &ordered_objects);
		else
			list_move_tail(&obj->exec_list, &ordered_objects);
 
		obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND;
		obj->base.pending_write_domain = 0;
		obj->pending_fenced_gpu_access = false;
	}
	list_splice(&ordered_objects, objects);
 
	/* Attempt to pin all of the buffers into the GTT.
	 * This is done in 3 phases:
	 *
	 * 1a. Unbind all objects that do not match the GTT constraints for
	 *     the execbuffer (fenceable, mappable, alignment etc).
	 * 1b. Increment pin count for already bound objects.
	 * 2.  Bind new objects.
	 * 3.  Decrement pin count.
	 *
	 * This avoid unnecessary unbinding of later objects in order to make
	 * room for the earlier objects *unless* we need to defragment.
	 */
	retry = 0;
	do {
		int ret = 0;
 
		/* Unbind any ill-fitting objects or pin. */
		list_for_each_entry(obj, objects, exec_list) {
			struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
			bool need_fence, need_mappable;
			u32 obj_offset;
 
			if (!i915_gem_obj_bound(obj, vm))
				continue;
 
			obj_offset = i915_gem_obj_offset(obj, vm);
			need_fence =
				has_fenced_gpu_access &&
				entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
				obj->tiling_mode != I915_TILING_NONE;
			need_mappable = need_fence || need_reloc_mappable(obj);
 
			WARN_ON((need_mappable || need_fence) &&
				!i915_is_ggtt(vm));
 
			if ((entry->alignment &&
			     obj_offset & (entry->alignment - 1)) ||
			    (need_mappable && !obj->map_and_fenceable))
				ret = i915_vma_unbind(i915_gem_obj_to_vma(obj, vm));
			else
				ret = i915_gem_execbuffer_reserve_object(obj, ring, vm, need_relocs);
			if (ret)
				goto err;
		}
 
		/* Bind fresh objects */
		list_for_each_entry(obj, objects, exec_list) {
			if (i915_gem_obj_bound(obj, vm))
				continue;
 
			ret = i915_gem_execbuffer_reserve_object(obj, ring, vm, need_relocs);
			if (ret)
				goto err;
		}
 
err:		/* Decrement pin count for bound objects */
		list_for_each_entry(obj, objects, exec_list)
			i915_gem_execbuffer_unreserve_object(obj);
 
		if (ret != -ENOSPC || retry++)
			return ret;
 
//       ret = i915_gem_evict_everything(ring->dev);
		if (ret)
			return ret;
	} while (1);
}
 
static int
i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
				  struct drm_i915_gem_execbuffer2 *args,
				  struct drm_file *file,
				  struct intel_ring_buffer *ring,
				  struct eb_objects *eb,
				  struct drm_i915_gem_exec_object2 *exec,
				  struct i915_address_space *vm)
{
	struct drm_i915_gem_relocation_entry *reloc;
	struct drm_i915_gem_object *obj;
	bool need_relocs;
	int *reloc_offset;
	int i, total, ret;
	int count = args->buffer_count;
 
	/* We may process another execbuffer during the unlock... */
	while (!list_empty(&eb->objects)) {
		obj = list_first_entry(&eb->objects,
				       struct drm_i915_gem_object,
				       exec_list);
		list_del_init(&obj->exec_list);
		drm_gem_object_unreference(&obj->base);
	}
 
	mutex_unlock(&dev->struct_mutex);
 
	total = 0;
	for (i = 0; i < count; i++)
		total += exec[i].relocation_count;
 
    reloc_offset = malloc(count * sizeof(*reloc_offset));
    reloc = malloc(total * sizeof(*reloc));
	if (reloc == NULL || reloc_offset == NULL) {
        kfree(reloc);
        kfree(reloc_offset);
		mutex_lock(&dev->struct_mutex);
		return -ENOMEM;
	}
 
	total = 0;
	for (i = 0; i < count; i++) {
		struct drm_i915_gem_relocation_entry __user *user_relocs;
		u64 invalid_offset = (u64)-1;
		int j;
 
		user_relocs = (void __user *)(uintptr_t)exec[i].relocs_ptr;
 
		if (copy_from_user(reloc+total, user_relocs,
				   exec[i].relocation_count * sizeof(*reloc))) {
			ret = -EFAULT;
			mutex_lock(&dev->struct_mutex);
			goto err;
		}
 
		/* As we do not update the known relocation offsets after
		 * relocating (due to the complexities in lock handling),
		 * we need to mark them as invalid now so that we force the
		 * relocation processing next time. Just in case the target
		 * object is evicted and then rebound into its old
		 * presumed_offset before the next execbuffer - if that
		 * happened we would make the mistake of assuming that the
		 * relocations were valid.
		 */
		for (j = 0; j < exec[i].relocation_count; j++) {
			if (copy_to_user(&user_relocs[j].presumed_offset,
					 &invalid_offset,
					 sizeof(invalid_offset))) {
				ret = -EFAULT;
				mutex_lock(&dev->struct_mutex);
				goto err;
			}
		}
 
		reloc_offset[i] = total;
		total += exec[i].relocation_count;
	}
 
	ret = i915_mutex_lock_interruptible(dev);
	if (ret) {
		mutex_lock(&dev->struct_mutex);
		goto err;
	}
 
	/* reacquire the objects */
	eb_reset(eb);
	ret = eb_lookup_objects(eb, exec, args, file);
	if (ret)
			goto err;
 
	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, vm, &need_relocs);
	if (ret)
		goto err;
 
	list_for_each_entry(obj, &eb->objects, exec_list) {
		int offset = obj->exec_entry - exec;
		ret = i915_gem_execbuffer_relocate_object_slow(obj, eb,
							       reloc + reloc_offset[offset],
							       vm);
		if (ret)
			goto err;
	}
 
	/* Leave the user relocations as are, this is the painfully slow path,
	 * and we want to avoid the complication of dropping the lock whilst
	 * having buffers reserved in the aperture and so causing spurious
	 * ENOSPC for random operations.
	 */
 
err:
    kfree(reloc);
    kfree(reloc_offset);
	return ret;
}
 
static int
i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
				struct list_head *objects)
{
	struct drm_i915_gem_object *obj;
	uint32_t flush_domains = 0;
	bool flush_chipset = false;
	int ret;
 
	list_for_each_entry(obj, objects, exec_list) {
		ret = i915_gem_object_sync(obj, ring);
		if (ret)
			return ret;
 
		if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
			flush_chipset |= i915_gem_clflush_object(obj, false);
 
		flush_domains |= obj->base.write_domain;
	}
 
	if (flush_chipset)
		i915_gem_chipset_flush(ring->dev);
 
	if (flush_domains & I915_GEM_DOMAIN_GTT)
		wmb();
 
	/* Unconditionally invalidate gpu caches and ensure that we do flush
	 * any residual writes from the previous batch.
	 */
	return intel_ring_invalidate_all_caches(ring);
}
 
static bool
i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
{
	if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS)
		return false;
 
	return ((exec->batch_start_offset | exec->batch_len) & 0x7) == 0;
}
 
static int
validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
		   int count)
{
	int i;
	int relocs_total = 0;
	int relocs_max = INT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
 
	for (i = 0; i < count; i++) {
		char __user *ptr = to_user_ptr(exec[i].relocs_ptr);
		int length; /* limited by fault_in_pages_readable() */
 
		if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS)
			return -EINVAL;
 
		/* First check for malicious input causing overflow in
		 * the worst case where we need to allocate the entire
		 * relocation tree as a single array.
		 */
		if (exec[i].relocation_count > relocs_max - relocs_total)
			return -EINVAL;
		relocs_total += exec[i].relocation_count;
 
		length = exec[i].relocation_count *
			sizeof(struct drm_i915_gem_relocation_entry);
		/*
		 * We must check that the entire relocation array is safe
		 * to read, but since we may need to update the presumed
		 * offsets during execution, check for full write access.
		 */
//       if (!access_ok(VERIFY_WRITE, ptr, length))
//           return -EFAULT;
 
//       if (fault_in_multipages_readable(ptr, length))
//           return -EFAULT;
	}
 
	return 0;
}
 
static void
i915_gem_execbuffer_move_to_active(struct list_head *objects,
				   struct i915_address_space *vm,
				   struct intel_ring_buffer *ring)
{
	struct drm_i915_gem_object *obj;
 
	list_for_each_entry(obj, objects, exec_list) {
		u32 old_read = obj->base.read_domains;
		u32 old_write = obj->base.write_domain;
 
		obj->base.write_domain = obj->base.pending_write_domain;
		if (obj->base.write_domain == 0)
			obj->base.pending_read_domains |= obj->base.read_domains;
		obj->base.read_domains = obj->base.pending_read_domains;
		obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
 
		/* FIXME: This lookup gets fixed later <-- danvet */
		list_move_tail(&i915_gem_obj_to_vma(obj, vm)->mm_list, &vm->active_list);
		i915_gem_object_move_to_active(obj, ring);
		if (obj->base.write_domain) {
			obj->dirty = 1;
			obj->last_write_seqno = intel_ring_get_seqno(ring);
			if (obj->pin_count) /* check for potential scanout */
				intel_mark_fb_busy(obj, ring);
		}
 
		trace_i915_gem_object_change_domain(obj, old_read, old_write);
	}
}
 
static void
i915_gem_execbuffer_retire_commands(struct drm_device *dev,
				    struct drm_file *file,
				    struct intel_ring_buffer *ring,
				    struct drm_i915_gem_object *obj)
{
	/* Unconditionally force add_request to emit a full flush. */
	ring->gpu_caches_dirty = true;
 
	/* Add a breadcrumb for the completion of the batch buffer */
	(void)__i915_add_request(ring, file, obj, NULL);
}
 
static int
i915_reset_gen7_sol_offsets(struct drm_device *dev,
			    struct intel_ring_buffer *ring)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	int ret, i;
 
	if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS])
		return 0;
 
	ret = intel_ring_begin(ring, 4 * 3);
	if (ret)
		return ret;
 
	for (i = 0; i < 4; i++) {
		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
		intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));
		intel_ring_emit(ring, 0);
	}
 
	intel_ring_advance(ring);
 
	return 0;
}
 
static int
i915_gem_do_execbuffer(struct drm_device *dev, void *data,
		       struct drm_file *file,
		       struct drm_i915_gem_execbuffer2 *args,
		       struct drm_i915_gem_exec_object2 *exec,
		       struct i915_address_space *vm)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	struct eb_objects *eb;
	struct drm_i915_gem_object *batch_obj;
	struct drm_clip_rect *cliprects = NULL;
	struct intel_ring_buffer *ring;
	u32 ctx_id = i915_execbuffer2_get_context_id(*args);
	u32 exec_start, exec_len;
	u32 mask, flags;
	int ret, mode, i;
	bool need_relocs;
 
	if (!i915_gem_check_execbuffer(args))
		return -EINVAL;
 
	ret = validate_exec_list(exec, args->buffer_count);
	if (ret)
		return ret;
 
	flags = 0;
	if (args->flags & I915_EXEC_SECURE) {
 
		flags |= I915_DISPATCH_SECURE;
	}
	if (args->flags & I915_EXEC_IS_PINNED)
		flags |= I915_DISPATCH_PINNED;
 
	switch (args->flags & I915_EXEC_RING_MASK) {
	case I915_EXEC_DEFAULT:
	case I915_EXEC_RENDER:
		ring = &dev_priv->ring[RCS];
		break;
	case I915_EXEC_BSD:
		ring = &dev_priv->ring[VCS];
		if (ctx_id != DEFAULT_CONTEXT_ID) {
			DRM_DEBUG("Ring %s doesn't support contexts\n",
				  ring->name);
			return -EPERM;
		}
		break;
	case I915_EXEC_BLT:
		ring = &dev_priv->ring[BCS];
		if (ctx_id != DEFAULT_CONTEXT_ID) {
			DRM_DEBUG("Ring %s doesn't support contexts\n",
				  ring->name);
			return -EPERM;
		}
		break;
	case I915_EXEC_VEBOX:
		ring = &dev_priv->ring[VECS];
		if (ctx_id != DEFAULT_CONTEXT_ID) {
			DRM_DEBUG("Ring %s doesn't support contexts\n",
				  ring->name);
			return -EPERM;
		}
		break;
 
	default:
		DRM_DEBUG("execbuf with unknown ring: %d\n",
			  (int)(args->flags & I915_EXEC_RING_MASK));
		return -EINVAL;
	}
	if (!intel_ring_initialized(ring)) {
		DRM_DEBUG("execbuf with invalid ring: %d\n",
			  (int)(args->flags & I915_EXEC_RING_MASK));
		return -EINVAL;
	}
 
	mode = args->flags & I915_EXEC_CONSTANTS_MASK;
	mask = I915_EXEC_CONSTANTS_MASK;
	switch (mode) {
	case I915_EXEC_CONSTANTS_REL_GENERAL:
	case I915_EXEC_CONSTANTS_ABSOLUTE:
	case I915_EXEC_CONSTANTS_REL_SURFACE:
		if (ring == &dev_priv->ring[RCS] &&
		    mode != dev_priv->relative_constants_mode) {
			if (INTEL_INFO(dev)->gen < 4)
				return -EINVAL;
 
			if (INTEL_INFO(dev)->gen > 5 &&
			    mode == I915_EXEC_CONSTANTS_REL_SURFACE)
				return -EINVAL;
 
			/* The HW changed the meaning on this bit on gen6 */
			if (INTEL_INFO(dev)->gen >= 6)
				mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
		}
		break;
	default:
		DRM_DEBUG("execbuf with unknown constants: %d\n", mode);
		return -EINVAL;
	}
 
	if (args->buffer_count < 1) {
		DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
		return -EINVAL;
	}
 
	if (args->num_cliprects != 0) {
		if (ring != &dev_priv->ring[RCS]) {
			DRM_DEBUG("clip rectangles are only valid with the render ring\n");
			return -EINVAL;
		}
 
		if (INTEL_INFO(dev)->gen >= 5) {
			DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");
			return -EINVAL;
		}
 
		if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) {
			DRM_DEBUG("execbuf with %u cliprects\n",
				  args->num_cliprects);
			return -EINVAL;
		}
 
		cliprects = kmalloc(args->num_cliprects * sizeof(*cliprects),
				    GFP_KERNEL);
		if (cliprects == NULL) {
			ret = -ENOMEM;
			goto pre_mutex_err;
		}
 
		if (copy_from_user(cliprects,
				   to_user_ptr(args->cliprects_ptr),
				     sizeof(*cliprects)*args->num_cliprects)) {
			ret = -EFAULT;
			goto pre_mutex_err;
		}
	}
 
	ret = i915_mutex_lock_interruptible(dev);
	if (ret)
		goto pre_mutex_err;
 
	if (dev_priv->ums.mm_suspended) {
		mutex_unlock(&dev->struct_mutex);
		ret = -EBUSY;
		goto pre_mutex_err;
	}
 
	eb = eb_create(args);
	if (eb == NULL) {
		mutex_unlock(&dev->struct_mutex);
		ret = -ENOMEM;
		goto pre_mutex_err;
	}
 
	/* Look up object handles */
	ret = eb_lookup_objects(eb, exec, args, file);
	if (ret)
			goto err;
 
	/* take note of the batch buffer before we might reorder the lists */
	batch_obj = list_entry(eb->objects.prev,
			       struct drm_i915_gem_object,
			       exec_list);
 
	/* Move the objects en-masse into the GTT, evicting if necessary. */
	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, vm, &need_relocs);
	if (ret)
		goto err;
 
	/* The objects are in their final locations, apply the relocations. */
	if (need_relocs)
		ret = i915_gem_execbuffer_relocate(eb, vm);
	if (ret) {
		if (ret == -EFAULT) {
			ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring,
								eb, exec, vm);
			BUG_ON(!mutex_is_locked(&dev->struct_mutex));
		}
		if (ret)
			goto err;
	}
 
	/* Set the pending read domains for the batch buffer to COMMAND */
	if (batch_obj->base.pending_write_domain) {
		DRM_DEBUG("Attempting to use self-modifying batch buffer\n");
		ret = -EINVAL;
		goto err;
	}
	batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
 
	/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
	 * batch" bit. Hence we need to pin secure batches into the global gtt.
	 * hsw should have this fixed, but let's be paranoid and do it
	 * unconditionally for now. */
	if (flags & I915_DISPATCH_SECURE && !batch_obj->has_global_gtt_mapping)
		i915_gem_gtt_bind_object(batch_obj, batch_obj->cache_level);
 
	ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->objects);
	if (ret)
		goto err;
 
	ret = i915_switch_context(ring, file, ctx_id);
	if (ret)
		goto err;
 
	if (ring == &dev_priv->ring[RCS] &&
	    mode != dev_priv->relative_constants_mode) {
		ret = intel_ring_begin(ring, 4);
		if (ret)
				goto err;
 
		intel_ring_emit(ring, MI_NOOP);
		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
		intel_ring_emit(ring, INSTPM);
		intel_ring_emit(ring, mask << 16 | mode);
		intel_ring_advance(ring);
 
		dev_priv->relative_constants_mode = mode;
	}
 
	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
		ret = i915_reset_gen7_sol_offsets(dev, ring);
		if (ret)
			goto err;
	}
 
	exec_start = i915_gem_obj_offset(batch_obj, vm) +
		args->batch_start_offset;
	exec_len = args->batch_len;
	if (cliprects) {
		for (i = 0; i < args->num_cliprects; i++) {
			ret = i915_emit_box(dev, &cliprects[i],
					    args->DR1, args->DR4);
			if (ret)
				goto err;
 
			ret = ring->dispatch_execbuffer(ring,
							exec_start, exec_len,
							flags);
			if (ret)
				goto err;
		}
	} else {
		ret = ring->dispatch_execbuffer(ring,
						exec_start, exec_len,
						flags);
		if (ret)
			goto err;
	}
 
	trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
 
	i915_gem_execbuffer_move_to_active(&eb->objects, vm, ring);
	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
 
err:
	eb_destroy(eb);
 
	mutex_unlock(&dev->struct_mutex);
 
pre_mutex_err:
    kfree(cliprects);
	return ret;
}
 
#if 0
/*
 * Legacy execbuffer just creates an exec2 list from the original exec object
 * list array and passes it to the real function.
 */
int
i915_gem_execbuffer(struct drm_device *dev, void *data,
		    struct drm_file *file)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_i915_gem_execbuffer *args = data;
	struct drm_i915_gem_execbuffer2 exec2;
	struct drm_i915_gem_exec_object *exec_list = NULL;
	struct drm_i915_gem_exec_object2 *exec2_list = NULL;
	int ret, i;
 
	if (args->buffer_count < 1) {
		DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
		return -EINVAL;
	}
 
	/* Copy in the exec list from userland */
	exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
	exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
	if (exec_list == NULL || exec2_list == NULL) {
		DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
			  args->buffer_count);
		drm_free_large(exec_list);
		drm_free_large(exec2_list);
		return -ENOMEM;
	}
	ret = copy_from_user(exec_list,
			     to_user_ptr(args->buffers_ptr),
			     sizeof(*exec_list) * args->buffer_count);
	if (ret != 0) {
		DRM_DEBUG("copy %d exec entries failed %d\n",
			  args->buffer_count, ret);
		drm_free_large(exec_list);
		drm_free_large(exec2_list);
		return -EFAULT;
	}
 
	for (i = 0; i < args->buffer_count; i++) {
		exec2_list[i].handle = exec_list[i].handle;
		exec2_list[i].relocation_count = exec_list[i].relocation_count;
		exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
		exec2_list[i].alignment = exec_list[i].alignment;
		exec2_list[i].offset = exec_list[i].offset;
		if (INTEL_INFO(dev)->gen < 4)
			exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
		else
			exec2_list[i].flags = 0;
	}
 
	exec2.buffers_ptr = args->buffers_ptr;
	exec2.buffer_count = args->buffer_count;
	exec2.batch_start_offset = args->batch_start_offset;
	exec2.batch_len = args->batch_len;
	exec2.DR1 = args->DR1;
	exec2.DR4 = args->DR4;
	exec2.num_cliprects = args->num_cliprects;
	exec2.cliprects_ptr = args->cliprects_ptr;
	exec2.flags = I915_EXEC_RENDER;
	i915_execbuffer2_set_context_id(exec2, 0);
 
	ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list,
				     &dev_priv->gtt.base);
	if (!ret) {
		/* Copy the new buffer offsets back to the user's exec list. */
		for (i = 0; i < args->buffer_count; i++)
			exec_list[i].offset = exec2_list[i].offset;
		/* ... and back out to userspace */
		ret = copy_to_user(to_user_ptr(args->buffers_ptr),
				   exec_list,
				   sizeof(*exec_list) * args->buffer_count);
		if (ret) {
			ret = -EFAULT;
			DRM_DEBUG("failed to copy %d exec entries "
				  "back to user (%d)\n",
				  args->buffer_count, ret);
		}
	}
 
	drm_free_large(exec_list);
	drm_free_large(exec2_list);
	return ret;
}
#endif
 
int
i915_gem_execbuffer2(struct drm_device *dev, void *data,
		     struct drm_file *file)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_i915_gem_execbuffer2 *args = data;
	struct drm_i915_gem_exec_object2 *exec2_list = NULL;
	int ret;
 
	if (args->buffer_count < 1 ||
	    args->buffer_count > UINT_MAX / sizeof(*exec2_list)) {
		DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count);
		return -EINVAL;
	}
 
	exec2_list = kmalloc(sizeof(*exec2_list)*args->buffer_count,
			     GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
	if (exec2_list == NULL) {
		DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
			  args->buffer_count);
		return -ENOMEM;
	}
	ret = copy_from_user(exec2_list,
			     (struct drm_i915_relocation_entry __user *)
			     (uintptr_t) args->buffers_ptr,
			     sizeof(*exec2_list) * args->buffer_count);
	if (ret != 0) {
		DRM_DEBUG("copy %d exec entries failed %d\n",
			  args->buffer_count, ret);
        kfree(exec2_list);
        FAIL();
		return -EFAULT;
	}
 
	ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list,
				     &dev_priv->gtt.base);
	if (!ret) {
		/* Copy the new buffer offsets back to the user's exec list. */
		ret = copy_to_user((void __user *)(uintptr_t)args->buffers_ptr,
				   exec2_list,
				   sizeof(*exec2_list) * args->buffer_count);
		if (ret) {
			ret = -EFAULT;
			DRM_DEBUG("failed to copy %d exec entries "
				  "back to user (%d)\n",
				  args->buffer_count, ret);
		}
	}
 
    kfree(exec2_list);
 
 
 
	return ret;
}
 
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Rev 4104	Rev 4246
1	/*	1	/*
2	* Copyright © 2008,2010 Intel Corporation	2	* Copyright © 2008,2010 Intel Corporation
3	*	3	*
4	* Permission is hereby granted, free of charge, to any person obtaining a	4	* Permission is hereby granted, free of charge, to any person obtaining a
5	* copy of this software and associated documentation files (the "Software"),	5	* copy of this software and associated documentation files (the "Software"),
6	* to deal in the Software without restriction, including without limitation	6	* to deal in the Software without restriction, including without limitation
7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8	* and/or sell copies of the Software, and to permit persons to whom the	8	* and/or sell copies of the Software, and to permit persons to whom the
9	* Software is furnished to do so, subject to the following conditions:	9	* Software is furnished to do so, subject to the following conditions:
10	*	10	*
11	* The above copyright notice and this permission notice (including the next	11	* The above copyright notice and this permission notice (including the next
12	* paragraph) shall be included in all copies or substantial portions of the	12	* paragraph) shall be included in all copies or substantial portions of the
13	* Software.	13	* Software.
14	*	14	*
15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER	18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING	19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS	20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21	* IN THE SOFTWARE.	21	* IN THE SOFTWARE.
22	*	22	*
23	* Authors:	23	* Authors:
24	* Eric Anholt	24	* Eric Anholt
25	* Chris Wilson	25	* Chris Wilson
26	*	26	*
27	*/	27	*/
28		28
29	#include	29	#include
30	#include	30	#include
31	#include "i915_drv.h"	31	#include "i915_drv.h"
32	#include "i915_trace.h"	32	#include "i915_trace.h"
33	#include "intel_drv.h"	33	#include "intel_drv.h"
34	//#include	34	//#include
35		35
36	#define I915_EXEC_SECURE (1<<9)	36	#define I915_EXEC_SECURE (1<<9)
37	#define I915_EXEC_IS_PINNED (1<<10)	37	#define I915_EXEC_IS_PINNED (1<<10)
38	#define I915_EXEC_VEBOX (4<<0)	38	#define I915_EXEC_VEBOX (4<<0)
39		39
40	#define wmb() asm volatile ("sfence")	40	#define wmb() asm volatile ("sfence")
41		41
42	struct drm_i915_gem_object *get_fb_obj();	42	struct drm_i915_gem_object *get_fb_obj();
43		43
44		44
45	static unsigned long	45	static unsigned long
46	copy_to_user(void __user to, const void from, unsigned long n)	46	copy_to_user(void __user to, const void from, unsigned long n)
47	{	47	{
48	memcpy(to, from, n);	48	memcpy(to, from, n);
49	return 0;	49	return 0;
50	}	50	}
51		51
52	static unsigned long	52	static unsigned long
53	copy_from_user(void to, const void __user from, unsigned long n)	53	copy_from_user(void to, const void __user from, unsigned long n)
54	{	54	{
55	memcpy(to, from, n);	55	memcpy(to, from, n);
56	return 0;	56	return 0;
57	}	57	}
58		58
59	struct eb_objects {	59	struct eb_objects {
60	struct list_head objects;	60	struct list_head objects;
61	int and;	61	int and;
62	union {	62	union {
63	struct drm_i915_gem_object *lut[0];	63	struct drm_i915_gem_object *lut[0];
64	struct hlist_head buckets[0];	64	struct hlist_head buckets[0];
65	};	65	};
66	};	66	};
67		67
68	static struct eb_objects *	68	static struct eb_objects *
69	eb_create(struct drm_i915_gem_execbuffer2 *args)	69	eb_create(struct drm_i915_gem_execbuffer2 *args)
70	{	70	{
71	struct eb_objects *eb = NULL;	71	struct eb_objects *eb = NULL;
72		72
73	if (args->flags & I915_EXEC_HANDLE_LUT) {	73	if (args->flags & I915_EXEC_HANDLE_LUT) {
74	int size = args->buffer_count;	74	int size = args->buffer_count;
75	size = sizeof(struct drm_i915_gem_object );	75	size = sizeof(struct drm_i915_gem_object );
76	size += sizeof(struct eb_objects);	76	size += sizeof(struct eb_objects);
77	eb = kmalloc(size, GFP_TEMPORARY \| __GFP_NOWARN \| __GFP_NORETRY);	77	eb = kmalloc(size, GFP_TEMPORARY \| __GFP_NOWARN \| __GFP_NORETRY);
78	}	78	}
79		79
80	if (eb == NULL) {	80	if (eb == NULL) {
81	int size = args->buffer_count;	81	int size = args->buffer_count;
82	int count = PAGE_SIZE / sizeof(struct hlist_head) / 2;	82	int count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
83	BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));	83	BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
84	while (count > 2*size)	84	while (count > 2*size)
85	count >>= 1;	85	count >>= 1;
86	eb = kzalloc(count*sizeof(struct hlist_head) +	86	eb = kzalloc(count*sizeof(struct hlist_head) +
87	sizeof(struct eb_objects),	87	sizeof(struct eb_objects),
88	GFP_TEMPORARY);	88	GFP_TEMPORARY);
89	if (eb == NULL)	89	if (eb == NULL)
90	return eb;	90	return eb;
91		91
92	eb->and = count - 1;	92	eb->and = count - 1;
93	} else	93	} else
94	eb->and = -args->buffer_count;	94	eb->and = -args->buffer_count;
95		95
96	INIT_LIST_HEAD(&eb->objects);	96	INIT_LIST_HEAD(&eb->objects);
97	return eb;	97	return eb;
98	}	98	}
99		99
100	static void	100	static void
101	eb_reset(struct eb_objects *eb)	101	eb_reset(struct eb_objects *eb)
102	{	102	{
103	if (eb->and >= 0)	103	if (eb->and >= 0)
104	memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));	104	memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
105	}	105	}
106		106
107	static int	107	static int
108	eb_lookup_objects(struct eb_objects *eb,	108	eb_lookup_objects(struct eb_objects *eb,
109	struct drm_i915_gem_exec_object2 *exec,	109	struct drm_i915_gem_exec_object2 *exec,
110	const struct drm_i915_gem_execbuffer2 *args,	110	const struct drm_i915_gem_execbuffer2 *args,
111	struct drm_file *file)	111	struct drm_file *file)
112	{	112	{
113	int i;	113	int i;
114		114
115	spin_lock(&file->table_lock);	115	spin_lock(&file->table_lock);
116	for (i = 0; i < args->buffer_count; i++) {	116	for (i = 0; i < args->buffer_count; i++) {
117	struct drm_i915_gem_object *obj;	117	struct drm_i915_gem_object *obj;
118		118
119	if(exec[i].handle == -2)	119	if(exec[i].handle == -2)
120	obj = get_fb_obj();	120	obj = get_fb_obj();
121	else	121	else
122	obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));	122	obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
123	if (obj == NULL) {	123	if (obj == NULL) {
124	spin_unlock(&file->table_lock);	124	spin_unlock(&file->table_lock);
125	DRM_DEBUG("Invalid object handle %d at index %d\n",	125	DRM_DEBUG("Invalid object handle %d at index %d\n",
126	exec[i].handle, i);	126	exec[i].handle, i);
127	return -ENOENT;	127	return -ENOENT;
128	}	128	}
129		129
130	if (!list_empty(&obj->exec_list)) {	130	if (!list_empty(&obj->exec_list)) {
131	spin_unlock(&file->table_lock);	131	spin_unlock(&file->table_lock);
132	DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",	132	DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
133	obj, exec[i].handle, i);	133	obj, exec[i].handle, i);
134	return -EINVAL;	134	return -EINVAL;
135	}	135	}
136		136
137	drm_gem_object_reference(&obj->base);	137	drm_gem_object_reference(&obj->base);
138	list_add_tail(&obj->exec_list, &eb->objects);	138	list_add_tail(&obj->exec_list, &eb->objects);
139		139
140	obj->exec_entry = &exec[i];	140	obj->exec_entry = &exec[i];
-		141
-		142	if(exec[i].handle == -2)
-		143	continue;
-		144
141	if (eb->and < 0) {	145	if (eb->and < 0) {
142	eb->lut[i] = obj;	146	eb->lut[i] = obj;
143	} else {	147	} else {
144	uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;	148	uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
145	obj->exec_handle = handle;	149	obj->exec_handle = handle;
146	hlist_add_head(&obj->exec_node,	150	hlist_add_head(&obj->exec_node,
147	&eb->buckets[handle & eb->and]);	151	&eb->buckets[handle & eb->and]);
148	}	152	}
149	}	153	}
150	spin_unlock(&file->table_lock);	154	spin_unlock(&file->table_lock);
151		155
152	return 0;	156	return 0;
153	}	157	}
154		158
155	static struct drm_i915_gem_object *	159	static struct drm_i915_gem_object *
156	eb_get_object(struct eb_objects *eb, unsigned long handle)	160	eb_get_object(struct eb_objects *eb, unsigned long handle)
157	{	161	{
-		162
-		163	if(handle == -2)
-		164	return get_fb_obj();
-		165
158	if (eb->and < 0) {	166	if (eb->and < 0) {
159	if (handle >= -eb->and)	167	if (handle >= -eb->and)
160	return NULL;	168	return NULL;
161	return eb->lut[handle];	169	return eb->lut[handle];
162	} else {	170	} else {
163	struct hlist_head *head;	171	struct hlist_head *head;
164	struct hlist_node *node;	172	struct hlist_node *node;
165		173
166	head = &eb->buckets[handle & eb->and];	174	head = &eb->buckets[handle & eb->and];
167	hlist_for_each(node, head) {	175	hlist_for_each(node, head) {
168	struct drm_i915_gem_object *obj;	176	struct drm_i915_gem_object *obj;
169		177
170	obj = hlist_entry(node, struct drm_i915_gem_object, exec_node);	178	obj = hlist_entry(node, struct drm_i915_gem_object, exec_node);
171	if (obj->exec_handle == handle)	179	if (obj->exec_handle == handle)
172	return obj;	180	return obj;
173	}	181	}
174	return NULL;	182	return NULL;
175	}	183	}
176	}	184	}
177		185
178	static void	186	static void
179	eb_destroy(struct eb_objects *eb)	187	eb_destroy(struct eb_objects *eb)
180	{	188	{
181	while (!list_empty(&eb->objects)) {	189	while (!list_empty(&eb->objects)) {
182	struct drm_i915_gem_object *obj;	190	struct drm_i915_gem_object *obj;
183		191
184	obj = list_first_entry(&eb->objects,	192	obj = list_first_entry(&eb->objects,
185	struct drm_i915_gem_object,	193	struct drm_i915_gem_object,
186	exec_list);	194	exec_list);
187	list_del_init(&obj->exec_list);	195	list_del_init(&obj->exec_list);
188	drm_gem_object_unreference(&obj->base);	196	drm_gem_object_unreference(&obj->base);
189	}	197	}
190	kfree(eb);	198	kfree(eb);
191	}	199	}
192		200
193	static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)	201	static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
194	{	202	{
195	return (obj->base.write_domain == I915_GEM_DOMAIN_CPU \|\|	203	return (obj->base.write_domain == I915_GEM_DOMAIN_CPU \|\|
196	!obj->map_and_fenceable \|\|	204	!obj->map_and_fenceable \|\|
197	obj->cache_level != I915_CACHE_NONE);	205	obj->cache_level != I915_CACHE_NONE);
198	}	206	}
199		207
200	static int	208	static int
201	i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,	209	i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
202	struct eb_objects *eb,	210	struct eb_objects *eb,
203	struct drm_i915_gem_relocation_entry *reloc,	211	struct drm_i915_gem_relocation_entry *reloc,
204	struct i915_address_space *vm)	212	struct i915_address_space *vm)
205	{	213	{
206	struct drm_device *dev = obj->base.dev;	214	struct drm_device *dev = obj->base.dev;
207	struct drm_gem_object *target_obj;	215	struct drm_gem_object *target_obj;
208	struct drm_i915_gem_object *target_i915_obj;	216	struct drm_i915_gem_object *target_i915_obj;
209	uint32_t target_offset;	217	uint32_t target_offset;
210	int ret = -EINVAL;	218	int ret = -EINVAL;
211		219
212	/* we've already hold a reference to all valid objects */	220	/* we've already hold a reference to all valid objects */
213	target_obj = &eb_get_object(eb, reloc->target_handle)->base;	221	target_obj = &eb_get_object(eb, reloc->target_handle)->base;
214	if (unlikely(target_obj == NULL))	222	if (unlikely(target_obj == NULL))
215	return -ENOENT;	223	return -ENOENT;
216		224
217	target_i915_obj = to_intel_bo(target_obj);	225	target_i915_obj = to_intel_bo(target_obj);
218	target_offset = i915_gem_obj_ggtt_offset(target_i915_obj);	226	target_offset = i915_gem_obj_ggtt_offset(target_i915_obj);
219		227
220	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and	228	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
221	* pipe_control writes because the gpu doesn't properly redirect them	229	* pipe_control writes because the gpu doesn't properly redirect them
222	* through the ppgtt for non_secure batchbuffers. */	230	* through the ppgtt for non_secure batchbuffers. */
223	if (unlikely(IS_GEN6(dev) &&	231	if (unlikely(IS_GEN6(dev) &&
224	reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&	232	reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
225	!target_i915_obj->has_global_gtt_mapping)) {	233	!target_i915_obj->has_global_gtt_mapping)) {
226	i915_gem_gtt_bind_object(target_i915_obj,	234	i915_gem_gtt_bind_object(target_i915_obj,
227	target_i915_obj->cache_level);	235	target_i915_obj->cache_level);
228	}	236	}
229		237
230	/* Validate that the target is in a valid r/w GPU domain */	238	/* Validate that the target is in a valid r/w GPU domain */
231	if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {	239	if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
232	DRM_DEBUG("reloc with multiple write domains: "	240	DRM_DEBUG("reloc with multiple write domains: "
233	"obj %p target %d offset %d "	241	"obj %p target %d offset %d "
234	"read %08x write %08x",	242	"read %08x write %08x",
235	obj, reloc->target_handle,	243	obj, reloc->target_handle,
236	(int) reloc->offset,	244	(int) reloc->offset,
237	reloc->read_domains,	245	reloc->read_domains,
238	reloc->write_domain);	246	reloc->write_domain);
239	return ret;	247	return ret;
240	}	248	}
241	if (unlikely((reloc->write_domain \| reloc->read_domains)	249	if (unlikely((reloc->write_domain \| reloc->read_domains)
242	& ~I915_GEM_GPU_DOMAINS)) {	250	& ~I915_GEM_GPU_DOMAINS)) {
243	DRM_DEBUG("reloc with read/write non-GPU domains: "	251	DRM_DEBUG("reloc with read/write non-GPU domains: "
244	"obj %p target %d offset %d "	252	"obj %p target %d offset %d "
245	"read %08x write %08x",	253	"read %08x write %08x",
246	obj, reloc->target_handle,	254	obj, reloc->target_handle,
247	(int) reloc->offset,	255	(int) reloc->offset,
248	reloc->read_domains,	256	reloc->read_domains,
249	reloc->write_domain);	257	reloc->write_domain);
250	return ret;	258	return ret;
251	}	259	}
252		260
253	target_obj->pending_read_domains \|= reloc->read_domains;	261	target_obj->pending_read_domains \|= reloc->read_domains;
254	target_obj->pending_write_domain \|= reloc->write_domain;	262	target_obj->pending_write_domain \|= reloc->write_domain;
255		263
256	/* If the relocation already has the right value in it, no	264	/* If the relocation already has the right value in it, no
257	* more work needs to be done.	265	* more work needs to be done.
258	*/	266	*/
259	if (target_offset == reloc->presumed_offset)	267	if (target_offset == reloc->presumed_offset)
260	return 0;	268	return 0;
261		269
262	/* Check that the relocation address is valid... */	270	/* Check that the relocation address is valid... */
263	if (unlikely(reloc->offset > obj->base.size - 4)) {	271	if (unlikely(reloc->offset > obj->base.size - 4)) {
264	DRM_DEBUG("Relocation beyond object bounds: "	272	DRM_DEBUG("Relocation beyond object bounds: "
265	"obj %p target %d offset %d size %d.\n",	273	"obj %p target %d offset %d size %d.\n",
266	obj, reloc->target_handle,	274	obj, reloc->target_handle,
267	(int) reloc->offset,	275	(int) reloc->offset,
268	(int) obj->base.size);	276	(int) obj->base.size);
269	return ret;	277	return ret;
270	}	278	}
271	if (unlikely(reloc->offset & 3)) {	279	if (unlikely(reloc->offset & 3)) {
272	DRM_DEBUG("Relocation not 4-byte aligned: "	280	DRM_DEBUG("Relocation not 4-byte aligned: "
273	"obj %p target %d offset %d.\n",	281	"obj %p target %d offset %d.\n",
274	obj, reloc->target_handle,	282	obj, reloc->target_handle,
275	(int) reloc->offset);	283	(int) reloc->offset);
276	return ret;	284	return ret;
277	}	285	}
278		286
279	/* We can't wait for rendering with pagefaults disabled */	287	/* We can't wait for rendering with pagefaults disabled */
280		288
281	reloc->delta += target_offset;	289	reloc->delta += target_offset;
282	if (use_cpu_reloc(obj)) {	290	if (use_cpu_reloc(obj)) {
283	uint32_t page_offset = reloc->offset & ~PAGE_MASK;	291	uint32_t page_offset = reloc->offset & ~PAGE_MASK;
284	char *vaddr;	292	char *vaddr;
285		293
286	ret = i915_gem_object_set_to_cpu_domain(obj, 1);	294	ret = i915_gem_object_set_to_cpu_domain(obj, 1);
287	if (ret)	295	if (ret)
288	return ret;	296	return ret;
289		297
290	vaddr = (char *)MapIoMem((addr_t)i915_gem_object_get_page(obj,	298	vaddr = (char *)MapIoMem((addr_t)i915_gem_object_get_page(obj,
291	reloc->offset >> PAGE_SHIFT), 4096, 3);	299	reloc->offset >> PAGE_SHIFT), 4096, 3);
292	(uint32_t )(vaddr + page_offset) = reloc->delta;	300	(uint32_t )(vaddr + page_offset) = reloc->delta;
293	FreeKernelSpace(vaddr);	301	FreeKernelSpace(vaddr);
294	} else {	302	} else {
295	struct drm_i915_private *dev_priv = dev->dev_private;	303	struct drm_i915_private *dev_priv = dev->dev_private;
296	uint32_t __iomem *reloc_entry;	304	uint32_t __iomem *reloc_entry;
297	void __iomem *reloc_page;	305	void __iomem *reloc_page;
298		306
299	ret = i915_gem_object_set_to_gtt_domain(obj, true);	307	ret = i915_gem_object_set_to_gtt_domain(obj, true);
300	if (ret)	308	if (ret)
301	return ret;	309	return ret;
302		310
303	ret = i915_gem_object_put_fence(obj);	311	ret = i915_gem_object_put_fence(obj);
304	if (ret)	312	if (ret)
305	return ret;	313	return ret;
306		314
307	/* Map the page containing the relocation we're going to perform. */	315	/* Map the page containing the relocation we're going to perform. */
308	reloc->offset += i915_gem_obj_ggtt_offset(obj);	316	reloc->offset += i915_gem_obj_ggtt_offset(obj);
309	reloc_page = (void*)MapIoMem(reloc->offset & PAGE_MASK, 4096, 3);	317	reloc_page = (void*)MapIoMem(reloc->offset & PAGE_MASK, 4096, 3);
310	reloc_entry = (uint32_t __iomem *)	318	reloc_entry = (uint32_t __iomem *)
311	(reloc_page + (reloc->offset & ~PAGE_MASK));	319	(reloc_page + (reloc->offset & ~PAGE_MASK));
312	iowrite32(reloc->delta, reloc_entry);	320	iowrite32(reloc->delta, reloc_entry);
313	FreeKernelSpace(reloc_page);	321	FreeKernelSpace(reloc_page);
314	}	322	}
315		323
316	/* and update the user's relocation entry */	324	/* and update the user's relocation entry */
317	reloc->presumed_offset = target_offset;	325	reloc->presumed_offset = target_offset;
318		326
319	return 0;	327	return 0;
320	}	328	}
321		329
322	static int	330	static int
323	i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,	331	i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,
324	struct eb_objects *eb,	332	struct eb_objects *eb,
325	struct i915_address_space *vm)	333	struct i915_address_space *vm)
326	{	334	{
327	#define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))	335	#define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
328	struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(64)];	336	struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(64)];
329	struct drm_i915_gem_relocation_entry __user *user_relocs;	337	struct drm_i915_gem_relocation_entry __user *user_relocs;
330	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;	338	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
331	int remain, ret;	339	int remain, ret;
332		340
333	user_relocs = (void __user *)(uintptr_t)entry->relocs_ptr;	341	user_relocs = (void __user *)(uintptr_t)entry->relocs_ptr;
334		342
335	remain = entry->relocation_count;	343	remain = entry->relocation_count;
336	while (remain) {	344	while (remain) {
337	struct drm_i915_gem_relocation_entry *r = stack_reloc;	345	struct drm_i915_gem_relocation_entry *r = stack_reloc;
338	int count = remain;	346	int count = remain;
339	if (count > ARRAY_SIZE(stack_reloc))	347	if (count > ARRAY_SIZE(stack_reloc))
340	count = ARRAY_SIZE(stack_reloc);	348	count = ARRAY_SIZE(stack_reloc);
341	remain -= count;	349	remain -= count;
342		350
343	memcpy(r, user_relocs, count*sizeof(r[0]));	351	memcpy(r, user_relocs, count*sizeof(r[0]));
344		352
345	do {	353	do {
346	u64 offset = r->presumed_offset;	354	u64 offset = r->presumed_offset;
347		355
348	ret = i915_gem_execbuffer_relocate_entry(obj, eb, r,	356	ret = i915_gem_execbuffer_relocate_entry(obj, eb, r,
349	vm);	357	vm);
350	if (ret)	358	if (ret)
351	return ret;	359	return ret;
352		360
353	memcpy(&user_relocs->presumed_offset,	361	memcpy(&user_relocs->presumed_offset,
354	&r->presumed_offset,	362	&r->presumed_offset,
355	sizeof(r->presumed_offset));	363	sizeof(r->presumed_offset));
356		364
357	user_relocs++;	365	user_relocs++;
358	r++;	366	r++;
359	} while (--count);	367	} while (--count);
360	}	368	}
361		369
362	return 0;	370	return 0;
363	#undef N_RELOC	371	#undef N_RELOC
364	}	372	}
365		373
366	static int	374	static int
367	i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj,	375	i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj,
368	struct eb_objects *eb,	376	struct eb_objects *eb,
369	struct drm_i915_gem_relocation_entry *relocs,	377	struct drm_i915_gem_relocation_entry *relocs,
370	struct i915_address_space *vm)	378	struct i915_address_space *vm)
371	{	379	{
372	const struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;	380	const struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
373	int i, ret;	381	int i, ret;
374		382
375	for (i = 0; i < entry->relocation_count; i++) {	383	for (i = 0; i < entry->relocation_count; i++) {
376	ret = i915_gem_execbuffer_relocate_entry(obj, eb, &relocs[i],	384	ret = i915_gem_execbuffer_relocate_entry(obj, eb, &relocs[i],
377	vm);	385	vm);
378	if (ret)	386	if (ret)
379	return ret;	387	return ret;
380	}	388	}
381		389
382	return 0;	390	return 0;
383	}	391	}
384		392
385	static int	393	static int
386	i915_gem_execbuffer_relocate(struct eb_objects *eb,	394	i915_gem_execbuffer_relocate(struct eb_objects *eb,
387	struct i915_address_space *vm)	395	struct i915_address_space *vm)
388	{	396	{
389	struct drm_i915_gem_object *obj;	397	struct drm_i915_gem_object *obj;
390	int ret = 0;	398	int ret = 0;
391		399
392	/* This is the fast path and we cannot handle a pagefault whilst	400	/* This is the fast path and we cannot handle a pagefault whilst
393	* holding the struct mutex lest the user pass in the relocations	401	* holding the struct mutex lest the user pass in the relocations
394	* contained within a mmaped bo. For in such a case we, the page	402	* contained within a mmaped bo. For in such a case we, the page
395	* fault handler would call i915_gem_fault() and we would try to	403	* fault handler would call i915_gem_fault() and we would try to
396	* acquire the struct mutex again. Obviously this is bad and so	404	* acquire the struct mutex again. Obviously this is bad and so
397	* lockdep complains vehemently.	405	* lockdep complains vehemently.
398	*/	406	*/
399	// pagefault_disable();	407	// pagefault_disable();
400	list_for_each_entry(obj, &eb->objects, exec_list) {	408	list_for_each_entry(obj, &eb->objects, exec_list) {
401	ret = i915_gem_execbuffer_relocate_object(obj, eb, vm);	409	ret = i915_gem_execbuffer_relocate_object(obj, eb, vm);
402	if (ret)	410	if (ret)
403	break;	411	break;
404	}	412	}
405	// pagefault_enable();	413	// pagefault_enable();
406		414
407	return ret;	415	return ret;
408	}	416	}
409		417
410	#define __EXEC_OBJECT_HAS_PIN (1<<31)	418	#define __EXEC_OBJECT_HAS_PIN (1<<31)
411	#define __EXEC_OBJECT_HAS_FENCE (1<<30)	419	#define __EXEC_OBJECT_HAS_FENCE (1<<30)
412		420
413	static int	421	static int
414	need_reloc_mappable(struct drm_i915_gem_object *obj)	422	need_reloc_mappable(struct drm_i915_gem_object *obj)
415	{	423	{
416	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;	424	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
417	return entry->relocation_count && !use_cpu_reloc(obj);	425	return entry->relocation_count && !use_cpu_reloc(obj);
418	}	426	}
419		427
420	static int	428	static int
421	i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,	429	i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,
422	struct intel_ring_buffer *ring,	430	struct intel_ring_buffer *ring,
423	struct i915_address_space *vm,	431	struct i915_address_space *vm,
424	bool *need_reloc)	432	bool *need_reloc)
425	{	433	{
426	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;	434	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
427	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;	435	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
428	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;	436	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
429	bool need_fence, need_mappable;	437	bool need_fence, need_mappable;
430	int ret;	438	int ret;
431		439
432	need_fence =	440	need_fence =
433	has_fenced_gpu_access &&	441	has_fenced_gpu_access &&
434	entry->flags & EXEC_OBJECT_NEEDS_FENCE &&	442	entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
435	obj->tiling_mode != I915_TILING_NONE;	443	obj->tiling_mode != I915_TILING_NONE;
436	need_mappable = need_fence \|\| need_reloc_mappable(obj);	444	need_mappable = need_fence \|\| need_reloc_mappable(obj);
437		445
438	ret = i915_gem_object_pin(obj, vm, entry->alignment, need_mappable,	446	ret = i915_gem_object_pin(obj, vm, entry->alignment, need_mappable,
439	false);	447	false);
440	if (ret)	448	if (ret)
441	return ret;	449	return ret;
442		450
443	entry->flags \|= __EXEC_OBJECT_HAS_PIN;	451	entry->flags \|= __EXEC_OBJECT_HAS_PIN;
444		452
445	if (has_fenced_gpu_access) {	453	if (has_fenced_gpu_access) {
446	if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {	454	if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
447	ret = i915_gem_object_get_fence(obj);	455	ret = i915_gem_object_get_fence(obj);
448	if (ret)	456	if (ret)
449	return ret;	457	return ret;
450		458
451	if (i915_gem_object_pin_fence(obj))	459	if (i915_gem_object_pin_fence(obj))
452	entry->flags \|= __EXEC_OBJECT_HAS_FENCE;	460	entry->flags \|= __EXEC_OBJECT_HAS_FENCE;
453		461
454	obj->pending_fenced_gpu_access = true;	462	obj->pending_fenced_gpu_access = true;
455	}	463	}
456	}	464	}
457		465
458	/* Ensure ppgtt mapping exists if needed */	466	/* Ensure ppgtt mapping exists if needed */
459	if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {	467	if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {
460	i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,	468	i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
461	obj, obj->cache_level);	469	obj, obj->cache_level);
462		470
463	obj->has_aliasing_ppgtt_mapping = 1;	471	obj->has_aliasing_ppgtt_mapping = 1;
464	}	472	}
465		473
466	if (entry->offset != i915_gem_obj_offset(obj, vm)) {	474	if (entry->offset != i915_gem_obj_offset(obj, vm)) {
467	entry->offset = i915_gem_obj_offset(obj, vm);	475	entry->offset = i915_gem_obj_offset(obj, vm);
468	*need_reloc = true;	476	*need_reloc = true;
469	}	477	}
470		478
471	if (entry->flags & EXEC_OBJECT_WRITE) {	479	if (entry->flags & EXEC_OBJECT_WRITE) {
472	obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;	480	obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;
473	obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;	481	obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;
474	}	482	}
475		483
476	if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&	484	if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&
477	!obj->has_global_gtt_mapping)	485	!obj->has_global_gtt_mapping)
478	i915_gem_gtt_bind_object(obj, obj->cache_level);	486	i915_gem_gtt_bind_object(obj, obj->cache_level);
479		487
480	return 0;	488	return 0;
481	}	489	}
482		490
483	static void	491	static void
484	i915_gem_execbuffer_unreserve_object(struct drm_i915_gem_object *obj)	492	i915_gem_execbuffer_unreserve_object(struct drm_i915_gem_object *obj)
485	{	493	{
486	struct drm_i915_gem_exec_object2 *entry;	494	struct drm_i915_gem_exec_object2 *entry;
487		495
488	if (!i915_gem_obj_bound_any(obj))	496	if (!i915_gem_obj_bound_any(obj))
489	return;	497	return;
490		498
491	entry = obj->exec_entry;	499	entry = obj->exec_entry;
492		500

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/i915_gem_execbuffer.c – Rev 4104 → 4246