WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/i915_gem.c

 static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj);
 static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj,
 						   bool force);
+static __must_check int
+i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj,
+			       bool readonly);
 static __must_check int
 i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj,
 			   struct i915_address_space *vm,
 						    unsigned alignment,
 						    bool map_and_fenceable,
 				 struct drm_i915_gem_object *obj);
 static void i915_gem_object_update_fence(struct drm_i915_gem_object *obj,
 					 struct drm_i915_fence_reg *fence,
 					 bool enable);
-static long i915_gem_purge(struct drm_i915_private *dev_priv, long target);
+static unsigned long i915_gem_purge(struct drm_i915_private *dev_priv, long target);
-static long i915_gem_shrink_all(struct drm_i915_private *dev_priv);
+static unsigned long i915_gem_shrink_all(struct drm_i915_private *dev_priv);
 static void i915_gem_object_truncate(struct drm_i915_gem_object *obj);
 static bool cpu_cache_is_coherent(struct drm_device *dev,
 i915_gem_dumb_create(struct drm_file *file,
 		     struct drm_device *dev,
 		     struct drm_mode_create_dumb *args)
+{
 	/* have to work out size/pitch and return them */
-	args->pitch = ALIGN(args->width * ((args->bpp + 7) / 8), 64);
+	args->pitch = ALIGN(args->width * DIV_ROUND_UP(args->bpp, 8), 64);
 	args->size = args->pitch * args->height;
 	return i915_gem_create(file, dev,
 			       args->size, &args->handle);
+}
 		/* If we're not in the cpu read domain, set ourself into the gtt
 		 * read domain and manually flush cachelines (if required). This
 		 * optimizes for the case when the gpu will dirty the data
 		 * anyway again before the next pread happens. */
 		needs_clflush = !cpu_cache_is_coherent(dev, obj->cache_level);
-		if (i915_gem_obj_bound_any(obj)) {
-			ret = i915_gem_object_set_to_gtt_domain(obj, false);
+		ret = i915_gem_object_wait_rendering(obj, true);
 			if (ret)
 				return ret;
+		}
-	}
 	ret = i915_gem_object_get_pages(obj);
 	if (ret)
 		/* If we're not in the cpu write domain, set ourself into the gtt
 		 * write domain and manually flush cachelines (if required). This
 		 * optimizes for the case when the gpu will use the data
 		 * right away and we therefore have to clflush anyway. */
 		needs_clflush_after = cpu_write_needs_clflush(obj);
-		if (i915_gem_obj_bound_any(obj)) {
-			ret = i915_gem_object_set_to_gtt_domain(obj, true);
+		ret = i915_gem_object_wait_rendering(obj, false);
 			if (ret)
 				return ret;
+		}
-	}
 	/* Same trick applies to invalidate partially written cachelines read
 	 * before writing. */
 	if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0)
 		needs_clflush_before =
 			!cpu_cache_is_coherent(dev, obj->cache_level);
 	int ret;
 	BUG_ON(!mutex_is_locked(&ring->dev->struct_mutex));
 	ret = 0;
-	if (seqno == ring->outstanding_lazy_request)
+	if (seqno == ring->outstanding_lazy_seqno)
 		ret = i915_add_request(ring, NULL);
+	return ret;
+}
+static void fake_irq(unsigned long data)
+{
+//	wake_up_process((struct task_struct *)data);
+}
+static bool missed_irq(struct drm_i915_private *dev_priv,
+		       struct intel_ring_buffer *ring)
+{
+	return test_bit(ring->id, &dev_priv->gpu_error.missed_irq_rings);
+}
+static bool can_wait_boost(struct drm_i915_file_private *file_priv)
+{
+	if (file_priv == NULL)
+		return true;
-	return ret;
+	return !atomic_xchg(&file_priv->rps_wait_boost, true);
+}
 /**
  * Returns 0 if the seqno was found within the alloted time. Else returns the
  * errno with remaining time filled in timeout argument.
  */
 static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno,
 			unsigned reset_counter,
+			bool interruptible,
-			bool interruptible, struct timespec *timeout)
+			struct timespec *timeout,
+			struct drm_i915_file_private *file_priv)
+{
 	drm_i915_private_t *dev_priv = ring->dev->dev_private;
+	const bool irq_test_in_progress =
+		ACCESS_ONCE(dev_priv->gpu_error.test_irq_rings) & intel_ring_flag(ring);
-	struct timespec before, now, wait_time={1,0};
+	struct timespec before, now;
-	unsigned long timeout_jiffies;
+    unsigned long timeout_expire, wait_time;
-	long end;
-	bool wait_forever = true;
+    wait_queue_t __wait;
 	int ret;
 	WARN(dev_priv->pc8.irqs_disabled, "IRQs disabled\n");
+	if (i915_seqno_passed(ring->get_seqno(ring, true), seqno))
-	if (i915_seqno_passed(ring->get_seqno(ring, true), seqno))
+		return 0;
+    timeout_expire = timeout ? GetTimerTicks() + timespec_to_jiffies_timeout(timeout) : 0;
-		return 0;
+    wait_time = timeout ? timespec_to_jiffies_timeout(timeout) : 1;
+	if (dev_priv->info->gen >= 6 && can_wait_boost(file_priv)) {
-	trace_i915_gem_request_wait_begin(ring, seqno);
+		gen6_rps_boost(dev_priv);
 		if (file_priv)
-	if (timeout != NULL) {
-		wait_time = *timeout;
-		wait_forever = false;
+			mod_delayed_work(dev_priv->wq,
 					 &file_priv->mm.idle_work,
+					 msecs_to_jiffies(100));
-	timeout_jiffies = timespec_to_jiffies_timeout(&wait_time);
+	}
-	if (WARN_ON(!ring->irq_get(ring)))
-		return -ENODEV;
+	if (!irq_test_in_progress && WARN_ON(!ring->irq_get(ring)))
-    /* Record current time in case interrupted by signal, or wedged * */
+		return -ENODEV;
-	getrawmonotonic(&before);
-#define EXIT_COND \
-	(i915_seqno_passed(ring->get_seqno(ring, false), seqno) || \
+    INIT_LIST_HEAD(&__wait.task_list);
-	 i915_reset_in_progress(&dev_priv->gpu_error) || \
-	 reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter))
-	do {
-		if (interruptible)
+    __wait.evnt = CreateEvent(NULL, MANUAL_DESTROY);
 			end = wait_event_interruptible_timeout(ring->irq_queue,
-							       EXIT_COND,
+	/* Record current time in case interrupted by signal, or wedged */
-							       timeout_jiffies);
-		else
-			end = wait_event_timeout(ring->irq_queue, EXIT_COND,
+	trace_i915_gem_request_wait_begin(ring, seqno);
-						 timeout_jiffies);
 	for (;;) {
-		/* We need to check whether any gpu reset happened in between
+        unsigned long flags;
-		 * the caller grabbing the seqno and now ... */
-		if (reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter))
+		/* We need to check whether any gpu reset happened in between
-			end = -EAGAIN;
+		 * the caller grabbing the seqno and now ... */
-		/* ... but upgrade the -EGAIN to an -EIO if the gpu is truely
-		 * gone. */
+		if (reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter)) {
-		ret = i915_gem_check_wedge(&dev_priv->gpu_error, interruptible);
+			/* ... but upgrade the -EAGAIN to an -EIO if the gpu
+			 * is truely gone. */
+			ret = i915_gem_check_wedge(&dev_priv->gpu_error, interruptible);
-		if (ret)
-			end = ret;
+			if (ret == 0)
-	} while (end == 0 && wait_forever);
+				ret = -EAGAIN;
+			break;
+		}
-	getrawmonotonic(&now);
+		if (i915_seqno_passed(ring->get_seqno(ring, false), seqno)) {
-	ring->irq_put(ring);
+			ret = 0;
-	trace_i915_gem_request_wait_end(ring, seqno);
+			break;
+		}
-#undef EXIT_COND
+        if (timeout && time_after_eq(GetTimerTicks(), timeout_expire)) {
+			ret = -ETIME;
-	if (timeout) {
+			break;
-//		struct timespec sleep_time = timespec_sub(now, before);
+		}
-//		*timeout = timespec_sub(*timeout, sleep_time);
-	}
         spin_lock_irqsave(&ring->irq_queue.lock, flags);
+        if (list_empty(&__wait.task_list))
+            __add_wait_queue(&ring->irq_queue, &__wait);
+        spin_unlock_irqrestore(&ring->irq_queue.lock, flags);
+        WaitEventTimeout(__wait.evnt, 1);
+        if (!list_empty(&__wait.task_list)) {
+            spin_lock_irqsave(&ring->irq_queue.lock, flags);
+            list_del_init(&__wait.task_list);
-	switch (end) {
+            spin_unlock_irqrestore(&ring->irq_queue.lock, flags);
 	case -EIO:
-	case -EAGAIN: /* Wedged */
+    };
-	case -ERESTARTSYS: /* Signal */
+    trace_i915_gem_request_wait_end(ring, seqno);
 	if (ret)
 		return ret;
 	return __wait_seqno(ring, seqno,
 			    atomic_read(&dev_priv->gpu_error.reset_counter),
-			    interruptible, NULL);
+			    interruptible, NULL, NULL);
+}
 static int
 /* A nonblocking variant of the above wait. This is a highly dangerous routine
  * as the object state may change during this call.
  */
 static __must_check int
 i915_gem_object_wait_rendering__nonblocking(struct drm_i915_gem_object *obj,
+					    struct drm_file *file,
 					    bool readonly)
+{
 	struct drm_device *dev = obj->base.dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_ring_buffer *ring = obj->ring;
 	if (ret)
 		return ret;
 	reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);
 	mutex_unlock(&dev->struct_mutex);
-	ret = __wait_seqno(ring, seqno, reset_counter, true, NULL);
+	ret = __wait_seqno(ring, seqno, reset_counter, true, NULL, file->driver_priv);
 	mutex_lock(&dev->struct_mutex);
 	if (ret)
 		return ret;
 	/* Try to flush the object off the GPU without holding the lock.
 	 * We will repeat the flush holding the lock in the normal manner
 	 * to catch cases where we are gazumped.
 	 */
-	ret = i915_gem_object_wait_rendering__nonblocking(obj, !write_domain);
+	ret = i915_gem_object_wait_rendering__nonblocking(obj, file, !write_domain);
 	if (ret)
 		goto unref;
 				       &dev_priv->mm.fence_list);
+		}
+	}
+}
+void i915_vma_move_to_active(struct i915_vma *vma,
+			     struct intel_ring_buffer *ring)
+{
+	list_move_tail(&vma->mm_list, &vma->vm->active_list);
+	return i915_gem_object_move_to_active(vma->obj, ring);
+}
 static void
 i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj)
+{
 	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
 	 */
    ret = intel_ring_flush_all_caches(ring);
    if (ret)
        return ret;
-	request = kmalloc(sizeof(*request), GFP_KERNEL);
+	request = ring->preallocated_lazy_request;
-	if (request == NULL)
+	if (WARN_ON(request == NULL))
-		return -ENOMEM;
 		return -ENOMEM;
 	/* Record the position of the start of the request so that
 	 * should we detect the updated seqno part-way through the
     * GPU processing the request, we never over-estimate the
 	 * position of the head.
 	 */
    request_ring_position = intel_ring_get_tail(ring);
 	ret = ring->add_request(ring);
-	if (ret) {
-		kfree(request);
+	ret = ring->add_request(ring);
-		return ret;
+	if (ret)
 		return ret;
-	request->seqno = intel_ring_get_seqno(ring);
-	request->ring = ring;
-	request->head = request_start;
+	request->seqno = intel_ring_get_seqno(ring);
-	request->tail = request_ring_position;
+	request->ring = ring;
-	request->ctx = ring->last_context;
+	request->head = request_start;
-	request->batch_obj = obj;
+	request->tail = request_ring_position;
 	/* Whilst this request exists, batch_obj will be on the
+	 * active_list, and so will hold the active reference. Only when this
+	 * request is retired will the the batch_obj be moved onto the
+	 * inactive_list and lose its active reference. Hence we do not need
+	 * to explicitly hold another reference here.
+	 */
-	 * active_list, and so will hold the active reference. Only when this
+	request->batch_obj = obj;
 	 * request is retired will the the batch_obj be moved onto the
-	 * inactive_list and lose its active reference. Hence we do not need
+	/* Hold a reference to the current context so that we can inspect
-	 * to explicitly hold another reference here.
+	 * it later in case a hangcheck error event fires.
 			      &file_priv->mm.request_list);
 		spin_unlock(&file_priv->mm.lock);
+	}
 	trace_i915_gem_request_add(ring, request->seqno);
+	ring->outstanding_lazy_seqno = 0;
-	ring->outstanding_lazy_request = 0;
+	ring->preallocated_lazy_request = NULL;
 	if (!dev_priv->ums.mm_suspended) {
 	if (!file_priv)
 		return;
 	spin_lock(&file_priv->mm.lock);
-	if (request->file_priv) {
+	spin_lock(&file_priv->mm.lock);
-		list_del(&request->client_list);
-		request->file_priv = NULL;
+		list_del(&request->client_list);
 		request->file_priv = NULL;
 	spin_unlock(&file_priv->mm.lock);
+}
+	}
 	return false;
+}
+static bool i915_context_is_banned(const struct i915_ctx_hang_stats *hs)
+{
+    const unsigned long elapsed = GetTimerTicks()/100 - hs->guilty_ts;
+	if (hs->banned)
+		return true;
+	if (elapsed <= DRM_I915_CTX_BAN_PERIOD) {
+		DRM_ERROR("context hanging too fast, declaring banned!\n");
+		return true;
+	}
+	return false;
+}
 static void i915_set_reset_status(struct intel_ring_buffer *ring,
 				  struct drm_i915_gem_request *request,
 				  u32 acthd)
 		offset = i915_gem_obj_offset(request->batch_obj,
 					     request_to_vm(request));
 	if (ring->hangcheck.action != HANGCHECK_WAIT &&
 	    i915_request_guilty(request, acthd, &inside)) {
-		DRM_ERROR("%s hung %s bo (0x%lx ctx %d) at 0x%x\n",
+		DRM_DEBUG("%s hung %s bo (0x%lx ctx %d) at 0x%x\n",
 			  ring->name,
 			  inside ? "inside" : "flushing",
 			  offset,
 			  request->ctx ? request->ctx->id : 0,
 		hs = &request->ctx->hang_stats;
 	else if (request->file_priv)
 		hs = &request->file_priv->hang_stats;
 	if (hs) {
+		if (guilty) {
-		if (guilty)
+			hs->banned = i915_context_is_banned(hs);
+			hs->batch_active++;
-			hs->batch_active++;
+            hs->guilty_ts = GetTimerTicks()/100;
-		else
+		} else {
 			hs->batch_pending++;
+	}
+	}
+}
 static void i915_gem_free_request(struct drm_i915_gem_request *request)
+{
+}
 static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv,
 					struct intel_ring_buffer *ring)
-{
-	while (!list_empty(&ring->request_list)) {
-		struct drm_i915_gem_request *request;
-		request = list_first_entry(&ring->request_list,
-					   struct drm_i915_gem_request,
-					   list);
-		i915_gem_free_request(request);
-	}
+{
 	while (!list_empty(&ring->active_list)) {
 		struct drm_i915_gem_object *obj;
 		obj = list_first_entry(&ring->active_list,
 				       struct drm_i915_gem_object,
 				       ring_list);
+		i915_gem_object_move_to_inactive(obj);
+	}
+	/*
+	 * We must free the requests after all the corresponding objects have
+	 * been moved off active lists. Which is the same order as the normal
+	 * retire_requests function does. This is important if object hold
+	 * implicit references on things like e.g. ppgtt address spaces through
+	 * the request.
+	 */
+	while (!list_empty(&ring->request_list)) {
+		struct drm_i915_gem_request *request;
+		request = list_first_entry(&ring->request_list,
+					   struct drm_i915_gem_request,
+					   list);
-		i915_gem_object_move_to_inactive(obj);
+		i915_gem_free_request(request);
+	}
+}
 		i915_gem_reset_ring_status(dev_priv, ring);
 	for_each_ring(ring, dev_priv, i)
+		i915_gem_reset_ring_cleanup(dev_priv, ring);
-		i915_gem_reset_ring_cleanup(dev_priv, ring);
+	i915_gem_cleanup_ringbuffer(dev);
 	i915_gem_restore_fences(dev);
+}
+	}
 	WARN_ON(i915_verify_lists(ring->dev));
 }
-void
+bool
 i915_gem_retire_requests(struct drm_device *dev)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
-	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct intel_ring_buffer *ring;
-	struct intel_ring_buffer *ring;
+	bool idle = true;
 	int i;
+	for_each_ring(ring, dev_priv, i) {
+		i915_gem_retire_requests_ring(ring);
+		idle &= list_empty(&ring->request_list);
+	}
+	if (idle)
+		mod_delayed_work(dev_priv->wq,
+				   &dev_priv->mm.idle_work,
 				   msecs_to_jiffies(100));
 	for_each_ring(ring, dev_priv, i)
-		i915_gem_retire_requests_ring(ring);
+	return idle;
+}
 static void
 i915_gem_retire_work_handler(struct work_struct *work)
+{
-	drm_i915_private_t *dev_priv;
-	struct drm_device *dev;
-	struct intel_ring_buffer *ring;
-	bool idle;
-	int i;
 	struct drm_i915_private *dev_priv =
+		container_of(work, typeof(*dev_priv), mm.retire_work.work);
-	dev_priv = container_of(work, drm_i915_private_t,
+	struct drm_device *dev = dev_priv->dev;
+	bool idle;
+	/* Come back later if the device is busy... */
+	idle = false;
-				mm.retire_work.work);
+	if (mutex_trylock(&dev->struct_mutex)) {
-	dev = dev_priv->dev;
+		idle = i915_gem_retire_requests(dev);
-	/* Come back later if the device is busy... */
-	if (!mutex_trylock(&dev->struct_mutex)) {
-		queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work,
-				   round_jiffies_up_relative(HZ));
-        return;
-	}
-	i915_gem_retire_requests(dev);
-	/* Send a periodic flush down the ring so we don't hold onto GEM
-	 * objects indefinitely.
-	 */
-	idle = true;
-	for_each_ring(ring, dev_priv, i) {
+		mutex_unlock(&dev->struct_mutex);
-		if (ring->gpu_caches_dirty)
+	}
-			i915_add_request(ring, NULL);
+	if (!idle)
+		queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work,
+				   round_jiffies_up_relative(HZ));
-		idle &= list_empty(&ring->request_list);
-	}
+}
-	if (!dev_priv->ums.mm_suspended && !idle)
+static void
-		queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work,
+i915_gem_idle_work_handler(struct work_struct *work)
 				   round_jiffies_up_relative(HZ));
-	if (idle)
+	struct drm_i915_private *dev_priv =
 	drm_gem_object_unreference(&obj->base);
 	reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);
 	mutex_unlock(&dev->struct_mutex);
-	ret = __wait_seqno(ring, seqno, reset_counter, true, timeout);
+	ret = __wait_seqno(ring, seqno, reset_counter, true, timeout, file->driver_priv);
 	if (timeout)
 		args->timeout_ns = timespec_to_ns(timeout);
 	ret = i915_gem_check_olr(obj->ring, seqno);
 	if (ret)
+		return ret;
 		return ret;
 	trace_i915_gem_ring_sync_to(from, to, seqno);
 	ret = to->sync_to(to, from, seqno);
 	if (!ret)
 		/* We use last_read_seqno because sync_to()
         return 0;
 	if (list_empty(&vma->vma_link))
 		return 0;
+	if (!drm_mm_node_allocated(&vma->node)) {
+		i915_gem_vma_destroy(vma);
-	if (!drm_mm_node_allocated(&vma->node))
+		return 0;
 		goto destroy;
 	if (obj->has_aliasing_ppgtt_mapping) {
 		i915_ppgtt_unbind_object(dev_priv->mm.aliasing_ppgtt, obj);
 		obj->has_aliasing_ppgtt_mapping = 0;
+	}
 	i915_gem_gtt_finish_object(obj);
-	i915_gem_object_unpin_pages(obj);
 	list_del(&vma->mm_list);
 	/* Avoid an unnecessary call to unbind on rebind. */
 	if (i915_is_ggtt(vma->vm))
 	obj->map_and_fenceable = true;
-	drm_mm_remove_node(&vma->node);
-destroy:
+	drm_mm_remove_node(&vma->node);
 	i915_gem_vma_destroy(vma);
-	/* Since the unbound list is global, only move to that list if
 	 * no more VMAs exist.
-	 * NB: Until we have real VMAs there will only ever be one */
+	/* Since the unbound list is global, only move to that list if
+	 * no more VMAs exist. */
+	if (list_empty(&obj->vma_list))
+		list_move_tail(&obj->global_list, &dev_priv->mm.unbound_list);
+	/* And finally now the object is completely decoupled from this vma,
+	 * we can drop its hold on the backing storage and allow it to be
-	WARN_ON(!list_empty(&obj->vma_list));
+	 * reaped by the shrinker.
-	if (list_empty(&obj->vma_list))
+	 */
-		list_move_tail(&obj->global_list, &dev_priv->mm.unbound_list);
+	i915_gem_object_unpin_pages(obj);
 	WARN(obj && (!obj->stride || !obj->tiling_mode),
 	     "bogus fence setup with stride: 0x%x, tiling mode: %i\n",
 	     obj->stride, obj->tiling_mode);
+	switch (INTEL_INFO(dev)->gen) {
-	switch (INTEL_INFO(dev)->gen) {
+	case 8:
 	case 7:
 	case 6:
 	case 5:
 	case 4: i965_write_fence_reg(dev, reg, obj); break;
 		if (!reg->pin_count)
 			avail = reg;
+	}
 	if (avail == NULL)
-		return NULL;
+		goto deadlock;
 	/* None available, try to steal one or wait for a user to finish */
 	list_for_each_entry(reg, &dev_priv->mm.fence_list, lru_list) {
 		if (reg->pin_count)
 			continue;
+		return reg;
+	}
+deadlock:
+	/* Wait for completion of pending flips which consume fences */
-		return reg;
+//   if (intel_has_pending_fb_unpin(dev))
 //       return ERR_PTR(-EAGAIN);
-	return NULL;
+	return ERR_PTR(-EDEADLK);
 				       &dev_priv->mm.fence_list);
 			return 0;
+		}
 	} else if (enable) {
 		reg = i915_find_fence_reg(dev);
-		if (reg == NULL)
+		if (IS_ERR(reg))
-			return -EDEADLK;
+			return PTR_ERR(reg);
 		if (reg->obj) {
 			struct drm_i915_gem_object *old = reg->obj;
 					    old_read_domains,
 					    old_write_domain);
 	/* And bump the LRU for this access */
 	if (i915_gem_object_is_inactive(obj)) {
-		struct i915_vma *vma = i915_gem_obj_to_vma(obj,
-							   &dev_priv->gtt.base);
+		struct i915_vma *vma = i915_gem_obj_to_ggtt(obj);
 		if (vma)
 			list_move_tail(&vma->mm_list,
 				       &dev_priv->gtt.base.inactive_list);
 	spin_unlock(&file_priv->mm.lock);
 	if (seqno == 0)
 		return 0;
-	ret = __wait_seqno(ring, seqno, reset_counter, true, NULL);
+	ret = __wait_seqno(ring, seqno, reset_counter, true, NULL, NULL);
 	if (ret == 0)
 		queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, 0);
 			  args->handle);
 		ret = -EINVAL;
 		goto out;
+	}
+	if (obj->user_pin_count == ULONG_MAX) {
+		ret = -EBUSY;
+		goto out;
+	}
 	if (obj->user_pin_count == 0) {
 		ret = i915_gem_obj_ggtt_pin(obj, args->alignment, true, false);
 		if (ret)
 			goto out;
 void i915_gem_object_init(struct drm_i915_gem_object *obj,
 			  const struct drm_i915_gem_object_ops *ops)
+{
 	INIT_LIST_HEAD(&obj->global_list);
 	INIT_LIST_HEAD(&obj->ring_list);
-	INIT_LIST_HEAD(&obj->exec_list);
 	INIT_LIST_HEAD(&obj->obj_exec_link);
 	INIT_LIST_HEAD(&obj->vma_list);
 		 */
 		obj->cache_level = I915_CACHE_LLC;
 	} else
 		obj->cache_level = I915_CACHE_NONE;
-	return obj;
-}
-int i915_gem_init_object(struct drm_gem_object *obj)
-{
-	BUG();
+	trace_i915_gem_object_create(obj);
-	return 0;
+	return obj;
+}
 void i915_gem_free_object(struct drm_gem_object *gem_obj)
+{
 	struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);
+	struct drm_device *dev = obj->base.dev;
+	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct drm_device *dev = obj->base.dev;
+	struct i915_vma *vma, *next;
 	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct i915_vma *vma, *next;
+	intel_runtime_pm_get(dev_priv);
 	drm_gem_object_release(&obj->base);
 	i915_gem_info_remove_obj(dev_priv, obj->base.size);
 	kfree(obj->bit_17);
+	i915_gem_object_free(obj);
+	intel_runtime_pm_put(dev_priv);
+}
+struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj,
+				     struct i915_address_space *vm)
+{
+	struct i915_vma *vma;
+	list_for_each_entry(vma, &obj->vma_list, vma_link)
+		if (vma->vm == vm)
+			return vma;
-	i915_gem_object_free(obj);
+	return NULL;
 }
-struct i915_vma *i915_gem_vma_create(struct drm_i915_gem_object *obj,
+static struct i915_vma *__i915_gem_vma_create(struct drm_i915_gem_object *obj,
 				     struct i915_address_space *vm)
+{
 	struct i915_vma *vma = kzalloc(sizeof(*vma), GFP_KERNEL);
 		list_add_tail(&vma->vma_link, &obj->vma_list);
 	return vma;
+}
+struct i915_vma *
+i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj,
+				  struct i915_address_space *vm)
+{
+	struct i915_vma *vma;
+	vma = i915_gem_obj_to_vma(obj, vm);
+	if (!vma)
+		vma = __i915_gem_vma_create(obj, vm);
+	return vma;
+}
 void i915_gem_vma_destroy(struct i915_vma *vma)
+{
+	WARN_ON(vma->node.allocated);
+	/* Keep the vma as a placeholder in the execbuffer reservation lists */
+	if (!list_empty(&vma->exec_list))
 		return;
-	WARN_ON(vma->node.allocated);
+	list_del(&vma->vma_link);
 	list_del(&vma->vma_link);
 	kfree(vma);
+}
 #if 0
 int
-i915_gem_idle(struct drm_device *dev)
+i915_gem_suspend(struct drm_device *dev)
 {
 	drm_i915_private_t *dev_priv = dev->dev_private;
-	int ret;
+	int ret = 0;
 	if (dev_priv->ums.mm_suspended) {
-		mutex_unlock(&dev->struct_mutex);
+	mutex_lock(&dev->struct_mutex);
-		return 0;
-	}
+	if (dev_priv->ums.mm_suspended)
+		goto err;
 	ret = i915_gpu_idle(dev);
-	if (ret) {
+	ret = i915_gpu_idle(dev);
-		mutex_unlock(&dev->struct_mutex);
+	if (ret)
-		return ret;
+		goto err;
-	}
-	i915_gem_retire_requests(dev);
-	/* Under UMS, be paranoid and evict. */
+	i915_gem_retire_requests(dev);
-	if (!drm_core_check_feature(dev, DRIVER_MODESET))
+	/* Under UMS, be paranoid and evict. */
+	if (!drm_core_check_feature(dev, DRIVER_MODESET))
+		i915_gem_evict_everything(dev);
+	i915_kernel_lost_context(dev);
+	i915_gem_cleanup_ringbuffer(dev);
+	/* Hack!  Don't let anybody do execbuf while we don't control the chip.
-		i915_gem_evict_everything(dev);
+	 * We need to replace this with a semaphore, or something.
+	 * And not confound ums.mm_suspended!
 	 */
+	dev_priv->ums.mm_suspended = !drm_core_check_feature(dev,
+							     DRIVER_MODESET);
+	mutex_unlock(&dev->struct_mutex);
 	del_timer_sync(&dev_priv->gpu_error.hangcheck_timer);
 	cancel_delayed_work_sync(&dev_priv->mm.retire_work);
-	i915_kernel_lost_context(dev);
+	cancel_delayed_work_sync(&dev_priv->mm.idle_work);
 	i915_gem_cleanup_ringbuffer(dev);
+	return 0;
-	/* Cancel the retire work handler, which should be idle now. */
+err:
-	cancel_delayed_work_sync(&dev_priv->mm.retire_work);
-	return 0;
+	mutex_unlock(&dev->struct_mutex);
-}
+	return ret;
-#endif
+}
+#endif
-void i915_gem_l3_remap(struct drm_device *dev)
-{
+int i915_gem_l3_remap(struct intel_ring_buffer *ring, int slice)
-	drm_i915_private_t *dev_priv = dev->dev_private;
+{
+	struct drm_device *dev = ring->dev;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	u32 reg_base = GEN7_L3LOG_BASE + (slice * 0x200);
+	u32 *remap_info = dev_priv->l3_parity.remap_info[slice];
+	int i, ret;
 	u32 misccpctl;
-	int i;
+	if (!HAS_L3_DPF(dev) || !remap_info)
-	if (!HAS_L3_GPU_CACHE(dev))
-		return;
+		return 0;
-	if (!dev_priv->l3_parity.remap_info)
-		return;
 	ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3);
-	misccpctl = I915_READ(GEN7_MISCCPCTL);
-	I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE);
+	if (ret)
-	POSTING_READ(GEN7_MISCCPCTL);
+		return ret;
-	for (i = 0; i < GEN7_L3LOG_SIZE; i += 4) {
+	/*
-		u32 remap = I915_READ(GEN7_L3LOG_BASE + i);
+	 * Note: We do not worry about the concurrent register cacheline hang
-		if (remap && remap != dev_priv->l3_parity.remap_info[i/4])
+	 * here because no other code should access these registers other than
 	I915_WRITE(TILECTL, I915_READ(TILECTL) | TILECTL_SWZCTL);
 	if (IS_GEN6(dev))
 		I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_SNB));
 	else if (IS_GEN7(dev))
 		I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_IVB));
+	else if (IS_GEN8(dev))
+		I915_WRITE(GAMTARBMODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_BDW));
 	else
 		BUG();
+}
 int
 i915_gem_init_hw(struct drm_device *dev)
+{
 	drm_i915_private_t *dev_priv = dev->dev_private;
-	int ret;
+	int ret, i;
 	if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
 		return -EIO;
+	if (dev_priv->ellc_size)
+		I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
 	if (IS_HASWELL(dev))
-	if (dev_priv->ellc_size)
+		I915_WRITE(MI_PREDICATE_RESULT_2, IS_HSW_GT3(dev) ?
-		I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
+			   LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
 	if (HAS_PCH_NOP(dev)) {
-		u32 temp = I915_READ(GEN7_MSG_CTL);
-		temp &= ~(WAIT_FOR_PCH_FLR_ACK | WAIT_FOR_PCH_RESET_ACK);
-		I915_WRITE(GEN7_MSG_CTL, temp);
+		u32 temp = I915_READ(GEN7_MSG_CTL);
 		temp &= ~(WAIT_FOR_PCH_FLR_ACK | WAIT_FOR_PCH_RESET_ACK);
 		I915_WRITE(GEN7_MSG_CTL, temp);
 	i915_gem_l3_remap(dev);
+	i915_gem_init_swizzling(dev);
 	ret = i915_gem_init_rings(dev);
-	i915_gem_init_swizzling(dev);
+	if (ret)
 		return ret;
 	ret = i915_gem_init_rings(dev);
-	if (ret)
+	for (i = 0; i < NUM_L3_SLICES(dev); i++)
+		i915_gem_l3_remap(&dev_priv->ring[RCS], i);
+	/*
+	 * XXX: There was some w/a described somewhere suggesting loading
+	 * contexts before PPGTT.
+	 */
-		return ret;
+	ret = i915_gem_context_init(dev);
 	if (ret) {
-	/*
+		i915_gem_cleanup_ringbuffer(dev);
-	 * XXX: There was some w/a described somewhere suggesting loading
+		DRM_ERROR("Context initialization failed %d\n", ret);
-	 * contexts before PPGTT.
+		return ret;
 int
 i915_gem_leavevt_ioctl(struct drm_device *dev, void *data,
 		       struct drm_file *file_priv)
-{
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	int ret;
+{
 	if (drm_core_check_feature(dev, DRIVER_MODESET))
 		return 0;
-	drm_irq_uninstall(dev);
-	mutex_lock(&dev->struct_mutex);
-	ret =  i915_gem_idle(dev);
-	/* Hack!  Don't let anybody do execbuf while we don't control the chip.
-	 * We need to replace this with a semaphore, or something.
-	 * And not confound ums.mm_suspended!
-	 */
-	if (ret != 0)
-		dev_priv->ums.mm_suspended = 1;
-	mutex_unlock(&dev->struct_mutex);
+	drm_irq_uninstall(dev);
-	return ret;
+	return i915_gem_suspend(dev);
+}
 void
 i915_gem_lastclose(struct drm_device *dev)
-{
-	int ret;
+{
 	int ret;
 	if (drm_core_check_feature(dev, DRIVER_MODESET))
-		return;
 	if (drm_core_check_feature(dev, DRIVER_MODESET))
-	mutex_lock(&dev->struct_mutex);
+		return;
 	ret = i915_gem_idle(dev);
-	if (ret)
+	ret = i915_gem_suspend(dev);
     int i;
 	INIT_LIST_HEAD(&dev_priv->vm_list);
+	i915_init_vm(dev_priv, &dev_priv->gtt.base);
 	i915_init_vm(dev_priv, &dev_priv->gtt.base);
 	INIT_LIST_HEAD(&dev_priv->context_list);
 	INIT_LIST_HEAD(&dev_priv->mm.unbound_list);
 	INIT_LIST_HEAD(&dev_priv->mm.bound_list);
     INIT_LIST_HEAD(&dev_priv->mm.fence_list);
     for (i = 0; i < I915_NUM_RINGS; i++)
         init_ring_lists(&dev_priv->ring[i]);
 	for (i = 0; i < I915_MAX_NUM_FENCES; i++)
         INIT_LIST_HEAD(&dev_priv->fence_regs[i].lru_list);
+	INIT_DELAYED_WORK(&dev_priv->mm.retire_work,
+			  i915_gem_retire_work_handler);
-	INIT_DELAYED_WORK(&dev_priv->mm.retire_work,
+	INIT_DELAYED_WORK(&dev_priv->mm.idle_work,
-			  i915_gem_retire_work_handler);
+			  i915_gem_idle_work_handler);
 	init_waitqueue_head(&dev_priv->gpu_error.reset_queue);
 	int ret;
 	if (dev_priv->mm.phys_objs[id - 1] || !size)
 		return 0;
-	phys_obj = kzalloc(sizeof(struct drm_i915_gem_phys_object), GFP_KERNEL);
+	phys_obj = kzalloc(sizeof(*phys_obj), GFP_KERNEL);
 	if (!phys_obj)
 	return false;
+}
 bool i915_gem_obj_bound_any(struct drm_i915_gem_object *o)
-{
-	struct drm_i915_private *dev_priv = o->base.dev->dev_private;
+{
-	struct i915_address_space *vm;
+	struct i915_vma *vma;
-	list_for_each_entry(vm, &dev_priv->vm_list, global_link)
+	list_for_each_entry(vma, &o->vma_list, vma_link)
-		if (i915_gem_obj_bound(o, vm))
+		if (drm_mm_node_allocated(&vma->node))
 			return true;
 		if (vma->vm == vm)
 			return vma->node.size;
 	return 0;
-}
-struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj,
-				     struct i915_address_space *vm)
-{
-	struct i915_vma *vma;
-	list_for_each_entry(vma, &obj->vma_list, vma_link)
-		if (vma->vm == vm)
-			return vma;
-	return NULL;
 }
 struct i915_vma *
 i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj,
-				  struct i915_address_space *vm)
+struct i915_vma *i915_gem_obj_to_ggtt(struct drm_i915_gem_object *obj)
 {
+	struct i915_vma *vma;
-	struct i915_vma *vma;
+	if (WARN_ON(list_empty(&obj->vma_list)))
+	return NULL;
-	vma = i915_gem_obj_to_vma(obj, vm);
+	vma = list_first_entry(&obj->vma_list, typeof(*vma), vma_link);

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(root)/drivers/video/drm/i915/i915_gem.c – Rev 4539 → 4560