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Rev 2352 Rev 2360
Line 958... Line 958...
958
	list_add_tail(&request->list, &ring->request_list);
958
	list_add_tail(&request->list, &ring->request_list);
Line 959... Line 959...
959
 
959
 
Line 960... Line 960...
960
 
960
 
961
	ring->outstanding_lazy_request = false;
961
	ring->outstanding_lazy_request = false;
962
 
962
 
963
//	if (!dev_priv->mm.suspended) {
963
	if (!dev_priv->mm.suspended) {
964
//		if (i915_enable_hangcheck) {
964
		if (i915_enable_hangcheck) {
965
//			mod_timer(&dev_priv->hangcheck_timer,
965
//			mod_timer(&dev_priv->hangcheck_timer,
966
//				  jiffies +
966
//				  jiffies +
967
//				  msecs_to_jiffies(DRM_I915_HANGCHECK_PERIOD));
967
//				  msecs_to_jiffies(DRM_I915_HANGCHECK_PERIOD));
968
//		}
968
		}
969
//		if (was_empty)
969
        if (was_empty)
970
//			queue_delayed_work(dev_priv->wq,
970
           queue_delayed_work(dev_priv->wq,
971
//					   &dev_priv->mm.retire_work, HZ);
971
                      &dev_priv->mm.retire_work, HZ);
Line -... Line 982...
-
 
982
 
-
 
983
 
-
 
984
 
-
 
985
 
-
 
986
 
-
 
987
 
-
 
988
 
-
 
989
 
-
 
990
 
-
 
991
 
982
 
992
 
983
 
993
 
984
 
994
 
985
 
995
 
986
 
996
 
Line 1070... Line 1080...
1070
 
1080
 
1071
	for (i = 0; i < I915_NUM_RINGS; i++)
1081
	for (i = 0; i < I915_NUM_RINGS; i++)
1072
		i915_gem_retire_requests_ring(&dev_priv->ring[i]);
1082
		i915_gem_retire_requests_ring(&dev_priv->ring[i]);
Line -... Line 1083...
-
 
1083
}
-
 
1084
 
-
 
1085
static void
-
 
1086
i915_gem_retire_work_handler(struct work_struct *work)
-
 
1087
{
-
 
1088
	drm_i915_private_t *dev_priv;
-
 
1089
	struct drm_device *dev;
Line -... Line 1090...
-
 
1090
	bool idle;
-
 
1091
	int i;
-
 
1092
 
-
 
1093
//    ENTER();
-
 
1094
 
-
 
1095
	dev_priv = container_of(work, drm_i915_private_t,
-
 
1096
				mm.retire_work.work);
-
 
1097
	dev = dev_priv->dev;
-
 
1098
 
-
 
1099
	/* Come back later if the device is busy... */
-
 
1100
	if (!mutex_trylock(&dev->struct_mutex)) {
-
 
1101
        queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, HZ);
Line -... Line 1102...
-
 
1102
//        LEAVE();
Line -... Line 1103...
-
 
1103
		return;
-
 
1104
	}
-
 
1105
 
-
 
1106
	i915_gem_retire_requests(dev);
-
 
1107
 
-
 
1108
	/* Send a periodic flush down the ring so we don't hold onto GEM
Line -... Line 1109...
-
 
1109
	 * objects indefinitely.
-
 
1110
	 */
-
 
1111
	idle = true;
Line -... Line 1112...
-
 
1112
	for (i = 0; i < I915_NUM_RINGS; i++) {
-
 
1113
		struct intel_ring_buffer *ring = &dev_priv->ring[i];
-
 
1114
 
-
 
1115
		if (!list_empty(&ring->gpu_write_list)) {
-
 
1116
			struct drm_i915_gem_request *request;
-
 
1117
			int ret;
-
 
1118
 
Line -... Line 1119...
-
 
1119
			ret = i915_gem_flush_ring(ring,
-
 
1120
						  0, I915_GEM_GPU_DOMAINS);
Line -... Line 1121...
-
 
1121
			request = kzalloc(sizeof(*request), GFP_KERNEL);
-
 
1122
			if (ret || request == NULL ||
Line -... Line 1123...
-
 
1123
			    i915_add_request(ring, NULL, request))
-
 
1124
			    kfree(request);
-
 
1125
		}
Line 1073... Line 1126...
1073
}
1126
 
1074
 
1127
		idle &= list_empty(&ring->request_list);
1075
 
1128
	}
1076
 
1129
 
Line 1324... Line 1377...
1324
				    I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
1377
				    I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
1325
		if (ret)
1378
		if (ret)
1326
			return ret;
1379
			return ret;
1327
	}
1380
	}
Line 1328... Line 1381...
1328
 
1381
 
1329
	return 0; //i915_wait_request(ring, i915_gem_next_request_seqno(ring));
1382
	return i915_wait_request(ring, i915_gem_next_request_seqno(ring));
Line 1330... Line 1383...
1330
}
1383
}
1331
 
1384
 
1332
int
1385
int
Line 1921... Line 1974...
1921
	 *
1974
	 *
1922
	 * However for gen6+, we could do better by using the GFDT bit instead
1975
	 * However for gen6+, we could do better by using the GFDT bit instead
1923
	 * of uncaching, which would allow us to flush all the LLC-cached data
1976
	 * of uncaching, which would allow us to flush all the LLC-cached data
1924
	 * with that bit in the PTE to main memory with just one PIPE_CONTROL.
1977
	 * with that bit in the PTE to main memory with just one PIPE_CONTROL.
1925
	 */
1978
	 */
1926
//   ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE);
1979
	ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE);
1927
//   if (ret)
1980
	if (ret)
1928
//       return ret;
1981
		return ret;
Line 1929... Line 1982...
1929
 
1982
 
1930
	/* As the user may map the buffer once pinned in the display plane
1983
	/* As the user may map the buffer once pinned in the display plane
1931
	 * (e.g. libkms for the bootup splash), we have to ensure that we
1984
	 * (e.g. libkms for the bootup splash), we have to ensure that we
1932
	 * always use map_and_fenceable for all scanout buffers.
1985
	 * always use map_and_fenceable for all scanout buffers.
Line 2121... Line 2174...
2121
			list_move_tail(&obj->mm_list,
2174
			list_move_tail(&obj->mm_list,
2122
				       &dev_priv->mm.pinned_list);
2175
				       &dev_priv->mm.pinned_list);
2123
	}
2176
	}
2124
	obj->pin_mappable |= map_and_fenceable;
2177
	obj->pin_mappable |= map_and_fenceable;
Line -... Line 2178...
-
 
2178
 
2125
 
2179
	WARN_ON(i915_verify_lists(dev));
2126
	return 0;
2180
	return 0;
Line 2127... Line 2181...
2127
}
2181
}
2128
 
2182
 
2129
void
2183
void
2130
i915_gem_object_unpin(struct drm_i915_gem_object *obj)
2184
i915_gem_object_unpin(struct drm_i915_gem_object *obj)
2131
{
2185
{
Line -... Line 2186...
-
 
2186
	struct drm_device *dev = obj->base.dev;
2132
	struct drm_device *dev = obj->base.dev;
2187
	drm_i915_private_t *dev_priv = dev->dev_private;
2133
	drm_i915_private_t *dev_priv = dev->dev_private;
2188
 
Line 2134... Line 2189...
2134
 
2189
	WARN_ON(i915_verify_lists(dev));
2135
	BUG_ON(obj->pin_count == 0);
2190
	BUG_ON(obj->pin_count == 0);
2136
	BUG_ON(obj->gtt_space == NULL);
2191
	BUG_ON(obj->gtt_space == NULL);
2137
 
2192
 
2138
	if (--obj->pin_count == 0) {
2193
	if (--obj->pin_count == 0) {
2139
		if (!obj->active)
2194
		if (!obj->active)
-
 
2195
			list_move_tail(&obj->mm_list,
2140
			list_move_tail(&obj->mm_list,
2196
				       &dev_priv->mm.inactive_list);
Line 2422... Line 2478...
2422
    INIT_LIST_HEAD(&dev_priv->mm.gtt_list);
2478
    INIT_LIST_HEAD(&dev_priv->mm.gtt_list);
2423
    for (i = 0; i < I915_NUM_RINGS; i++)
2479
    for (i = 0; i < I915_NUM_RINGS; i++)
2424
        init_ring_lists(&dev_priv->ring[i]);
2480
        init_ring_lists(&dev_priv->ring[i]);
2425
	for (i = 0; i < I915_MAX_NUM_FENCES; i++)
2481
	for (i = 0; i < I915_MAX_NUM_FENCES; i++)
2426
        INIT_LIST_HEAD(&dev_priv->fence_regs[i].lru_list);
2482
        INIT_LIST_HEAD(&dev_priv->fence_regs[i].lru_list);
-
 
2483
	INIT_DELAYED_WORK(&dev_priv->mm.retire_work,
-
 
2484
			  i915_gem_retire_work_handler);
Line 2427... Line 2485...
2427
 
2485
 
2428
    /* On GEN3 we really need to make sure the ARB C3 LP bit is set */
2486
    /* On GEN3 we really need to make sure the ARB C3 LP bit is set */
2429
    if (IS_GEN3(dev)) {
2487
    if (IS_GEN3(dev)) {
2430
        u32 tmp = I915_READ(MI_ARB_STATE);
2488
        u32 tmp = I915_READ(MI_ARB_STATE);
Line 2455... Line 2513...
2455
//    dev_priv->mm.inactive_shrinker.seeks = DEFAULT_SEEKS;
2513
//    dev_priv->mm.inactive_shrinker.seeks = DEFAULT_SEEKS;
2456
//    register_shrinker(&dev_priv->mm.inactive_shrinker);
2514
//    register_shrinker(&dev_priv->mm.inactive_shrinker);
2457
}
2515
}
Line 2458... Line -...
2458
#define>
-