Subversion Repositories Kolibri OS

Rev

Rev 6660 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 6660 Rev 6937
Line 35... Line 35...
35 
#include "i915_trace.h"
 35 
#include "i915_trace.h"
36 
#include "intel_drv.h"
 36 
#include "intel_drv.h"
Line 37... Line 37...
37 
 
 37 
 
38 
#include
38 
#include
39 
#include
- 
 
40 
#include
- 
 
41 
#include
- 
 
42 
#include
- 
 
43 
 
 39 
#include
Line 44... Line 40...
44 
#include
40 
#include
Line -... Line 41...
- 
 
 41 
 
- 
 
 42 
#include
- 
 
 43 
 
- 
 
 44 
int init_display_kms(struct drm_device *dev);
45 
 
 45 
 
Line 46... Line 46...
46 
#include
46 
extern int intel_agp_enabled;
47 
 
 47 
 
48 
static struct drm_driver driver;
 48 
static struct drm_driver driver;
Line 66... Line 66...
66 
	.cursor_offsets = { CURSOR_A_OFFSET, CURSOR_B_OFFSET, CHV_CURSOR_C_OFFSET }
 66 
	.cursor_offsets = { CURSOR_A_OFFSET, CURSOR_B_OFFSET, CHV_CURSOR_C_OFFSET }
Line 67... Line 67...
67 
 
 67 
 
68 
#define IVB_CURSOR_OFFSETS \
 68 
#define IVB_CURSOR_OFFSETS \
Line 69... Line -...
69 
	.cursor_offsets = { CURSOR_A_OFFSET, IVB_CURSOR_B_OFFSET, IVB_CURSOR_C_OFFSET }
 - 
 
Line 70... Line -...
70 
 
 - 
 
71 
int init_display_kms(struct drm_device *dev);
 - 
 
72 
 
 - 
 
73 
 
 - 
 
Line 74... Line 69...
74 
extern int intel_agp_enabled;
 69 
	.cursor_offsets = { CURSOR_A_OFFSET, IVB_CURSOR_B_OFFSET, IVB_CURSOR_C_OFFSET }
75 
 
 70 
 
76 
#define PCI_VENDOR_ID_INTEL        0x8086
 71 
 
77 
 
 72 
 
Line 205... Line 200...
205 
#define GEN7_FEATURES  \
 200 
#define GEN7_FEATURES  \
206 
	.gen = 7, .num_pipes = 3, \
 201 
	.gen = 7, .num_pipes = 3, \
207 
	.need_gfx_hws = 1, .has_hotplug = 1, \
 202 
	.need_gfx_hws = 1, .has_hotplug = 1, \
208 
	.has_fbc = 1, \
 203 
	.has_fbc = 1, \
209 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 204 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
210 
	.has_llc = 1
 205 
	.has_llc = 1, \
- 
 
 206 
	GEN_DEFAULT_PIPEOFFSETS, \
- 
 
 207 
	IVB_CURSOR_OFFSETS
Line 211... Line 208...
211 
 
 208 
 
212 
static const struct intel_device_info intel_ivybridge_d_info = {
 209 
static const struct intel_device_info intel_ivybridge_d_info = {
213 
	GEN7_FEATURES,
 210 
	GEN7_FEATURES,
214 
	.is_ivybridge = 1,
 - 
 
215 
	GEN_DEFAULT_PIPEOFFSETS,
 - 
 
216 
	IVB_CURSOR_OFFSETS,
 211 
	.is_ivybridge = 1,
Line 217... Line 212...
217 
};
 212 
};
218 
 
 213 
 
219 
static const struct intel_device_info intel_ivybridge_m_info = {
 214 
static const struct intel_device_info intel_ivybridge_m_info = {
220 
	GEN7_FEATURES,
 215 
	GEN7_FEATURES,
221 
	.is_ivybridge = 1,
 - 
 
222 
	.is_mobile = 1,
 - 
 
223 
	GEN_DEFAULT_PIPEOFFSETS,
 216 
	.is_ivybridge = 1,
Line 224... Line 217...
224 
	IVB_CURSOR_OFFSETS,
 217 
	.is_mobile = 1,
225 
};
 218 
};
226 
 
 219 
 
227 
static const struct intel_device_info intel_ivybridge_q_info = {
 220 
static const struct intel_device_info intel_ivybridge_q_info = {
228 
	GEN7_FEATURES,
 - 
 
229 
	.is_ivybridge = 1,
 - 
 
230 
	.num_pipes = 0, /* legal, last one wins */
 221 
	GEN7_FEATURES,
Line -... Line 222...
- 
 
 222 
	.is_ivybridge = 1,
- 
 
 223 
	.num_pipes = 0, /* legal, last one wins */
- 
 
 224 
};
- 
 
 225 
 
- 
 
 226 
#define VLV_FEATURES  \
- 
 
 227 
	.gen = 7, .num_pipes = 2, \
- 
 
 228 
	.need_gfx_hws = 1, .has_hotplug = 1, \
- 
 
 229 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
231 
	GEN_DEFAULT_PIPEOFFSETS,
 230 
	.display_mmio_offset = VLV_DISPLAY_BASE, \
232 
	IVB_CURSOR_OFFSETS,
 231 
	GEN_DEFAULT_PIPEOFFSETS, \
233 
};
 - 
 
234 
 
 - 
 
235 
static const struct intel_device_info intel_valleyview_m_info = {
 232 
	CURSOR_OFFSETS
236 
	GEN7_FEATURES,
 - 
 
237 
	.is_mobile = 1,
 - 
 
238 
	.num_pipes = 2,
 - 
 
239 
	.is_valleyview = 1,
 - 
 
240 
	.display_mmio_offset = VLV_DISPLAY_BASE,
 233 
 
241 
	.has_fbc = 0, /* legal, last one wins */
 234 
static const struct intel_device_info intel_valleyview_m_info = {
Line 242... Line 235...
242 
	.has_llc = 0, /* legal, last one wins */
 235 
	VLV_FEATURES,
243 
	GEN_DEFAULT_PIPEOFFSETS,
 236 
	.is_valleyview = 1,
244 
	CURSOR_OFFSETS,
 - 
 
245 
};
 237 
	.is_mobile = 1,
246 
 
 - 
 
247 
static const struct intel_device_info intel_valleyview_d_info = {
 - 
 
248 
	GEN7_FEATURES,
 - 
 
249 
	.num_pipes = 2,
 - 
 
250 
	.is_valleyview = 1,
 - 
 
251 
	.display_mmio_offset = VLV_DISPLAY_BASE,
 238 
};
Line -... Line 239...
- 
 
 239 
 
- 
 
 240 
static const struct intel_device_info intel_valleyview_d_info = {
- 
 
 241 
	VLV_FEATURES,
- 
 
 242 
	.is_valleyview = 1,
- 
 
 243 
};
- 
 
 244 
 
252 
	.has_fbc = 0, /* legal, last one wins */
 245 
#define HSW_FEATURES  \
253 
	.has_llc = 0, /* legal, last one wins */
 246 
	GEN7_FEATURES, \
254 
	GEN_DEFAULT_PIPEOFFSETS,
 247 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
255 
	CURSOR_OFFSETS,
 - 
 
256 
};
 - 
 
257 
 
 - 
 
258 
static const struct intel_device_info intel_haswell_d_info = {
 - 
 
259 
	GEN7_FEATURES,
 - 
 
260 
	.is_haswell = 1,
 248 
	.has_ddi = 1, \
Line 261... Line 249...
261 
	.has_ddi = 1,
 249 
	.has_fpga_dbg = 1
262 
	.has_fpga_dbg = 1,
 250 
 
263 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
 251 
static const struct intel_device_info intel_haswell_d_info = {
264 
	GEN_DEFAULT_PIPEOFFSETS,
 252 
	HSW_FEATURES,
265 
	IVB_CURSOR_OFFSETS,
 - 
 
266 
};
 - 
 
267 
 
 - 
 
268 
static const struct intel_device_info intel_haswell_m_info = {
 - 
 
269 
	GEN7_FEATURES,
 - 
 
270 
	.is_haswell = 1,
 253 
	.is_haswell = 1,
Line 271... Line 254...
271 
	.is_mobile = 1,
 254 
};
272 
	.has_ddi = 1,
 - 
 
273 
	.has_fpga_dbg = 1,
 - 
 
274 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
 - 
 
275 
	GEN_DEFAULT_PIPEOFFSETS,
 255 
 
276 
	IVB_CURSOR_OFFSETS,
 - 
 
277 
};
 - 
 
278 
 
 256 
static const struct intel_device_info intel_haswell_m_info = {
279 
static const struct intel_device_info intel_broadwell_d_info = {
 - 
 
280 
	.gen = 8, .num_pipes = 3,
 - 
 
281 
	.need_gfx_hws = 1, .has_hotplug = 1,
 257 
	HSW_FEATURES,
Line 282... Line 258...
282 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
 258 
	.is_haswell = 1,
283 
	.has_llc = 1,
 - 
 
284 
	.has_ddi = 1,
 - 
 
285 
	.has_fpga_dbg = 1,
 - 
 
286 
	.has_fbc = 1,
 259 
	.is_mobile = 1,
287 
	GEN_DEFAULT_PIPEOFFSETS,
 - 
 
288 
	IVB_CURSOR_OFFSETS,
 260 
};
289 
};
 - 
 
290 
 
 - 
 
291 
static const struct intel_device_info intel_broadwell_m_info = {
 - 
 
292 
	.gen = 8, .is_mobile = 1, .num_pipes = 3,
 261 
 
Line 293... Line 262...
293 
	.need_gfx_hws = 1, .has_hotplug = 1,
 262 
static const struct intel_device_info intel_broadwell_d_info = {
294 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
 263 
	HSW_FEATURES,
295 
	.has_llc = 1,
 264 
	.gen = 8,
296 
	.has_ddi = 1,
 265 
};
297 
	.has_fpga_dbg = 1,
 - 
 
298 
	.has_fbc = 1,
 - 
 
299 
	GEN_DEFAULT_PIPEOFFSETS,
 - 
 
300 
	IVB_CURSOR_OFFSETS,
 - 
 
301 
};
 - 
 
302 
 
 - 
 
303 
static const struct intel_device_info intel_broadwell_gt3d_info = {
 266 
 
Line 304... Line 267...
304 
	.gen = 8, .num_pipes = 3,
 267 
static const struct intel_device_info intel_broadwell_m_info = {
305 
	.need_gfx_hws = 1, .has_hotplug = 1,
 268 
	HSW_FEATURES,
306 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 269 
	.gen = 8, .is_mobile = 1,
307 
	.has_llc = 1,
 270 
};
308 
	.has_ddi = 1,
 - 
 
309 
	.has_fpga_dbg = 1,
 - 
 
310 
	.has_fbc = 1,
 - 
 
311 
	GEN_DEFAULT_PIPEOFFSETS,
 - 
 
312 
	IVB_CURSOR_OFFSETS,
 - 
 
313 
};
 - 
 
314 
 
 271 
 
Line 315... Line 272...
315 
static const struct intel_device_info intel_broadwell_gt3m_info = {
 272 
static const struct intel_device_info intel_broadwell_gt3d_info = {
316 
	.gen = 8, .is_mobile = 1, .num_pipes = 3,
 273 
	HSW_FEATURES,
317 
	.need_gfx_hws = 1, .has_hotplug = 1,
 274 
	.gen = 8,
318 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 275 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
319 
	.has_llc = 1,
 276 
};
320 
	.has_ddi = 1,
 277 
 
321 
	.has_fpga_dbg = 1,
 278 
static const struct intel_device_info intel_broadwell_gt3m_info = {
322 
	.has_fbc = 1,
 279 
	HSW_FEATURES,
323 
	GEN_DEFAULT_PIPEOFFSETS,
 280 
	.gen = 8, .is_mobile = 1,
Line 324... Line 281...
324 
	IVB_CURSOR_OFFSETS,
 281 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
- 
 
 282 
};
325 
};
 283 
 
326 
 
 - 
 
327 
static const struct intel_device_info intel_cherryview_info = {
 - 
 
328 
	.gen = 8, .num_pipes = 3,
 - 
 
329 
	.need_gfx_hws = 1, .has_hotplug = 1,
 - 
 
330 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
 - 
 
331 
	.is_valleyview = 1,
 - 
 
332 
	.display_mmio_offset = VLV_DISPLAY_BASE,
 284 
static const struct intel_device_info intel_cherryview_info = {
333 
	GEN_CHV_PIPEOFFSETS,
 - 
 
334 
	CURSOR_OFFSETS,
 - 
 
335 
};
 285 
	.gen = 8, .num_pipes = 3,
Line 336... Line 286...
336 
 
 286 
	.need_gfx_hws = 1, .has_hotplug = 1,
- 
 
 287 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
337 
static const struct intel_device_info intel_skylake_info = {
 288 
	.is_cherryview = 1,
338 
	.is_skylake = 1,
 289 
	.display_mmio_offset = VLV_DISPLAY_BASE,
339 
	.gen = 9, .num_pipes = 3,
 - 
 
340 
	.need_gfx_hws = 1, .has_hotplug = 1,
 290 
	GEN_CHV_PIPEOFFSETS,
341 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
 - 
 
342 
	.has_llc = 1,
 - 
 
343 
	.has_ddi = 1,
 - 
 
344 
	.has_fpga_dbg = 1,
 - 
 
345 
	.has_fbc = 1,
 - 
 
346 
	GEN_DEFAULT_PIPEOFFSETS,
 - 
 
347 
	IVB_CURSOR_OFFSETS,
 291 
	CURSOR_OFFSETS,
Line 348... Line 292...
348 
};
 292 
};
349 
 
 293 
 
- 
 
 294 
static const struct intel_device_info intel_skylake_info = {
350 
static const struct intel_device_info intel_skylake_gt3_info = {
 295 
	HSW_FEATURES,
351 
	.is_skylake = 1,
 296 
	.is_skylake = 1,
352 
	.gen = 9, .num_pipes = 3,
 297 
	.gen = 9,
353 
	.need_gfx_hws = 1, .has_hotplug = 1,
 298 
};
354 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 299 
 
Line 371... Line 316...
371 
	.has_fbc = 1,
 316 
	.has_fbc = 1,
372 
	GEN_DEFAULT_PIPEOFFSETS,
 317 
	GEN_DEFAULT_PIPEOFFSETS,
373 
	IVB_CURSOR_OFFSETS,
 318 
	IVB_CURSOR_OFFSETS,
374 
};
 319 
};
Line -... Line 320...
-