WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/i915_drv.c

 #include "i915_trace.h"
 #include "intel_drv.h"
 #include
-#include
 #include
 #include
 #include
-#include
+#include
 #include
 #include
 #define __read_mostly
+#
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
 };
+static const struct intel_device_info intel_skylake_info = {
+	.is_preliminary = 1,
+	.is_skylake = 1,
+	.gen = 9, .num_pipes = 3,
+	.need_gfx_hws = 1, .has_hotplug = 1,
+	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
+	.has_llc = 1,
+	.has_ddi = 1,
+	.has_fbc = 1,
+	GEN_DEFAULT_PIPEOFFSETS,
+	IVB_CURSOR_OFFSETS,
+};
 /*
  * Make sure any device matches here are from most specific to most
  * general.  For example, since the Quanta match is based on the subsystem
  * and subvendor IDs, we need it to come before the more general IVB
 	INTEL_VLV_D_IDS(&intel_valleyview_d_info),	\
 	INTEL_BDW_GT12M_IDS(&intel_broadwell_m_info),	\
 	INTEL_BDW_GT12D_IDS(&intel_broadwell_d_info),	\
 	INTEL_BDW_GT3M_IDS(&intel_broadwell_gt3m_info),	\
 	INTEL_BDW_GT3D_IDS(&intel_broadwell_gt3d_info), \
-	INTEL_CHV_IDS(&intel_cherryview_info)
+	INTEL_CHV_IDS(&intel_cherryview_info),	\
+	INTEL_SKL_IDS(&intel_skylake_info)
 static const struct pci_device_id pciidlist[] = {       /* aka */
 	INTEL_PCI_IDS,
     {0, 0, 0}
 				WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
 			} else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
 				dev_priv->pch_type = PCH_LPT;
 				DRM_DEBUG_KMS("Found LynxPoint PCH\n");
 				WARN_ON(!IS_HASWELL(dev));
-				WARN_ON(IS_ULT(dev));
+				WARN_ON(IS_HSW_ULT(dev));
 			} else if (IS_BROADWELL(dev)) {
 				dev_priv->pch_type = PCH_LPT;
 				dev_priv->pch_id =
 					INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
 				DRM_DEBUG_KMS("This is Broadwell, assuming "
 					      "LynxPoint LP PCH\n");
 			} else if (id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
 				dev_priv->pch_type = PCH_LPT;
 				DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
 				WARN_ON(!IS_HASWELL(dev));
-				WARN_ON(!IS_ULT(dev));
+				WARN_ON(!IS_HSW_ULT(dev));
+			} else if (id == INTEL_PCH_SPT_DEVICE_ID_TYPE) {
+				dev_priv->pch_type = PCH_SPT;
+				DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
+				WARN_ON(!IS_SKYLAKE(dev));
+			} else if (id == INTEL_PCH_SPT_LP_DEVICE_ID_TYPE) {
+				dev_priv->pch_type = PCH_SPT;
+				DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
+				WARN_ON(!IS_SKYLAKE(dev));
 			} else
 				continue;
 			break;
 		return false;
 	if (i915.semaphores >= 0)
+		return i915.semaphores;
+	/* TODO: make semaphores and Execlists play nicely together */
+	if (i915.enable_execlists)
-		return i915.semaphores;
+		return false;
 	/* Until we get further testing... */
 	if (IS_GEN8(dev))
 			intel_encoder->suspend(intel_encoder);
+	}
 	drm_modeset_unlock_all(dev);
+}
+static int intel_suspend_complete(struct drm_i915_private *dev_priv);
+static int vlv_resume_prepare(struct drm_i915_private *dev_priv,
+			      bool rpm_resume);
-static int i915_drm_freeze(struct drm_device *dev)
+static int i915_drm_suspend(struct drm_device *dev)
+{
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct drm_crtc *crtc;
 			dev_err(&dev->pdev->dev,
 				"GEM idle failed, resume might fail\n");
 			return error;
+		}
+		intel_suspend_gt_powersave(dev);
 		/*
 		 * Disable CRTCs directly since we want to preserve sw state
 		 * for _thaw. Also, power gate the CRTC power wells.
 		 */
 			intel_crtc_control(crtc, false);
 		drm_modeset_unlock_all(dev);
+		intel_dp_mst_suspend(dev);
-		intel_dp_mst_suspend(dev);
-		flush_delayed_work(&dev_priv->rps.delayed_resume_work);
+		intel_runtime_pm_disable_interrupts(dev_priv);
-		intel_runtime_pm_disable_interrupts(dev);
-		intel_suspend_encoders(dev_priv);
+		intel_hpd_cancel_work(dev_priv);
-		intel_suspend_gt_powersave(dev);
+		intel_suspend_encoders(dev_priv);
 	intel_opregion_notify_adapter(dev, opregion_target_state);
 	intel_uncore_forcewake_reset(dev, false);
-	intel_opregion_fini(dev);
+	intel_opregion_fini(dev);
-	console_lock();
 	intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED);
-	console_unlock();
+	intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED, true);
 	dev_priv->suspend_count++;
 	intel_display_set_init_power(dev_priv, false);
-	return 0;
-}
-int i915_suspend(struct drm_device *dev, pm_message_t state)
-{
-	int error;
-	if (!dev || !dev->dev_private) {
-		DRM_ERROR("dev: %p\n", dev);
+	return 0;
-		DRM_ERROR("DRM not initialized, aborting suspend.\n");
-		return -ENODEV;
+}
-	}
-	if (state.event == PM_EVENT_PRETHAW)
-		return 0;
+static int i915_drm_suspend_late(struct drm_device *drm_dev)
+{
-	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
-		return 0;
 	struct drm_i915_private *dev_priv = drm_dev->dev_private;
+	int ret;
+	ret = intel_suspend_complete(dev_priv);
 	error = i915_drm_freeze(dev);
-	if (error)
+	if (ret) {
-		return error;
+		DRM_ERROR("Suspend complete failed: %d\n", ret);
-	if (state.event == PM_EVENT_SUSPEND) {
-		/* Shut down the device */
-		pci_disable_device(dev->pdev);
+		return ret;
-		pci_set_power_state(dev->pdev, PCI_D3hot);
+	}
-	}
+	pci_disable_device(drm_dev->pdev);
-	return 0;
+	pci_set_power_state(drm_dev->pdev, PCI_D3hot);
+	return 0;
-void intel_console_resume(struct work_struct *work)
-{
+}
-	struct drm_i915_private *dev_priv =
+int i915_suspend_legacy(struct drm_device *dev, pm_message_t state)
-		container_of(work, struct drm_i915_private,
+{
-			     console_resume_work);
+	int error;
-	struct drm_device *dev = dev_priv->dev;
+	if (!dev || !dev->dev_private) {
-	console_lock();
+		DRM_ERROR("dev: %p\n", dev);
-	intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING);
+		DRM_ERROR("DRM not initialized, aborting suspend.\n");
-	console_unlock();
+		return -ENODEV;
+	}
-static int i915_drm_thaw_early(struct drm_device *dev)
+	if (WARN_ON_ONCE(state.event != PM_EVENT_SUSPEND &&
-{
-	struct drm_i915_private *dev_priv = dev->dev_private;
+			 state.event != PM_EVENT_FREEZE))
 		return -EINVAL;
 	if (IS_HASWELL(dev) || IS_BROADWELL(dev))
-		hsw_disable_pc8(dev_priv);
+	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
 			DRM_ERROR("failed to re-initialize GPU, declaring wedged!\n");
 			atomic_set_mask(I915_WEDGED, &dev_priv->gpu_error.reset_counter);
+		}
 		mutex_unlock(&dev->struct_mutex);
+		/* We need working interrupts for modeset enabling ... */
-		intel_runtime_pm_restore_interrupts(dev);
+		intel_runtime_pm_enable_interrupts(dev_priv);
-		intel_modeset_init_hw(dev);
 		intel_modeset_init_hw(dev);
 			unsigned long irqflags;
-			spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
+		spin_lock_irq(&dev_priv->irq_lock);
-			if (dev_priv->display.hpd_irq_setup)
-				dev_priv->display.hpd_irq_setup(dev);
-			spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+			if (dev_priv->display.hpd_irq_setup)
 				dev_priv->display.hpd_irq_setup(dev);
 		spin_unlock_irq(&dev_priv->irq_lock);
+		drm_modeset_lock_all(dev);
-		intel_dp_mst_resume(dev);
+		intel_modeset_setup_hw_state(dev, true);
-		drm_modeset_lock_all(dev);
+		drm_modeset_unlock_all(dev);
 		intel_modeset_setup_hw_state(dev, true);
-		drm_modeset_unlock_all(dev);
+		intel_dp_mst_resume(dev);
 		/*
 		 * ... but also need to make sure that hotplug processing
 		 * doesn't cause havoc. Like in the driver load code we don't
 		 * bother with the tiny race here where we might loose hotplug
 		 * notifications.
 		 * */
-		intel_hpd_init(dev);
-		/* Config may have changed between suspend and resume */
-		drm_helper_hpd_irq_event(dev);
-	}
-	intel_opregion_init(dev);
+		intel_hpd_init(dev_priv);
-	/*
-	 * The console lock can be pretty contented on resume due
-	 * to all the printk activity.  Try to keep it out of the hot
-	 * path of resume if possible.
-	 */
+		/* Config may have changed between suspend and resume */
-	if (console_trylock()) {
+		drm_helper_hpd_irq_event(dev);
 		intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING);
 		console_unlock();
-	} else {
-		schedule_work(&dev_priv->console_resume_work);
-	}
-	mutex_lock(&dev_priv->modeset_restore_lock);
-	dev_priv->modeset_restore = MODESET_DONE;
-	mutex_unlock(&dev_priv->modeset_restore_lock);
+	intel_opregion_init(dev);
-	intel_opregion_notify_adapter(dev, PCI_D0);
+	intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING, false);
-	return 0;
+	mutex_lock(&dev_priv->modeset_restore_lock);
-}
+	dev_priv->modeset_restore = MODESET_DONE;
+	mutex_unlock(&dev_priv->modeset_restore_lock);
 static int i915_drm_thaw(struct drm_device *dev)
 	intel_opregion_notify_adapter(dev, PCI_D0);
 	if (drm_core_check_feature(dev, DRIVER_MODESET))
-		i915_check_and_clear_faults(dev);
+	drm_kms_helper_poll_enable(dev);
 	if (pci_enable_device(dev->pdev))
 		return -EIO;
+	pci_set_master(dev->pdev);
-	pci_set_master(dev->pdev);
+	if (IS_VALLEYVIEW(dev_priv))
+		ret = vlv_resume_prepare(dev_priv, false);
-	return i915_drm_thaw_early(dev);
+	if (ret)
-}
-int i915_resume(struct drm_device *dev)
-{
-	struct drm_i915_private *dev_priv = dev->dev_private;
+		DRM_ERROR("Resume prepare failed: %d,Continuing resume\n", ret);
-	int ret;
-	/*
-	 * Platforms with opregion should have sane BIOS, older ones (gen3 and
-	 * earlier) need to restore the GTT mappings since the BIOS might clear
-	 * all our scratch PTEs.
-	 */
+	intel_uncore_early_sanitize(dev, true);
+	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
-	ret = __i915_drm_thaw(dev, !dev_priv->opregion.header);
+		hsw_disable_pc8(dev_priv);
 	if (ret)
-		return ret;
+	intel_uncore_sanitize(dev);
 	intel_power_domains_init_hw(dev_priv);
-	drm_kms_helper_poll_enable(dev);
-	return 0;
+	return ret;
+}
+int i915_resume_legacy(struct drm_device *dev)
+{
+	int ret;
+	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
 		return 0;
 static int i915_resume_legacy(struct drm_device *dev)
 	ret = i915_drm_resume_early(dev);
-	i915_resume_early(dev);
+	if (ret)
 					  "error for simulated gpu hangs\n");
 				ret = 0;
+			}
+	}
+	if (i915_stop_ring_allow_warn(dev_priv))
+		pr_notice("drm/i915: Resetting chip after gpu hang\n");
 	if (ret) {
 		DRM_ERROR("Failed to reset chip: %i\n", ret);
 		mutex_unlock(&dev->struct_mutex);
 		return ret;
+	 *
 	 * Ring buffer needs to be re-initialized in the KMS case, or if X
 	 * was running at the time of the reset (i.e. we weren't VT
 	 * switched away).
 	 */
-	if (drm_core_check_feature(dev, DRIVER_MODESET) ||
+	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
-			!dev_priv->ums.mm_suspended) {
+		/* Used to prevent gem_check_wedged returning -EAGAIN during gpu reset */
-		dev_priv->ums.mm_suspended = 0;
+		dev_priv->gpu_error.reload_in_reset = true;
+		ret = i915_gem_init_hw(dev);
+		dev_priv->gpu_error.reload_in_reset = false;
 		ret = i915_gem_init_hw(dev);
 		mutex_unlock(&dev->struct_mutex);
 		if (ret) {
 			DRM_ERROR("Failed hw init on reset %d\n", ret);
 			return ret;
 		 * previous concerns that it doesn't respond well to some forms
 		 * of re-init after reset.
 		 */
 		if (INTEL_INFO(dev)->gen > 5)
 			intel_reset_gt_powersave(dev);
-		intel_hpd_init(dev);
 	} else {
 		mutex_unlock(&dev->struct_mutex);
+	}
+	}
 	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
 		return 0;
-	return i915_drm_freeze(drm_dev);
+	return i915_drm_suspend(drm_dev);
+}
 static int i915_pm_suspend_late(struct device *dev)
-{
 	struct pci_dev *pdev = to_pci_dev(dev);
-	struct drm_device *drm_dev = pci_get_drvdata(pdev);
+	struct pci_dev *pdev = to_pci_dev(dev);
-	struct drm_i915_private *dev_priv = drm_dev->dev_private;
+	struct drm_device *drm_dev = pci_get_drvdata(pdev);
 	 * similar so that power domains can be employed.
 	 */
 	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
 		return 0;
-	if (IS_HASWELL(drm_dev) || IS_BROADWELL(drm_dev))
-		hsw_enable_pc8(dev_priv);
-	pci_disable_device(pdev);
-	pci_set_power_state(pdev, PCI_D3hot);
-	return 0;
+	return i915_drm_suspend_late(drm_dev);
+}
 static int i915_pm_resume_early(struct device *dev)
+{
-	struct pci_dev *pdev = to_pci_dev(dev);
-	struct drm_device *drm_dev = pci_get_drvdata(pdev);
-	return i915_resume_early(drm_dev);
-}
-static int i915_pm_resume(struct device *dev)
+	struct pci_dev *pdev = to_pci_dev(dev);
-{
-	struct pci_dev *pdev = to_pci_dev(dev);
-	struct drm_device *drm_dev = pci_get_drvdata(pdev);
-	return i915_resume(drm_dev);
-}
-static int i915_pm_freeze(struct device *dev)
-{
-	struct pci_dev *pdev = to_pci_dev(dev);
-	struct drm_device *drm_dev = pci_get_drvdata(pdev);
+	struct drm_device *drm_dev = pci_get_drvdata(pdev);
-	if (!drm_dev || !drm_dev->dev_private) {
-		dev_err(dev, "DRM not initialized, aborting suspend.\n");
-		return -ENODEV;
-	}
-	return i915_drm_freeze(drm_dev);
-}
-static int i915_pm_thaw_early(struct device *dev)
-{
-	struct pci_dev *pdev = to_pci_dev(dev);
-	struct drm_device *drm_dev = pci_get_drvdata(pdev);
-	return i915_drm_thaw_early(drm_dev);
-}
-static int i915_pm_thaw(struct device *dev)
-{
-	struct pci_dev *pdev = to_pci_dev(dev);
+	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
-	struct drm_device *drm_dev = pci_get_drvdata(pdev);
+		return 0;
-	return i915_drm_thaw(drm_dev);
+	return i915_drm_resume_early(drm_dev);
+}
-static int i915_pm_poweroff(struct device *dev)
-{
-	struct pci_dev *pdev = to_pci_dev(dev);
-	struct drm_device *drm_dev = pci_get_drvdata(pdev);
-	return i915_drm_freeze(drm_dev);
 static int i915_pm_resume(struct device *dev)
-static int hsw_runtime_suspend(struct drm_i915_private *dev_priv)
-{
-	hsw_enable_pc8(dev_priv);
-	return 0;
+{
-}
-static int snb_runtime_resume(struct drm_i915_private *dev_priv)
+	struct pci_dev *pdev = to_pci_dev(dev);
-{
+	struct drm_device *drm_dev = pci_get_drvdata(pdev);
 	struct drm_device *dev = dev_priv->dev;
+	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
-	intel_init_pch_refclk(dev);
+		return 0;
-	return 0;
+	return i915_drm_resume(drm_dev);
 	DRM_ERROR("GT register access while GT waking disabled\n");
 	I915_WRITE(VLV_GTLC_PW_STATUS, VLV_GTLC_ALLOWWAKEERR);
 }
-static int vlv_runtime_suspend(struct drm_i915_private *dev_priv)
+static int vlv_suspend_complete(struct drm_i915_private *dev_priv)
+{
 	u32 mask;
 	vlv_force_gfx_clock(dev_priv, false);
 	return err;
 }
 static int vlv_resume_prepare(struct drm_i915_private *dev_priv,
-static int vlv_runtime_resume(struct drm_i915_private *dev_priv)
+				bool rpm_resume)
+{
 	struct drm_device *dev = dev_priv->dev;
 	if (!ret)
 		ret = err;
+	vlv_check_no_gt_access(dev_priv);
 	vlv_check_no_gt_access(dev_priv);
 	if (rpm_resume) {
+	intel_init_clock_gating(dev);
-	intel_init_clock_gating(dev);
+	i915_gem_restore_fences(dev);
 	i915_gem_restore_fences(dev);
 	int ret;
 	if (WARN_ON_ONCE(!(dev_priv->rps.enabled && intel_enable_rc6(dev))))
 		return -ENODEV;
+	if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev)))
 		return -ENODEV;
 	WARN_ON(!HAS_RUNTIME_PM(dev));
 	assert_force_wake_inactive(dev_priv);
 	 * an RPM reference.
 	 */
 	i915_gem_release_all_mmaps(dev_priv);
 	mutex_unlock(&dev->struct_mutex);
-	/*
-	 * rps.work can't be rearmed here, since we get here only after making
-	 * sure the GPU is idle and the RPS freq is set to the minimum. See
-	 * intel_mark_idle().
-	 */
-	cancel_work_sync(&dev_priv->rps.work);
+	intel_suspend_gt_powersave(dev);
-	intel_runtime_pm_disable_interrupts(dev);
-	if (IS_GEN6(dev)) {
-		ret = 0;
-	} else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
-		ret = hsw_runtime_suspend(dev_priv);
-	} else if (IS_VALLEYVIEW(dev)) {
-		ret = vlv_runtime_suspend(dev_priv);
-	} else {
-		ret = -ENODEV;
-		WARN_ON(1);
+	intel_runtime_pm_disable_interrupts(dev_priv);
 	ret = intel_suspend_complete(dev_priv);
 	if (ret) {
 		DRM_ERROR("Runtime suspend failed, disabling it (%d)\n", ret);
-		intel_runtime_pm_restore_interrupts(dev);
+		intel_runtime_pm_enable_interrupts(dev_priv);
 		return ret;
+	}
+	del_timer_sync(&dev_priv->gpu_error.hangcheck_timer);
+	dev_priv->pm.suspended = true;
+	/*
 	 * FIXME: We really should find a document that references the arguments
-	del_timer_sync(&dev_priv->gpu_error.hangcheck_timer);
+	 * used below!
-	dev_priv->pm.suspended = true;
+	 */
+	if (IS_HASWELL(dev)) {
-	/*
+		/*
 	 * current versions of firmware which depend on this opregion
 	 * notification have repurposed the D1 definition to mean
+	 * "runtime suspended" vs. what you would normally expect (D3)
+		 * to distinguish it from notifications that might be sent via
+		 * the suspend path.
+	 */
+	intel_opregion_notify_adapter(dev, PCI_D1);
+	} else {
+		/*
+		 * On Broadwell, if we use PCI_D1 the PCH DDI ports will stop
+		 * being detected, and the call we do at intel_runtime_resume()
+		 * won't be able to restore them. Since PCI_D3hot matches the
+		 * actual specification and appears to be working, use it. Let's
-	 * "runtime suspended" vs. what you would normally expect (D3)
+		 * assume the other non-Haswell platforms will stay the same as
-	 * to distinguish it from notifications that might be sent
+		 * Broadwell.
-	 * via the suspend path.
+		 */
-	 */
+		intel_opregion_notify_adapter(dev, PCI_D3hot);
 	intel_opregion_notify_adapter(dev, PCI_D1);
 	DRM_DEBUG_KMS("Device suspended\n");
 	return 0;
 }
+static int intel_runtime_resume(struct device *device)
 static int intel_runtime_resume(struct device *device)
 	struct pci_dev *pdev = to_pci_dev(device);
-	struct pci_dev *pdev = to_pci_dev(device);
+	struct drm_device *dev = pci_get_drvdata(pdev);
-	struct drm_device *dev = pci_get_drvdata(pdev);
+	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct drm_i915_private *dev_priv = dev->dev_private;
+	int ret = 0;
-	int ret;
+	if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev)))
-	WARN_ON(!HAS_RUNTIME_PM(dev));
+		return -ENODEV;
-	DRM_DEBUG_KMS("Resuming device\n");
-	intel_opregion_notify_adapter(dev, PCI_D0);
-	dev_priv->pm.suspended = false;
 	DRM_DEBUG_KMS("Resuming device\n");
 	if (IS_GEN6(dev)) {
-		ret = snb_runtime_resume(dev_priv);
+	intel_opregion_notify_adapter(dev, PCI_D0);
-	} else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
+	dev_priv->pm.suspended = false;
 		ret = hsw_runtime_resume(dev_priv);
-	} else if (IS_VALLEYVIEW(dev)) {
+	if (IS_GEN6(dev_priv))
-		ret = vlv_runtime_resume(dev_priv);
+		intel_init_pch_refclk(dev);
-	} else {
+	else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
-		WARN_ON(1);
+		hsw_disable_pc8(dev_priv);
-		ret = -ENODEV;
+	else if (IS_VALLEYVIEW(dev_priv))
 		ret = vlv_resume_prepare(dev_priv, true);
 	/*
 	 * No point of rolling back things in case of an error, as the best
+	 * we can do is to hope that things will still work (and disable RPM).
+	 */
+	i915_gem_init_swizzling(dev);
+	gen6_update_ring_freq(dev);
+	intel_runtime_pm_enable_interrupts(dev_priv);
+	intel_enable_gt_powersave(dev);
+	if (ret)
+		DRM_ERROR("Runtime resume failed, disabling it (%d)\n", ret);
+	else
+		DRM_DEBUG_KMS("Device resumed\n");
+	return ret;
+}
+/*
+ * This function implements common functionality of runtime and system
+ * suspend sequence.
-	 * we can do is to hope that things will still work (and disable RPM).
+ */
+static int intel_suspend_complete(struct drm_i915_private *dev_priv)
+{
+	struct drm_device *dev = dev_priv->dev;
+	int ret;
 	 */
-	i915_gem_init_swizzling(dev);
+	if (IS_HASWELL(dev) || IS_BROADWELL(dev))
-	gen6_update_ring_freq(dev);
+		ret = hsw_suspend_complete(dev_priv);
 	else if (IS_VALLEYVIEW(dev))
+		ret = vlv_suspend_complete(dev_priv);
+	else
+		ret = 0;
+	return ret;
+}
+static const struct dev_pm_ops i915_pm_ops = {
+	/*
+	 * S0ix (via system suspend) and S3 event handlers [PMSG_SUSPEND,
+	 * PMSG_RESUME]
+	 */
+	.suspend = i915_pm_suspend,
+	.suspend_late = i915_pm_suspend_late,
+	.resume_early = i915_pm_resume_early,
+	.resume = i915_pm_resume,
-	intel_runtime_pm_restore_interrupts(dev);
+	/*
-	intel_reset_gt_powersave(dev);
+	 * S4 event handlers
+	 * @freeze, @freeze_late    : called (1) before creating the
-	if (ret)
+	 *                            hibernation image [PMSG_FREEZE] and
+	 *                            (2) after rebooting, before restoring
-		DRM_ERROR("Runtime resume failed, disabling it (%d)\n", ret);
+	 *                            the image [PMSG_QUIESCE]
-	else
+	 * @thaw, @thaw_early       : called (1) after creating the hibernation
+	 *                            image, before writing it [PMSG_THAW]
+	 *                            and (2) after failing to create or
-		DRM_DEBUG_KMS("Device resumed\n");
+	 *                            restore the image [PMSG_RECOVER]
 	 * @poweroff, @poweroff_late: called after writing the hibernation
-	return ret;
+	 *                            image, before rebooting [PMSG_HIBERNATE]
 	 * @restore, @restore_early : called after rebooting and restoring the
     /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
 //    .suspend = i915_suspend,
 //    .resume = i915_resume,
-//    .device_is_agp = i915_driver_device_is_agp,
-//    .master_create = i915_master_create,
-//    .master_destroy = i915_master_destroy,
+//    .device_is_agp = i915_driver_device_is_agp,
 #if defined(CONFIG_DEBUG_FS)
 	.debugfs_init = i915_debugfs_init,
 	.debugfs_cleanup = i915_debugfs_cleanup,
 #endif

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/i915_drv.c @ 5060 – Rev 5060 → 5354