WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/i915_drv.c

 struct drm_device *main_device;
 struct drm_file *drm_file_handlers[256];
 static int i915_modeset __read_mostly = 1;
-static int i915_modeset __read_mostly = 1;
+module_param_named(modeset, i915_modeset, int, 0400);
 MODULE_PARM_DESC(modeset,
 		"Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, "
+		"1=on, -1=force vga console preference [default])");
 		"1=on, -1=force vga console preference [default])");
+int i915_panel_ignore_lid __read_mostly         =  1;
-int i915_panel_ignore_lid __read_mostly         =  0;
+module_param_named(panel_ignore_lid, i915_panel_ignore_lid, int, 0600);
+MODULE_PARM_DESC(panel_ignore_lid,
-MODULE_PARM_DESC(panel_ignore_lid,
+		"Override lid status (0=autodetect, 1=autodetect disabled [default], "
-		"Override lid status (0=autodetect [default], 1=lid open, "
+		"-1=force lid closed, -2=force lid open)");
 		"-1=lid closed)");
+unsigned int i915_powersave  __read_mostly      =  0;
-unsigned int i915_powersave  __read_mostly      =  0;
+module_param_named(powersave, i915_powersave, int, 0600);
 MODULE_PARM_DESC(powersave,
 		"Enable powersavings, fbc, downclocking, etc. (default: true)");
 int i915_semaphores __read_mostly = -1;
-int i915_semaphores __read_mostly = -1;
+module_param_named(semaphores, i915_semaphores, int, 0600);
 MODULE_PARM_DESC(semaphores,
-MODULE_PARM_DESC(semaphores,
+		"Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))");
 		"Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))");
 int i915_enable_rc6 __read_mostly      = 0;
-int i915_enable_rc6 __read_mostly      = 0;
+module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0400);
+MODULE_PARM_DESC(i915_enable_rc6,
-MODULE_PARM_DESC(i915_enable_rc6,
+		"Enable power-saving render C-state 6. "
-		"Enable power-saving render C-state 6. "
+		"Different stages can be selected via bitmask values "
-		"Different stages can be selected via bitmask values "
+		"(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). "
-		"(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). "
+		"For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. "
+		"default: -1 (use per-chip default)");
 		"For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. "
-		"default: -1 (use per-chip default)");
+int i915_enable_fbc __read_mostly      =  0;
 module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600);
-int i915_enable_fbc __read_mostly      =  0;
+MODULE_PARM_DESC(i915_enable_fbc,
+		"Enable frame buffer compression for power savings "
-MODULE_PARM_DESC(i915_enable_fbc,
+		"(default: -1 (use per-chip default))");
 		"Enable frame buffer compression for power savings "
-		"(default: -1 (use per-chip default))");
+unsigned int i915_lvds_downclock  __read_mostly =  0;
 module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
+MODULE_PARM_DESC(lvds_downclock,
-unsigned int i915_lvds_downclock  __read_mostly =  0;
+		"Use panel (LVDS/eDP) downclocking for power savings "
-MODULE_PARM_DESC(lvds_downclock,
+		"(default: false)");
 		"Use panel (LVDS/eDP) downclocking for power savings "
-		"(default: false)");
+int i915_lvds_channel_mode __read_mostly;
+module_param_named(lvds_channel_mode, i915_lvds_channel_mode, int, 0600);
 MODULE_PARM_DESC(lvds_channel_mode,
-int i915_lvds_channel_mode __read_mostly;
+		 "Specify LVDS channel mode "
-MODULE_PARM_DESC(lvds_channel_mode,
+		 "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
 		 "Specify LVDS channel mode "
+int i915_panel_use_ssc __read_mostly = -1;
-		 "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
+module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600);
 MODULE_PARM_DESC(lvds_use_ssc,
+		"Use Spread Spectrum Clock with panels [LVDS/eDP] "
-int i915_panel_use_ssc __read_mostly = -1;
+		"(default: auto from VBT)");
 MODULE_PARM_DESC(lvds_use_ssc,
-		"Use Spread Spectrum Clock with panels [LVDS/eDP] "
+int i915_vbt_sdvo_panel_type __read_mostly      = -1;
-		"(default: auto from VBT)");
+module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600);
 MODULE_PARM_DESC(vbt_sdvo_panel_type,
+		"Override/Ignore selection of SDVO panel mode in the VBT "
-int i915_vbt_sdvo_panel_type __read_mostly      = -1;
+		"(-2=ignore, -1=auto [default], index in VBT BIOS table)");
 MODULE_PARM_DESC(vbt_sdvo_panel_type,
-		"Override/Ignore selection of SDVO panel mode in the VBT "
+static bool i915_try_reset __read_mostly = true;
+module_param_named(reset, i915_try_reset, bool, 0600);
-		"(-2=ignore, -1=auto [default], index in VBT BIOS table)");
+MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)");
-static bool i915_try_reset __read_mostly = true;
+bool i915_enable_hangcheck __read_mostly = false;
-MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)");
+module_param_named(enable_hangcheck, i915_enable_hangcheck, bool, 0644);
 	.need_gfx_hws = 1, .has_hotplug = 1,
 	.has_fbc = 0,
 	.has_bsd_ring = 1,
 	.has_blt_ring = 1,
 	.is_valleyview = 1,
+	.display_mmio_offset = VLV_DISPLAY_BASE,
 };
 static const struct intel_device_info intel_valleyview_d_info = {
 	.gen = 7,
 	.need_gfx_hws = 1, .has_hotplug = 1,
 	.has_fbc = 0,
 	.has_bsd_ring = 1,
 	.has_blt_ring = 1,
+	.is_valleyview = 1,
-	.is_valleyview = 1,
+	.display_mmio_offset = VLV_DISPLAY_BASE,
 };
 static const struct intel_device_info intel_haswell_d_info = {
 	INTEL_VGA_DEVICE(0x0A1A, &intel_haswell_d_info), /* ULT GT2 server */
 	INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT2 server */
 	INTEL_VGA_DEVICE(0x0A06, &intel_haswell_m_info), /* ULT GT1 mobile */
 	INTEL_VGA_DEVICE(0x0A16, &intel_haswell_m_info), /* ULT GT2 mobile */
 	INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT2 mobile */
+	INTEL_VGA_DEVICE(0x0D02, &intel_haswell_d_info), /* CRW GT1 desktop */
-	INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT1 desktop */
+	INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT2 desktop */
 	INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT2 desktop */
-	INTEL_VGA_DEVICE(0x0D32, &intel_haswell_d_info), /* CRW GT2 desktop */
+	INTEL_VGA_DEVICE(0x0D0A, &intel_haswell_d_info), /* CRW GT1 server */
-	INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT1 server */
+	INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT2 server */
 	INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT2 server */
-	INTEL_VGA_DEVICE(0x0D3A, &intel_haswell_d_info), /* CRW GT2 server */
+	INTEL_VGA_DEVICE(0x0D06, &intel_haswell_m_info), /* CRW GT1 mobile */
-	INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT1 mobile */
+	INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT2 mobile */
 	INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT2 mobile */
-	INTEL_VGA_DEVICE(0x0D36, &intel_haswell_m_info), /* CRW GT2 mobile */
 	INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info),
 	INTEL_VGA_DEVICE(0x0157, &intel_valleyview_m_info),
 	INTEL_VGA_DEVICE(0x0155, &intel_valleyview_d_info),
     {0, 0, 0}
 };
     ent = find_pci_device(&device, pciidlist);
     if( unlikely(ent == NULL) )
+    {
         dbgprintf("device not found\n");
-        return 0;
+        return -ENODEV;
     };
 			dev_priv->gt.force_wake_get(dev_priv); \
 		val = read##y(dev_priv->regs + reg); \
 		if (dev_priv->forcewake_count == 0) \
 			dev_priv->gt.force_wake_put(dev_priv); \
 		spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); \
-	} else if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \
-		val = read##y(dev_priv->regs + reg + 0x180000);		\
 	} else { \
 		val = read##y(dev_priv->regs + reg); \
 	} \
 	return val; \
+}
 		ilk_dummy_write(dev_priv); \
 	if (IS_HASWELL(dev_priv->dev) && (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \
 		DRM_ERROR("Unknown unclaimed register before writing to %x\n", reg); \
 		I915_WRITE_NOTRACE(GEN7_ERR_INT, ERR_INT_MMIO_UNCLAIMED); \
 	} \
-	if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \
-		write##y(val, dev_priv->regs + reg + 0x180000);		\
-	} else {							\
 	write##y(val, dev_priv->regs + reg); \
-	}								\
 	if (unlikely(__fifo_ret)) { \
 		gen6_gt_check_fifodbg(dev_priv); \
 	} \
 	if (IS_HASWELL(dev_priv->dev) && (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \
 		DRM_ERROR("Unclaimed write to %x\n", reg); \

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/i915_drv.c – Rev 3263 → 3480