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Line 51... | Line 51... | ||
51 | 51 | ||
Line 52... | Line 52... | ||
52 | int i915_panel_ignore_lid __read_mostly = 0; |
52 | int i915_panel_ignore_lid __read_mostly = 0; |
Line 53... | Line 53... | ||
53 | 53 | ||
Line 54... | Line 54... | ||
54 | unsigned int i915_powersave __read_mostly = 0; |
54 | unsigned int i915_powersave __read_mostly = 0; |
Line 55... | Line 55... | ||
55 | 55 | ||
Line 64... | Line 64... | ||
64 | int i915_vbt_sdvo_panel_type __read_mostly = -1; |
64 | int i915_vbt_sdvo_panel_type __read_mostly = -1; |
Line 65... | Line 65... | ||
65 | 65 | ||
Line 66... | Line 66... | ||
66 | #define PCI_VENDOR_ID_INTEL 0x8086 |
66 | #define PCI_VENDOR_ID_INTEL 0x8086 |
67 | 67 | ||
68 | #define INTEL_VGA_DEVICE(id, info) { \ |
68 | #define INTEL_VGA_DEVICE(id, info) { \ |
69 | .class = PCI_CLASS_DISPLAY_VGA << 8, \ |
69 | .class = PCI_BASE_CLASS_DISPLAY << 16, \ |
70 | .class_mask = 0xff0000, \ |
70 | .class_mask = 0xff0000, \ |
71 | .vendor = 0x8086, \ |
71 | .vendor = 0x8086, \ |
72 | .device = id, \ |
72 | .device = id, \ |
Line 275... | Line 275... | ||
275 | } |
275 | } |
276 | } |
276 | } |
277 | } |
277 | } |
278 | } |
278 | } |
Line 279... | Line 279... | ||
279 | 279 | ||
280 | static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) |
280 | void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) |
281 | { |
281 | { |
Line 282... | Line 282... | ||
282 | int count; |
282 | int count; |
283 | 283 | ||
Line 291... | Line 291... | ||
291 | count = 0; |
291 | count = 0; |
292 | while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0) |
292 | while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0) |
293 | udelay(10); |
293 | udelay(10); |
294 | } |
294 | } |
Line -... | Line 295... | ||
- | 295 | ||
- | 296 | void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv) |
|
- | 297 | { |
|
- | 298 | int count; |
|
- | 299 | ||
- | 300 | count = 0; |
|
- | 301 | while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1)) |
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- | 302 | udelay(10); |
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- | 303 | ||
- | 304 | I915_WRITE_NOTRACE(FORCEWAKE_MT, (1<<16) | 1); |
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- | 305 | POSTING_READ(FORCEWAKE_MT); |
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- | 306 | ||
- | 307 | count = 0; |
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- | 308 | while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1) == 0) |
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- | 309 | udelay(10); |
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- | 310 | } |
|
295 | 311 | ||
296 | /* |
312 | /* |
297 | * Generally this is called implicitly by the register read function. However, |
313 | * Generally this is called implicitly by the register read function. However, |
298 | * if some sequence requires the GT to not power down then this function should |
314 | * if some sequence requires the GT to not power down then this function should |
299 | * be called at the beginning of the sequence followed by a call to |
315 | * be called at the beginning of the sequence followed by a call to |
300 | * gen6_gt_force_wake_put() at the end of the sequence. |
316 | * gen6_gt_force_wake_put() at the end of the sequence. |
301 | */ |
317 | */ |
302 | void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) |
318 | void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) |
303 | { |
319 | { |
Line 304... | Line 320... | ||
304 | // WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex)); |
320 | unsigned long irqflags; |
305 | 321 | ||
306 | /* Forcewake is atomic in case we get in here without the lock */ |
322 | spin_lock_irqsave(&dev_priv->gt_lock, irqflags); |
- | 323 | if (dev_priv->forcewake_count++ == 0) |
|
307 | if (atomic_add_return(1, &dev_priv->forcewake_count) == 1) |
324 | dev_priv->display.force_wake_get(dev_priv); |
Line 308... | Line 325... | ||
308 | __gen6_gt_force_wake_get(dev_priv); |
325 | spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); |
309 | } |
326 | } |
310 | 327 | ||
311 | static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) |
328 | void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) |
312 | { |
329 | { |
Line -... | Line 330... | ||
- | 330 | I915_WRITE_NOTRACE(FORCEWAKE, 0); |
|
- | 331 | POSTING_READ(FORCEWAKE); |
|
- | 332 | } |
|
- | 333 | ||
- | 334 | void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv) |
|
- | 335 | { |
|
313 | I915_WRITE_NOTRACE(FORCEWAKE, 0); |
336 | I915_WRITE_NOTRACE(FORCEWAKE_MT, (1<<16) | 0); |
314 | POSTING_READ(FORCEWAKE); |
337 | POSTING_READ(FORCEWAKE_MT); |
315 | } |
338 | } |
316 | 339 | ||
317 | /* |
340 | /* |
318 | * see gen6_gt_force_wake_get() |
341 | * see gen6_gt_force_wake_get() |
Line -... | Line 342... | ||
- | 342 | */ |
|
319 | */ |
343 | void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) |
320 | void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) |
344 | { |
- | 345 | unsigned long irqflags; |
|
321 | { |
346 | |
Line 322... | Line 347... | ||
322 | // WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex)); |
347 | spin_lock_irqsave(&dev_priv->gt_lock, irqflags); |
323 | 348 | if (--dev_priv->forcewake_count == 0) |
|
324 | if (atomic_dec_and_test(&dev_priv->forcewake_count)) |
349 | dev_priv->display.force_wake_put(dev_priv); |
Line 439... | Line 464... | ||
439 | 464 | ||
440 | return ret; |
465 | return ret; |
Line -... | Line 466... | ||
- | 466 | } |
|
- | 467 | ||
- | 468 | ||
- | 469 | #define __i915_read(x, y) \ |
|
- | 470 | u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \ |
|
- | 471 | u##x val = 0; \ |
|
- | 472 | if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \ |
|
- | 473 | unsigned long irqflags; \ |
|
- | 474 | spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \ |
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- | 475 | if (dev_priv->forcewake_count == 0) \ |
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- | 476 | dev_priv->display.force_wake_get(dev_priv); \ |
|
- | 477 | val = read##y(dev_priv->regs + reg); \ |
|
- | 478 | if (dev_priv->forcewake_count == 0) \ |
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- | 479 | dev_priv->display.force_wake_put(dev_priv); \ |
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- | 480 | spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); \ |
|
- | 481 | } else { \ |
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- | 482 | val = read##y(dev_priv->regs + reg); \ |
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- | 483 | } \ |
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- | 484 | return val; \ |
|
- | 485 | } |
|
- | 486 | ||
- | 487 | __i915_read(8, b) |
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- | 488 | __i915_read(16, w) |
|
- | 489 | __i915_read(32, l) |
|
- | 490 | __i915_read(64, q) |
|
- | 491 | #undef __i915_read |
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- | 492 | ||
- | 493 | #define __i915_write(x, y) \ |
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- | 494 | void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \ |
|
- | 495 | if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \ |
|
- | 496 | __gen6_gt_wait_for_fifo(dev_priv); \ |
|
- | 497 | } \ |
|
- | 498 | write##y(val, dev_priv->regs + reg); \ |
|
- | 499 | } |
|
- | 500 | __i915_write(8, b) |
|
- | 501 | __i915_write(16, w) |