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| Rev 6660 | Rev 6937 | ||
|---|---|---|---|
| Line 26... | Line 26... | ||
| 26 | * |
26 | * |
| 27 | */ |
27 | */ |
| Line 28... | Line 28... | ||
| 28 | 28 | ||
| Line 29... | Line -... | ||
| 29 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
- | |
| 30 | 29 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
|
| 31 | #include |
30 | |
| 32 | #include |
31 | #include |
| 33 | #include |
32 | #include |
| 34 | #include |
33 | #include |
| Line 42... | Line 41... | ||
| 42 | #include |
41 | #include |
| 43 | #include |
42 | #include |
| 44 | //#include |
43 | //#include |
| 45 | //#include |
44 | //#include |
| 46 | #include |
45 | #include |
| - | 46 | //#include |
|
| 47 | #include |
47 | #include |
| 48 | #include |
48 | #include |
| Line 49... | Line 49... | ||
| 49 | 49 | ||
| Line 128... | Line 128... | ||
| 128 | break; |
128 | break; |
| 129 | case I915_PARAM_HAS_PRIME_VMAP_FLUSH: |
129 | case I915_PARAM_HAS_PRIME_VMAP_FLUSH: |
| 130 | value = 1; |
130 | value = 1; |
| 131 | break; |
131 | break; |
| 132 | case I915_PARAM_HAS_SECURE_BATCHES: |
132 | case I915_PARAM_HAS_SECURE_BATCHES: |
| 133 | value = 1; |
133 | value = capable(CAP_SYS_ADMIN); |
| 134 | break; |
134 | break; |
| 135 | case I915_PARAM_HAS_PINNED_BATCHES: |
135 | case I915_PARAM_HAS_PINNED_BATCHES: |
| 136 | value = 1; |
136 | value = 1; |
| 137 | break; |
137 | break; |
| 138 | case I915_PARAM_HAS_EXEC_NO_RELOC: |
138 | case I915_PARAM_HAS_EXEC_NO_RELOC: |
| Line 204... | Line 204... | ||
| 204 | struct drm_i915_private *dev_priv = dev->dev_private; |
204 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 205 | int mchbar_reg = INTEL_INFO(dev)->gen >= 4 ? MCHBAR_I965 : MCHBAR_I915; |
205 | int mchbar_reg = INTEL_INFO(dev)->gen >= 4 ? MCHBAR_I965 : MCHBAR_I915; |
| 206 | u32 temp; |
206 | u32 temp; |
| 207 | bool enabled; |
207 | bool enabled; |
| Line 208... | Line 208... | ||
| 208 | 208 | ||
| 209 | if (IS_VALLEYVIEW(dev)) |
209 | if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) |
| Line 210... | Line 210... | ||
| 210 | return; |
210 | return; |
| Line 211... | Line 211... | ||
| 211 | 211 | ||
| Line 284... | Line 284... | ||
| 284 | static int i915_load_modeset_init(struct drm_device *dev) |
284 | static int i915_load_modeset_init(struct drm_device *dev) |
| 285 | { |
285 | { |
| 286 | struct drm_i915_private *dev_priv = dev->dev_private; |
286 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 287 | int ret; |
287 | int ret; |
| Line 288... | Line 288... | ||
| 288 | 288 | ||
| 289 | ret = intel_parse_bios(dev); |
289 | ret = intel_bios_init(dev_priv); |
| 290 | if (ret) |
290 | if (ret) |
| Line 291... | Line 291... | ||
| 291 | DRM_INFO("failed to find VBIOS tables\n"); |
291 | DRM_INFO("failed to find VBIOS tables\n"); |
| 292 | 292 | ||
| Line 303... | Line 303... | ||
| 303 | */ |
303 | */ |
| 304 | ret = i915_gem_init_stolen(dev); |
304 | ret = i915_gem_init_stolen(dev); |
| 305 | if (ret) |
305 | if (ret) |
| 306 | goto cleanup_vga_switcheroo; |
306 | goto cleanup_vga_switcheroo; |
| Line 307... | Line 307... | ||
| 307 | 307 | ||
| - | 308 | intel_power_domains_init_hw(dev_priv, false); |
|
| - | 309 | ||
| Line 308... | Line 310... | ||
| 308 | intel_power_domains_init_hw(dev_priv); |
310 | intel_csr_ucode_init(dev_priv); |
| 309 | 311 | ||
| 310 | ret = intel_irq_install(dev_priv); |
312 | ret = intel_irq_install(dev_priv); |
| Line 315... | Line 317... | ||
| 315 | 317 | ||
| 316 | /* Important: The output setup functions called by modeset_init need |
318 | /* Important: The output setup functions called by modeset_init need |
| 317 | * working irqs for e.g. gmbus and dp aux transfers. */ |
319 | * working irqs for e.g. gmbus and dp aux transfers. */ |
| Line -... | Line 320... | ||
| - | 320 | intel_modeset_init(dev); |
|
| - | 321 | ||
| 318 | intel_modeset_init(dev); |
322 | intel_guc_ucode_init(dev); |
| 319 | 323 | ||
| 320 | ret = i915_gem_init(dev); |
324 | ret = i915_gem_init(dev); |
| Line 321... | Line 325... | ||
| 321 | if (ret) |
325 | if (ret) |
| Line 356... | Line 360... | ||
| 356 | mutex_lock(&dev->struct_mutex); |
360 | mutex_lock(&dev->struct_mutex); |
| 357 | i915_gem_cleanup_ringbuffer(dev); |
361 | i915_gem_cleanup_ringbuffer(dev); |
| 358 | i915_gem_context_fini(dev); |
362 | i915_gem_context_fini(dev); |
| 359 | mutex_unlock(&dev->struct_mutex); |
363 | mutex_unlock(&dev->struct_mutex); |
| 360 | cleanup_irq: |
364 | cleanup_irq: |
| - | 365 | intel_guc_ucode_fini(dev); |
|
| 361 | // drm_irq_uninstall(dev); |
366 | // drm_irq_uninstall(dev); |
| 362 | cleanup_gem_stolen: |
367 | cleanup_gem_stolen: |
| 363 | i915_gem_cleanup_stolen(dev); |
368 | i915_gem_cleanup_stolen(dev); |
| 364 | cleanup_vga_switcheroo: |
369 | cleanup_vga_switcheroo: |
| 365 | // vga_switcheroo_unregister_client(dev->pdev); |
370 | // vga_switcheroo_unregister_client(dev->pdev); |
| Line 569... | Line 574... | ||
| 569 | * more than one EU pair per subslice. BXT supports subslice |
574 | * more than one EU pair per subslice. BXT supports subslice |
| 570 | * power gating on devices with more than one subslice, and |
575 | * power gating on devices with more than one subslice, and |
| 571 | * supports EU power gating on devices with more than one EU |
576 | * supports EU power gating on devices with more than one EU |
| 572 | * pair per subslice. |
577 | * pair per subslice. |
| 573 | */ |
578 | */ |
| 574 | info->has_slice_pg = (IS_SKYLAKE(dev) && (info->slice_total > 1)); |
579 | info->has_slice_pg = ((IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) && |
| - | 580 | (info->slice_total > 1)); |
|
| 575 | info->has_subslice_pg = (IS_BROXTON(dev) && (info->subslice_total > 1)); |
581 | info->has_subslice_pg = (IS_BROXTON(dev) && (info->subslice_total > 1)); |
| 576 | info->has_eu_pg = (info->eu_per_subslice > 2); |
582 | info->has_eu_pg = (info->eu_per_subslice > 2); |
| 577 | } |
583 | } |
| Line 578... | Line 584... | ||
| 578 | 584 | ||
| Line 683... | Line 689... | ||
| 683 | */ |
689 | */ |
| 684 | if (IS_BROXTON(dev)) { |
690 | if (IS_BROXTON(dev)) { |
| 685 | info->num_sprites[PIPE_A] = 2; |
691 | info->num_sprites[PIPE_A] = 2; |
| 686 | info->num_sprites[PIPE_B] = 2; |
692 | info->num_sprites[PIPE_B] = 2; |
| 687 | info->num_sprites[PIPE_C] = 1; |
693 | info->num_sprites[PIPE_C] = 1; |
| 688 | } else if (IS_VALLEYVIEW(dev)) |
694 | } else if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) |
| 689 | for_each_pipe(dev_priv, pipe) |
695 | for_each_pipe(dev_priv, pipe) |
| 690 | info->num_sprites[pipe] = 2; |
696 | info->num_sprites[pipe] = 2; |
| 691 | else |
697 | else |
| 692 | for_each_pipe(dev_priv, pipe) |
698 | for_each_pipe(dev_priv, pipe) |
| 693 | info->num_sprites[pipe] = 1; |
699 | info->num_sprites[pipe] = 1; |
| Line 695... | Line 701... | ||
| 695 | if (i915.disable_display) { |
701 | if (i915.disable_display) { |
| 696 | DRM_INFO("Display disabled (module parameter)\n"); |
702 | DRM_INFO("Display disabled (module parameter)\n"); |
| 697 | info->num_pipes = 0; |
703 | info->num_pipes = 0; |
| 698 | } else if (info->num_pipes > 0 && |
704 | } else if (info->num_pipes > 0 && |
| 699 | (INTEL_INFO(dev)->gen == 7 || INTEL_INFO(dev)->gen == 8) && |
705 | (INTEL_INFO(dev)->gen == 7 || INTEL_INFO(dev)->gen == 8) && |
| 700 | !IS_VALLEYVIEW(dev)) { |
706 | HAS_PCH_SPLIT(dev)) { |
| 701 | u32 fuse_strap = I915_READ(FUSE_STRAP); |
707 | u32 fuse_strap = I915_READ(FUSE_STRAP); |
| 702 | u32 sfuse_strap = I915_READ(SFUSE_STRAP); |
708 | u32 sfuse_strap = I915_READ(SFUSE_STRAP); |
| Line 703... | Line 709... | ||
| 703 | 709 | ||
| 704 | /* |
710 | /* |
| Line 740... | Line 746... | ||
| 740 | info->has_eu_pg ? "y" : "n"); |
746 | info->has_eu_pg ? "y" : "n"); |
| 741 | } |
747 | } |
| Line 742... | Line 748... | ||
| 742 | 748 | ||
| 743 | static void intel_init_dpio(struct drm_i915_private *dev_priv) |
749 | static void intel_init_dpio(struct drm_i915_private *dev_priv) |
| 744 | { |
- | |
| 745 | if (!IS_VALLEYVIEW(dev_priv)) |
- | |
| 746 | return; |
- | |
| 747 | 750 | { |
|
| 748 | /* |
751 | /* |
| 749 | * IOSF_PORT_DPIO is used for VLV x2 PHY (DP/HDMI B and C), |
752 | * IOSF_PORT_DPIO is used for VLV x2 PHY (DP/HDMI B and C), |
| 750 | * CHV x1 PHY (DP/HDMI D) |
753 | * CHV x1 PHY (DP/HDMI D) |
| 751 | * IOSF_PORT_DPIO_2 is used for CHV x2 PHY (DP/HDMI B and C) |
754 | * IOSF_PORT_DPIO_2 is used for CHV x2 PHY (DP/HDMI B and C) |
| 752 | */ |
755 | */ |
| 753 | if (IS_CHERRYVIEW(dev_priv)) { |
756 | if (IS_CHERRYVIEW(dev_priv)) { |
| 754 | DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO_2; |
757 | DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO_2; |
| 755 | DPIO_PHY_IOSF_PORT(DPIO_PHY1) = IOSF_PORT_DPIO; |
758 | DPIO_PHY_IOSF_PORT(DPIO_PHY1) = IOSF_PORT_DPIO; |
| 756 | } else { |
759 | } else if (IS_VALLEYVIEW(dev_priv)) { |
| 757 | DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO; |
760 | DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO; |
| 758 | } |
761 | } |
| Line 759... | Line 762... | ||
| 759 | } |
762 | } |
| Line 796... | Line 799... | ||
| 796 | spin_lock_init(&dev_priv->uncore.lock); |
799 | spin_lock_init(&dev_priv->uncore.lock); |
| 797 | spin_lock_init(&dev_priv->mm.object_stat_lock); |
800 | spin_lock_init(&dev_priv->mm.object_stat_lock); |
| 798 | spin_lock_init(&dev_priv->mmio_flip_lock); |
801 | spin_lock_init(&dev_priv->mmio_flip_lock); |
| 799 | mutex_init(&dev_priv->sb_lock); |
802 | mutex_init(&dev_priv->sb_lock); |
| 800 | mutex_init(&dev_priv->modeset_restore_lock); |
803 | mutex_init(&dev_priv->modeset_restore_lock); |
| 801 | mutex_init(&dev_priv->csr_lock); |
- | |
| 802 | mutex_init(&dev_priv->av_mutex); |
804 | mutex_init(&dev_priv->av_mutex); |
| Line 803... | Line 805... | ||
| 803 | 805 | ||
| Line -... | Line 806... | ||
| - | 806 | intel_pm_setup(dev); |
|
| - | 807 | ||
| 804 | intel_pm_setup(dev); |
808 | intel_runtime_pm_get(dev_priv); |
| Line 805... | Line 809... | ||
| 805 | 809 | ||
| Line 806... | Line 810... | ||
| 806 | intel_display_crc_init(dev); |
810 | intel_display_crc_init(dev); |
| Line 845... | Line 849... | ||
| 845 | /* This must be called before any calls to HAS_PCH_* */ |
849 | /* This must be called before any calls to HAS_PCH_* */ |
| 846 | intel_detect_pch(dev); |
850 | intel_detect_pch(dev); |
| Line 847... | Line 851... | ||
| 847 | 851 | ||
| Line 848... | Line -... | ||
| 848 | intel_uncore_init(dev); |
- | |
| 849 | - | ||
| 850 | /* Load CSR Firmware for SKL */ |
- | |
| 851 | intel_csr_ucode_init(dev); |
852 | intel_uncore_init(dev); |
| 852 | 853 | ||
| 853 | ret = i915_gem_gtt_init(dev); |
854 | ret = i915_gem_gtt_init(dev); |
| Line 854... | Line 855... | ||
| 854 | if (ret) |
855 | if (ret) |
| Line 996... | Line 997... | ||
| 996 | int i915_driver_unload(struct drm_device *dev) |
997 | int i915_driver_unload(struct drm_device *dev) |
| 997 | { |
998 | { |
| 998 | struct drm_i915_private *dev_priv = dev->dev_private; |
999 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 999 | int ret; |
1000 | int ret; |
| Line -... | Line 1001... | ||
| - | 1001 | ||
| - | 1002 | intel_fbdev_fini(dev); |
|
| 1000 | 1003 | ||
| Line 1001... | Line 1004... | ||
| 1001 | i915_audio_component_cleanup(dev_priv); |
1004 | i915_audio_component_cleanup(dev_priv); |
| 1002 | 1005 | ||
| 1003 | ret = i915_gem_suspend(dev); |
1006 | ret = i915_gem_suspend(dev); |
| Line 1018... | Line 1021... | ||
| 1018 | io_mapping_free(dev_priv->gtt.mappable); |
1021 | io_mapping_free(dev_priv->gtt.mappable); |
| 1019 | arch_phys_wc_del(dev_priv->gtt.mtrr); |
1022 | arch_phys_wc_del(dev_priv->gtt.mtrr); |
| Line 1020... | Line 1023... | ||
| 1020 | 1023 | ||
| Line 1021... | Line -... | ||
| 1021 | acpi_video_unregister(); |
- | |
| 1022 | - | ||
| 1023 | intel_fbdev_fini(dev); |
1024 | acpi_video_unregister(); |
| Line 1024... | Line 1025... | ||
| 1024 | 1025 | ||
| Line 1025... | Line 1026... | ||
| 1025 | drm_vblank_cleanup(dev); |
1026 | drm_vblank_cleanup(dev); |
| Line 1061... | Line 1062... | ||
| 1061 | i915_gem_context_fini(dev); |
1062 | i915_gem_context_fini(dev); |
| 1062 | mutex_unlock(&dev->struct_mutex); |
1063 | mutex_unlock(&dev->struct_mutex); |
| 1063 | intel_fbc_cleanup_cfb(dev_priv); |
1064 | intel_fbc_cleanup_cfb(dev_priv); |
| 1064 | i915_gem_cleanup_stolen(dev); |
1065 | i915_gem_cleanup_stolen(dev); |
| Line 1065... | Line 1066... | ||
| 1065 | 1066 | ||
| Line 1066... | Line 1067... | ||
| 1066 | intel_csr_ucode_fini(dev); |
1067 | intel_csr_ucode_fini(dev_priv); |
| Line 1067... | Line 1068... | ||
| 1067 | 1068 | ||
| 1068 | intel_teardown_mchbar(dev); |
1069 | intel_teardown_mchbar(dev); |
| Line 1130... | Line 1131... | ||
| 1130 | 1131 | ||
| 1131 | void i915_driver_postclose(struct drm_device *dev, struct drm_file *file) |
1132 | void i915_driver_postclose(struct drm_device *dev, struct drm_file *file) |
| 1132 | { |
1133 | { |
| Line 1133... | Line -... | ||
| 1133 | struct drm_i915_file_private *file_priv = file->driver_priv; |
- | |
| 1134 | - | ||
| 1135 | if (file_priv && file_priv->bsd_ring) |
1134 | struct drm_i915_file_private *file_priv = file->driver_priv; |
| 1136 | file_priv->bsd_ring = NULL; |
1135 | |
| Line 1137... | Line 1136... | ||
| 1137 | kfree(file_priv); |
1136 | kfree(file_priv); |
| 1138 | } |
1137 | } |