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Line 26... | Line 26... | ||
26 | * |
26 | * |
27 | */ |
27 | */ |
Line 28... | Line 28... | ||
28 | 28 | ||
Line -... | Line 29... | ||
- | 29 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
|
29 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
30 | |
30 | 31 | #include |
|
31 | #include |
32 | #include |
- | 33 | #include |
|
32 | #include |
34 | #include |
33 | #include |
35 | #include |
34 | #include "intel_drv.h" |
36 | #include "intel_drv.h" |
35 | #include |
37 | #include |
36 | #include "i915_drv.h" |
38 | #include "i915_drv.h" |
37 | #include "i915_trace.h" |
39 | #include "i915_trace.h" |
38 | #include |
40 | #include |
39 | //#include |
41 | #include |
40 | //#include |
42 | //#include |
41 | //#include |
43 | //#include |
42 | //#include |
44 | //#include |
Line 43... | Line 45... | ||
43 | #include |
45 | #include |
Line 44... | Line -... | ||
44 | //#include |
- | |
45 | - | ||
46 | void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen); |
- | |
47 | - | ||
48 | #define LP_RING(d) (&((struct drm_i915_private *)(d))->ring[RCS]) |
- | |
49 | - | ||
50 | #define BEGIN_LP_RING(n) \ |
- | |
51 | intel_ring_begin(LP_RING(dev_priv), (n)) |
- | |
52 | - | ||
53 | #define OUT_RING(x) \ |
- | |
54 | intel_ring_emit(LP_RING(dev_priv), x) |
- | |
55 | - | ||
56 | #define ADVANCE_LP_RING() \ |
- | |
57 | __intel_ring_advance(LP_RING(dev_priv)) |
- | |
58 | - | ||
59 | /** |
- | |
60 | * Lock test for when it's just for synchronization of ring access. |
- | |
61 | * |
- | |
62 | * In that case, we don't need to do it when GEM is initialized as nobody else |
- | |
63 | * has access to the ring. |
- | |
64 | */ |
- | |
65 | #define RING_LOCK_TEST_WITH_RETURN(dev, file) do { \ |
- | |
66 | if (LP_RING(dev->dev_private)->buffer->obj == NULL) \ |
- | |
67 | LOCK_TEST_WITH_RETURN(dev, file); \ |
- | |
68 | } while (0) |
- | |
69 | - | ||
70 | static inline u32 |
- | |
71 | intel_read_legacy_status_page(struct drm_i915_private *dev_priv, int reg) |
- | |
72 | { |
- | |
73 | if (I915_NEED_GFX_HWS(dev_priv->dev)) |
- | |
74 | return ioread32(dev_priv->dri1.gfx_hws_cpu_addr + reg); |
- | |
75 | else |
- | |
76 | return intel_read_status_page(LP_RING(dev_priv), reg); |
- | |
77 | } |
- | |
78 | - | ||
79 | #define READ_HWSP(dev_priv, reg) intel_read_legacy_status_page(dev_priv, reg) |
- | |
80 | #define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX) |
- | |
81 | #define I915_BREADCRUMB_INDEX 0x21 |
- | |
82 | - | ||
83 | void i915_update_dri1_breadcrumb(struct drm_device *dev) |
- | |
84 | { |
- | |
85 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
86 | struct drm_i915_master_private *master_priv; |
- | |
87 | - | ||
88 | /* |
- | |
89 | * The dri breadcrumb update races against the drm master disappearing. |
- | |
90 | * Instead of trying to fix this (this is by far not the only ums issue) |
- | |
91 | * just don't do the update in kms mode. |
- | |
92 | */ |
- | |
93 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
- | |
94 | return; |
- | |
95 | - | ||
96 | if (dev->primary->master) { |
- | |
97 | master_priv = dev->primary->master->driver_priv; |
- | |
98 | if (master_priv->sarea_priv) |
- | |
99 | master_priv->sarea_priv->last_dispatch = |
- | |
100 | READ_BREADCRUMB(dev_priv); |
- | |
101 | } |
- | |
102 | } |
- | |
103 | - | ||
104 | static void i915_write_hws_pga(struct drm_device *dev) |
- | |
105 | { |
- | |
106 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
107 | u32 addr; |
- | |
108 | - | ||
109 | addr = dev_priv->status_page_dmah->busaddr; |
- | |
110 | if (INTEL_INFO(dev)->gen >= 4) |
- | |
111 | addr |= (dev_priv->status_page_dmah->busaddr >> 28) & 0xf0; |
- | |
112 | I915_WRITE(HWS_PGA, addr); |
- | |
113 | } |
- | |
114 | - | ||
115 | /** |
- | |
116 | * Frees the hardware status page, whether it's a physical address or a virtual |
- | |
117 | * address set up by the X Server. |
- | |
118 | */ |
- | |
119 | static void i915_free_hws(struct drm_device *dev) |
- | |
120 | { |
- | |
121 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
122 | struct intel_engine_cs *ring = LP_RING(dev_priv); |
- | |
123 | - | ||
124 | if (dev_priv->status_page_dmah) { |
- | |
125 | drm_pci_free(dev, dev_priv->status_page_dmah); |
- | |
126 | dev_priv->status_page_dmah = NULL; |
- | |
127 | } |
- | |
128 | - | ||
129 | if (ring->status_page.gfx_addr) { |
- | |
130 | ring->status_page.gfx_addr = 0; |
- | |
131 | iounmap(dev_priv->dri1.gfx_hws_cpu_addr); |
- | |
132 | } |
- | |
133 | - | ||
134 | /* Need to rewrite hardware status page */ |
- | |
135 | I915_WRITE(HWS_PGA, 0x1ffff000); |
- | |
136 | } |
- | |
137 | - | ||
138 | #if 0 |
- | |
139 | - | ||
140 | void i915_kernel_lost_context(struct drm_device * dev) |
- | |
141 | { |
- | |
142 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
143 | struct drm_i915_master_private *master_priv; |
- | |
144 | struct intel_engine_cs *ring = LP_RING(dev_priv); |
- | |
145 | struct intel_ringbuffer *ringbuf = ring->buffer; |
- | |
146 | - | ||
147 | /* |
- | |
148 | * We should never lose context on the ring with modesetting |
- | |
149 | * as we don't expose it to userspace |
- | |
150 | */ |
- | |
151 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
- | |
152 | return; |
- | |
153 | - | ||
154 | ringbuf->head = I915_READ_HEAD(ring) & HEAD_ADDR; |
- | |
155 | ringbuf->tail = I915_READ_TAIL(ring) & TAIL_ADDR; |
- | |
156 | ringbuf->space = ringbuf->head - (ringbuf->tail + I915_RING_FREE_SPACE); |
- | |
157 | if (ringbuf->space < 0) |
- | |
158 | ringbuf->space += ringbuf->size; |
- | |
159 | - | ||
160 | if (!dev->primary->master) |
- | |
161 | return; |
- | |
162 | - | ||
163 | master_priv = dev->primary->master->driver_priv; |
- | |
164 | if (ringbuf->head == ringbuf->tail && master_priv->sarea_priv) |
- | |
165 | master_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY; |
- | |
166 | } |
- | |
167 | - | ||
168 | static int i915_dma_cleanup(struct drm_device *dev) |
- | |
169 | { |
- | |
170 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
171 | int i; |
- | |
172 | - | ||
173 | /* Make sure interrupts are disabled here because the uninstall ioctl |
- | |
174 | * may not have been called from userspace and after dev_private |
- | |
175 | * is freed, it's too late. |
- | |
176 | */ |
- | |
177 | if (dev->irq_enabled) |
- | |
178 | drm_irq_uninstall(dev); |
- | |
179 | - | ||
180 | mutex_lock(&dev->struct_mutex); |
- | |
181 | for (i = 0; i < I915_NUM_RINGS; i++) |
- | |
182 | intel_cleanup_ring_buffer(&dev_priv->ring[i]); |
- | |
183 | mutex_unlock(&dev->struct_mutex); |
- | |
184 | - | ||
185 | /* Clear the HWS virtual address at teardown */ |
- | |
186 | if (I915_NEED_GFX_HWS(dev)) |
- | |
187 | i915_free_hws(dev); |
- | |
188 | - | ||
189 | return 0; |
- | |
190 | } |
- | |
191 | - | ||
192 | static int i915_initialize(struct drm_device *dev, drm_i915_init_t *init) |
- | |
193 | { |
- | |
194 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
195 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
- | |
196 | int ret; |
- | |
197 | - | ||
198 | master_priv->sarea = drm_getsarea(dev); |
- | |
199 | if (master_priv->sarea) { |
- | |
200 | master_priv->sarea_priv = (drm_i915_sarea_t *) |
- | |
201 | ((u8 *)master_priv->sarea->handle + init->sarea_priv_offset); |
- | |
202 | } else { |
- | |
203 | DRM_DEBUG_DRIVER("sarea not found assuming DRI2 userspace\n"); |
- | |
204 | } |
- | |
205 | - | ||
206 | if (init->ring_size != 0) { |
- | |
207 | if (LP_RING(dev_priv)->buffer->obj != NULL) { |
- | |
208 | i915_dma_cleanup(dev); |
- | |
209 | DRM_ERROR("Client tried to initialize ringbuffer in " |
- | |
210 | "GEM mode\n"); |
- | |
211 | return -EINVAL; |
- | |
212 | } |
- | |
213 | - | ||
214 | ret = intel_render_ring_init_dri(dev, |
- | |
215 | init->ring_start, |
- | |
216 | init->ring_size); |
- | |
217 | if (ret) { |
- | |
218 | i915_dma_cleanup(dev); |
- | |
219 | return ret; |
- | |
220 | } |
- | |
221 | } |
- | |
222 | - | ||
223 | dev_priv->dri1.cpp = init->cpp; |
- | |
224 | dev_priv->dri1.back_offset = init->back_offset; |
- | |
225 | dev_priv->dri1.front_offset = init->front_offset; |
- | |
226 | dev_priv->dri1.current_page = 0; |
- | |
227 | if (master_priv->sarea_priv) |
- | |
228 | master_priv->sarea_priv->pf_current_page = 0; |
- | |
229 | - | ||
230 | /* Allow hardware batchbuffers unless told otherwise. |
- | |
231 | */ |
- | |
232 | dev_priv->dri1.allow_batchbuffer = 1; |
- | |
233 | - | ||
234 | return 0; |
- | |
235 | } |
- | |
236 | - | ||
237 | static int i915_dma_resume(struct drm_device *dev) |
- | |
238 | { |
- | |
239 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
240 | struct intel_engine_cs *ring = LP_RING(dev_priv); |
- | |
241 | - | ||
242 | DRM_DEBUG_DRIVER("%s\n", __func__); |
- | |
243 | - | ||
244 | if (ring->buffer->virtual_start == NULL) { |
- | |
245 | DRM_ERROR("can not ioremap virtual address for" |
- | |
246 | " ring buffer\n"); |
- | |
247 | return -ENOMEM; |
- | |
248 | } |
- | |
249 | - | ||
250 | /* Program Hardware Status Page */ |
- | |
251 | if (!ring->status_page.page_addr) { |
- | |
252 | DRM_ERROR("Can not find hardware status page\n"); |
- | |
253 | return -EINVAL; |
- | |
254 | } |
- | |
255 | DRM_DEBUG_DRIVER("hw status page @ %p\n", |
- | |
256 | ring->status_page.page_addr); |
- | |
257 | if (ring->status_page.gfx_addr != 0) |
- | |
258 | intel_ring_setup_status_page(ring); |
- | |
259 | else |
- | |
260 | i915_write_hws_pga(dev); |
- | |
261 | - | ||
262 | DRM_DEBUG_DRIVER("Enabled hardware status page\n"); |
- | |
263 | - | ||
264 | return 0; |
- | |
265 | } |
- | |
266 | - | ||
267 | static int i915_dma_init(struct drm_device *dev, void *data, |
- | |
268 | struct drm_file *file_priv) |
- | |
269 | { |
- | |
270 | drm_i915_init_t *init = data; |
- | |
271 | int retcode = 0; |
- | |
272 | - | ||
273 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
- | |
274 | return -ENODEV; |
- | |
275 | - | ||
276 | switch (init->func) { |
- | |
277 | case I915_INIT_DMA: |
- | |
278 | retcode = i915_initialize(dev, init); |
- | |
279 | break; |
- | |
280 | case I915_CLEANUP_DMA: |
- | |
281 | retcode = i915_dma_cleanup(dev); |
- | |
282 | break; |
- | |
283 | case I915_RESUME_DMA: |
- | |
284 | retcode = i915_dma_resume(dev); |
- | |
285 | break; |
- | |
286 | default: |
- | |
287 | retcode = -EINVAL; |
- | |
288 | break; |
- | |
289 | } |
- | |
290 | - | ||
291 | return retcode; |
- | |
292 | } |
- | |
293 | - | ||
294 | /* Implement basically the same security restrictions as hardware does |
- | |
295 | * for MI_BATCH_NON_SECURE. These can be made stricter at any time. |
- | |
296 | * |
- | |
297 | * Most of the calculations below involve calculating the size of a |
- | |
298 | * particular instruction. It's important to get the size right as |
- | |
299 | * that tells us where the next instruction to check is. Any illegal |
- | |
300 | * instruction detected will be given a size of zero, which is a |
- | |
301 | * signal to abort the rest of the buffer. |
- | |
302 | */ |
- | |
303 | static int validate_cmd(int cmd) |
- | |
304 | { |
- | |
305 | switch (((cmd >> 29) & 0x7)) { |
- | |
306 | case 0x0: |
- | |
307 | switch ((cmd >> 23) & 0x3f) { |
- | |
308 | case 0x0: |
- | |
309 | return 1; /* MI_NOOP */ |
- | |
310 | case 0x4: |
- | |
311 | return 1; /* MI_FLUSH */ |
- | |
312 | default: |
- | |
313 | return 0; /* disallow everything else */ |
- | |
314 | } |
- | |
315 | break; |
- | |
316 | case 0x1: |
- | |
317 | return 0; /* reserved */ |
- | |
318 | case 0x2: |
- | |
319 | return (cmd & 0xff) + 2; /* 2d commands */ |
- | |
320 | case 0x3: |
- | |
321 | if (((cmd >> 24) & 0x1f) <= 0x18) |
- | |
322 | return 1; |
- | |
323 | - | ||
324 | switch ((cmd >> 24) & 0x1f) { |
- | |
325 | case 0x1c: |
- | |
326 | return 1; |
- | |
327 | case 0x1d: |
- | |
328 | switch ((cmd >> 16) & 0xff) { |
- | |
329 | case 0x3: |
- | |
330 | return (cmd & 0x1f) + 2; |
- | |
331 | case 0x4: |
- | |
332 | return (cmd & 0xf) + 2; |
- | |
333 | default: |
- | |
334 | return (cmd & 0xffff) + 2; |
- | |
335 | } |
- | |
336 | case 0x1e: |
- | |
337 | if (cmd & (1 << 23)) |
- | |
338 | return (cmd & 0xffff) + 1; |
- | |
339 | else |
- | |
340 | return 1; |
- | |
341 | case 0x1f: |
- | |
342 | if ((cmd & (1 << 23)) == 0) /* inline vertices */ |
- | |
343 | return (cmd & 0x1ffff) + 2; |
- | |
344 | else if (cmd & (1 << 17)) /* indirect random */ |
- | |
345 | if ((cmd & 0xffff) == 0) |
- | |
346 | return 0; /* unknown length, too hard */ |
- | |
347 | else |
- | |
348 | return (((cmd & 0xffff) + 1) / 2) + 1; |
- | |
349 | else |
- | |
350 | return 2; /* indirect sequential */ |
- | |
351 | default: |
- | |
352 | return 0; |
- | |
353 | } |
- | |
354 | default: |
- | |
355 | return 0; |
- | |
356 | } |
- | |
357 | - | ||
358 | return 0; |
- | |
359 | } |
- | |
360 | - | ||
361 | static int i915_emit_cmds(struct drm_device *dev, int *buffer, int dwords) |
- | |
362 | { |
- | |
363 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
364 | int i, ret; |
- | |
365 | - | ||
366 | if ((dwords+1) * sizeof(int) >= LP_RING(dev_priv)->buffer->size - 8) |
- | |
367 | return -EINVAL; |
- | |
368 | - | ||
369 | for (i = 0; i < dwords;) { |
- | |
370 | int sz = validate_cmd(buffer[i]); |
- | |
371 | - | ||
372 | if (sz == 0 || i + sz > dwords) |
- | |
373 | return -EINVAL; |
- | |
374 | i += sz; |
- | |
375 | } |
- | |
376 | - | ||
377 | ret = BEGIN_LP_RING((dwords+1)&~1); |
- | |
378 | if (ret) |
- | |
379 | return ret; |
- | |
380 | - | ||
381 | for (i = 0; i < dwords; i++) |
- | |
382 | OUT_RING(buffer[i]); |
- | |
383 | if (dwords & 1) |
- | |
384 | OUT_RING(0); |
- | |
385 | - | ||
386 | ADVANCE_LP_RING(); |
- | |
387 | - | ||
388 | return 0; |
- | |
389 | } |
- | |
390 | #endif |
- | |
391 | - | ||
392 | int |
- | |
393 | i915_emit_box(struct drm_device *dev, |
- | |
394 | struct drm_clip_rect *box, |
- | |
395 | int DR1, int DR4) |
- | |
396 | { |
- | |
397 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
398 | int ret; |
- | |
399 | - | ||
400 | if (box->y2 <= box->y1 || box->x2 <= box->x1 || |
- | |
401 | box->y2 <= 0 || box->x2 <= 0) { |
- | |
402 | DRM_ERROR("Bad box %d,%d..%d,%d\n", |
- | |
403 | box->x1, box->y1, box->x2, box->y2); |
- | |
404 | return -EINVAL; |
- | |
405 | } |
- | |
406 | - | ||
407 | if (INTEL_INFO(dev)->gen >= 4) { |
- | |
408 | ret = BEGIN_LP_RING(4); |
- | |
409 | if (ret) |
- | |
410 | return ret; |
- | |
411 | - | ||
412 | OUT_RING(GFX_OP_DRAWRECT_INFO_I965); |
- | |
413 | OUT_RING((box->x1 & 0xffff) | (box->y1 << 16)); |
- | |
414 | OUT_RING(((box->x2 - 1) & 0xffff) | ((box->y2 - 1) << 16)); |
- | |
415 | OUT_RING(DR4); |
- | |
416 | } else { |
- | |
417 | ret = BEGIN_LP_RING(6); |
- | |
418 | if (ret) |
- | |
419 | return ret; |
- | |
420 | - | ||
421 | OUT_RING(GFX_OP_DRAWRECT_INFO); |
- | |
422 | OUT_RING(DR1); |
- | |
423 | OUT_RING((box->x1 & 0xffff) | (box->y1 << 16)); |
- | |
424 | OUT_RING(((box->x2 - 1) & 0xffff) | ((box->y2 - 1) << 16)); |
- | |
425 | OUT_RING(DR4); |
- | |
426 | OUT_RING(0); |
- | |
427 | } |
- | |
428 | ADVANCE_LP_RING(); |
- | |
429 | - | ||
430 | return 0; |
- | |
431 | } |
- | |
432 | - | ||
433 | #if 0 |
- | |
434 | /* XXX: Emitting the counter should really be moved to part of the IRQ |
- | |
435 | * emit. For now, do it in both places: |
- | |
436 | */ |
- | |
437 | - | ||
438 | static void i915_emit_breadcrumb(struct drm_device *dev) |
- | |
439 | { |
- | |
440 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
441 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
- | |
442 | - | ||
443 | dev_priv->dri1.counter++; |
- | |
444 | if (dev_priv->dri1.counter > 0x7FFFFFFFUL) |
- | |
445 | dev_priv->dri1.counter = 0; |
- | |
446 | if (master_priv->sarea_priv) |
- | |
447 | master_priv->sarea_priv->last_enqueue = dev_priv->dri1.counter; |
- | |
448 | - | ||
449 | if (BEGIN_LP_RING(4) == 0) { |
- | |
450 | OUT_RING(MI_STORE_DWORD_INDEX); |
- | |
451 | OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT); |
- | |
452 | OUT_RING(dev_priv->dri1.counter); |
- | |
453 | OUT_RING(0); |
- | |
454 | ADVANCE_LP_RING(); |
- | |
455 | } |
- | |
456 | } |
- | |
457 | - | ||
458 | static int i915_dispatch_cmdbuffer(struct drm_device *dev, |
- | |
459 | drm_i915_cmdbuffer_t *cmd, |
- | |
460 | struct drm_clip_rect *cliprects, |
- | |
461 | void *cmdbuf) |
- | |
462 | { |
- | |
463 | int nbox = cmd->num_cliprects; |
- | |
464 | int i = 0, count, ret; |
- | |
465 | - | ||
466 | if (cmd->sz & 0x3) { |
- | |
467 | DRM_ERROR("alignment"); |
- | |
468 | return -EINVAL; |
- | |
469 | } |
- | |
470 | - | ||
471 | i915_kernel_lost_context(dev); |
- | |
472 | - | ||
473 | count = nbox ? nbox : 1; |
- | |
474 | - | ||
475 | for (i = 0; i < count; i++) { |
- | |
476 | if (i < nbox) { |
- | |
477 | ret = i915_emit_box(dev, &cliprects[i], |
- | |
478 | cmd->DR1, cmd->DR4); |
- | |
479 | if (ret) |
- | |
480 | return ret; |
- | |
481 | } |
- | |
482 | - | ||
483 | ret = i915_emit_cmds(dev, cmdbuf, cmd->sz / 4); |
- | |
484 | if (ret) |
- | |
485 | return ret; |
- | |
486 | } |
- | |
487 | - | ||
488 | i915_emit_breadcrumb(dev); |
- | |
489 | return 0; |
- | |
490 | } |
- | |
491 | - | ||
492 | static int i915_dispatch_batchbuffer(struct drm_device *dev, |
- | |
493 | drm_i915_batchbuffer_t *batch, |
- | |
494 | struct drm_clip_rect *cliprects) |
- | |
495 | { |
- | |
496 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
497 | int nbox = batch->num_cliprects; |
- | |
498 | int i, count, ret; |
- | |
499 | - | ||
500 | if ((batch->start | batch->used) & 0x7) { |
- | |
501 | DRM_ERROR("alignment"); |
- | |
502 | return -EINVAL; |
- | |
503 | } |
- | |
504 | - | ||
505 | i915_kernel_lost_context(dev); |
- | |
506 | - | ||
507 | count = nbox ? nbox : 1; |
- | |
508 | for (i = 0; i < count; i++) { |
- | |
509 | if (i < nbox) { |
- | |
510 | ret = i915_emit_box(dev, &cliprects[i], |
- | |
511 | batch->DR1, batch->DR4); |
- | |
512 | if (ret) |
- | |
513 | return ret; |
- | |
514 | } |
- | |
515 | - | ||
516 | if (!IS_I830(dev) && !IS_845G(dev)) { |
- | |
517 | ret = BEGIN_LP_RING(2); |
- | |
518 | if (ret) |
- | |
519 | return ret; |
- | |
520 | - | ||
521 | if (INTEL_INFO(dev)->gen >= 4) { |
- | |
522 | OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965); |
- | |
523 | OUT_RING(batch->start); |
- | |
524 | } else { |
- | |
525 | OUT_RING(MI_BATCH_BUFFER_START | (2 << 6)); |
- | |
526 | OUT_RING(batch->start | MI_BATCH_NON_SECURE); |
- | |
527 | } |
- | |
528 | } else { |
- | |
529 | ret = BEGIN_LP_RING(4); |
- | |
530 | if (ret) |
- | |
531 | return ret; |
- | |
532 | - | ||
533 | OUT_RING(MI_BATCH_BUFFER); |
- | |
534 | OUT_RING(batch->start | MI_BATCH_NON_SECURE); |
- | |
535 | OUT_RING(batch->start + batch->used - 4); |
- | |
536 | OUT_RING(0); |
- | |
537 | } |
- | |
538 | ADVANCE_LP_RING(); |
- | |
539 | } |
- | |
540 | - | ||
541 | - | ||
542 | if (IS_G4X(dev) || IS_GEN5(dev)) { |
- | |
543 | if (BEGIN_LP_RING(2) == 0) { |
- | |
544 | OUT_RING(MI_FLUSH | MI_NO_WRITE_FLUSH | MI_INVALIDATE_ISP); |
- | |
545 | OUT_RING(MI_NOOP); |
- | |
546 | ADVANCE_LP_RING(); |
- | |
547 | } |
- | |
548 | } |
- | |
549 | - | ||
550 | i915_emit_breadcrumb(dev); |
- | |
551 | return 0; |
- | |
552 | } |
- | |
553 | - | ||
554 | static int i915_dispatch_flip(struct drm_device *dev) |
- | |
555 | { |
- | |
556 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
557 | struct drm_i915_master_private *master_priv = |
- | |
558 | dev->primary->master->driver_priv; |
- | |
559 | int ret; |
- | |
560 | - | ||
561 | if (!master_priv->sarea_priv) |
- | |
562 | return -EINVAL; |
- | |
563 | - | ||
564 | DRM_DEBUG_DRIVER("%s: page=%d pfCurrentPage=%d\n", |
- | |
565 | __func__, |
- | |
566 | dev_priv->dri1.current_page, |
- | |
567 | master_priv->sarea_priv->pf_current_page); |
- | |
568 | - | ||
569 | i915_kernel_lost_context(dev); |
- | |
570 | - | ||
571 | ret = BEGIN_LP_RING(10); |
- | |
572 | if (ret) |
- | |
573 | return ret; |
- | |
574 | - | ||
575 | OUT_RING(MI_FLUSH | MI_READ_FLUSH); |
- | |
576 | OUT_RING(0); |
- | |
577 | - | ||
578 | OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP); |
- | |
579 | OUT_RING(0); |
- | |
580 | if (dev_priv->dri1.current_page == 0) { |
- | |
581 | OUT_RING(dev_priv->dri1.back_offset); |
- | |
582 | dev_priv->dri1.current_page = 1; |
- | |
583 | } else { |
- | |
584 | OUT_RING(dev_priv->dri1.front_offset); |
- | |
585 | dev_priv->dri1.current_page = 0; |
- | |
586 | } |
- | |
587 | OUT_RING(0); |
- | |
588 | - | ||
589 | OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP); |
- | |
590 | OUT_RING(0); |
- | |
591 | - | ||
592 | ADVANCE_LP_RING(); |
- | |
593 | - | ||
594 | master_priv->sarea_priv->last_enqueue = dev_priv->dri1.counter++; |
- | |
595 | - | ||
596 | if (BEGIN_LP_RING(4) == 0) { |
- | |
597 | OUT_RING(MI_STORE_DWORD_INDEX); |
- | |
598 | OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT); |
- | |
599 | OUT_RING(dev_priv->dri1.counter); |
- | |
600 | OUT_RING(0); |
- | |
601 | ADVANCE_LP_RING(); |
- | |
602 | } |
- | |
603 | - | ||
604 | master_priv->sarea_priv->pf_current_page = dev_priv->dri1.current_page; |
- | |
605 | return 0; |
- | |
606 | } |
- | |
607 | - | ||
608 | static int i915_quiescent(struct drm_device *dev) |
- | |
609 | { |
- | |
610 | i915_kernel_lost_context(dev); |
- | |
611 | return intel_ring_idle(LP_RING(dev->dev_private)); |
- | |
612 | } |
- | |
613 | - | ||
614 | static int i915_flush_ioctl(struct drm_device *dev, void *data, |
- | |
615 | struct drm_file *file_priv) |
- | |
616 | { |
- | |
617 | int ret; |
- | |
618 | - | ||
619 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
- | |
620 | return -ENODEV; |
- | |
621 | - | ||
622 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
- | |
623 | - | ||
624 | mutex_lock(&dev->struct_mutex); |
- | |
625 | ret = i915_quiescent(dev); |
- | |
626 | mutex_unlock(&dev->struct_mutex); |
- | |
627 | - | ||
628 | return ret; |
- | |
629 | } |
- | |
630 | - | ||
631 | static int i915_batchbuffer(struct drm_device *dev, void *data, |
- | |
632 | struct drm_file *file_priv) |
- | |
633 | { |
- | |
634 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
635 | struct drm_i915_master_private *master_priv; |
- | |
636 | drm_i915_sarea_t *sarea_priv; |
- | |
637 | drm_i915_batchbuffer_t *batch = data; |
- | |
638 | int ret; |
- | |
639 | struct drm_clip_rect *cliprects = NULL; |
- | |
640 | - | ||
641 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
- | |
642 | return -ENODEV; |
- | |
643 | - | ||
644 | master_priv = dev->primary->master->driver_priv; |
- | |
645 | sarea_priv = (drm_i915_sarea_t *) master_priv->sarea_priv; |
- | |
646 | - | ||
647 | if (!dev_priv->dri1.allow_batchbuffer) { |
- | |
648 | DRM_ERROR("Batchbuffer ioctl disabled\n"); |
- | |
649 | return -EINVAL; |
- | |
650 | } |
- | |
651 | - | ||
652 | DRM_DEBUG_DRIVER("i915 batchbuffer, start %x used %d cliprects %d\n", |
- | |
653 | batch->start, batch->used, batch->num_cliprects); |
- | |
654 | - | ||
655 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
- | |
656 | - | ||
657 | if (batch->num_cliprects < 0) |
- | |
658 | return -EINVAL; |
- | |
659 | - | ||
660 | if (batch->num_cliprects) { |
- | |
661 | cliprects = kcalloc(batch->num_cliprects, |
- | |
662 | sizeof(*cliprects), |
- | |
663 | GFP_KERNEL); |
- | |
664 | if (cliprects == NULL) |
- | |
665 | return -ENOMEM; |
- | |
666 | - | ||
667 | ret = copy_from_user(cliprects, batch->cliprects, |
- | |
668 | batch->num_cliprects * |
- | |
669 | sizeof(struct drm_clip_rect)); |
- | |
670 | if (ret != 0) { |
- | |
671 | ret = -EFAULT; |
- | |
672 | goto fail_free; |
- | |
673 | } |
- | |
674 | } |
- | |
675 | - | ||
676 | mutex_lock(&dev->struct_mutex); |
- | |
677 | ret = i915_dispatch_batchbuffer(dev, batch, cliprects); |
- | |
678 | mutex_unlock(&dev->struct_mutex); |
- | |
679 | - | ||
680 | if (sarea_priv) |
- | |
681 | sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); |
- | |
682 | - | ||
683 | fail_free: |
- | |
684 | kfree(cliprects); |
- | |
685 | - | ||
686 | return ret; |
- | |
687 | } |
- | |
688 | - | ||
689 | static int i915_cmdbuffer(struct drm_device *dev, void *data, |
- | |
690 | struct drm_file *file_priv) |
- | |
691 | { |
- | |
692 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
693 | struct drm_i915_master_private *master_priv; |
- | |
694 | drm_i915_sarea_t *sarea_priv; |
- | |
695 | drm_i915_cmdbuffer_t *cmdbuf = data; |
- | |
696 | struct drm_clip_rect *cliprects = NULL; |
- | |
697 | void *batch_data; |
- | |
698 | int ret; |
- | |
699 | - | ||
700 | DRM_DEBUG_DRIVER("i915 cmdbuffer, buf %p sz %d cliprects %d\n", |
- | |
701 | cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects); |
- | |
702 | - | ||
703 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
- | |
704 | return -ENODEV; |
- | |
705 | - | ||
706 | master_priv = dev->primary->master->driver_priv; |
- | |
707 | sarea_priv = (drm_i915_sarea_t *) master_priv->sarea_priv; |
- | |
708 | - | ||
709 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
- | |
710 | - | ||
711 | if (cmdbuf->num_cliprects < 0) |
- | |
712 | return -EINVAL; |
- | |
713 | - | ||
714 | batch_data = kmalloc(cmdbuf->sz, GFP_KERNEL); |
- | |
715 | if (batch_data == NULL) |
- | |
716 | return -ENOMEM; |
- | |
717 | - | ||
718 | ret = copy_from_user(batch_data, cmdbuf->buf, cmdbuf->sz); |
- | |
719 | if (ret != 0) { |
- | |
720 | ret = -EFAULT; |
- | |
721 | goto fail_batch_free; |
- | |
722 | } |
- | |
723 | - | ||
724 | if (cmdbuf->num_cliprects) { |
- | |
725 | cliprects = kcalloc(cmdbuf->num_cliprects, |
- | |
726 | sizeof(*cliprects), GFP_KERNEL); |
- | |
727 | if (cliprects == NULL) { |
- | |
728 | ret = -ENOMEM; |
- | |
729 | goto fail_batch_free; |
- | |
730 | } |
- | |
731 | - | ||
732 | ret = copy_from_user(cliprects, cmdbuf->cliprects, |
- | |
733 | cmdbuf->num_cliprects * |
- | |
734 | sizeof(struct drm_clip_rect)); |
- | |
735 | if (ret != 0) { |
- | |
736 | ret = -EFAULT; |
- | |
737 | goto fail_clip_free; |
- | |
738 | } |
- | |
739 | } |
- | |
740 | - | ||
741 | mutex_lock(&dev->struct_mutex); |
- | |
742 | ret = i915_dispatch_cmdbuffer(dev, cmdbuf, cliprects, batch_data); |
- | |
743 | mutex_unlock(&dev->struct_mutex); |
- | |
744 | if (ret) { |
- | |
745 | DRM_ERROR("i915_dispatch_cmdbuffer failed\n"); |
- | |
746 | goto fail_clip_free; |
- | |
747 | } |
- | |
748 | - | ||
749 | if (sarea_priv) |
- | |
750 | sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); |
- | |
751 | - | ||
752 | fail_clip_free: |
- | |
753 | kfree(cliprects); |
- | |
754 | fail_batch_free: |
- | |
755 | kfree(batch_data); |
- | |
756 | - | ||
757 | return ret; |
- | |
758 | } |
- | |
759 | - | ||
760 | static int i915_emit_irq(struct drm_device *dev) |
- | |
761 | { |
- | |
762 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
763 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
- | |
764 | - | ||
765 | i915_kernel_lost_context(dev); |
- | |
766 | - | ||
767 | DRM_DEBUG_DRIVER("\n"); |
- | |
768 | - | ||
769 | dev_priv->dri1.counter++; |
- | |
770 | if (dev_priv->dri1.counter > 0x7FFFFFFFUL) |
- | |
771 | dev_priv->dri1.counter = 1; |
- | |
772 | if (master_priv->sarea_priv) |
- | |
773 | master_priv->sarea_priv->last_enqueue = dev_priv->dri1.counter; |
- | |
774 | - | ||
775 | if (BEGIN_LP_RING(4) == 0) { |
- | |
776 | OUT_RING(MI_STORE_DWORD_INDEX); |
- | |
777 | OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT); |
- | |
778 | OUT_RING(dev_priv->dri1.counter); |
- | |
779 | OUT_RING(MI_USER_INTERRUPT); |
- | |
780 | ADVANCE_LP_RING(); |
- | |
781 | } |
- | |
782 | - | ||
783 | return dev_priv->dri1.counter; |
- | |
784 | } |
- | |
785 | - | ||
786 | static int i915_wait_irq(struct drm_device *dev, int irq_nr) |
- | |
787 | { |
- | |
788 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
789 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
- | |
790 | int ret = 0; |
- | |
791 | struct intel_engine_cs *ring = LP_RING(dev_priv); |
- | |
792 | - | ||
793 | DRM_DEBUG_DRIVER("irq_nr=%d breadcrumb=%d\n", irq_nr, |
- | |
794 | READ_BREADCRUMB(dev_priv)); |
- | |
795 | - | ||
796 | if (READ_BREADCRUMB(dev_priv) >= irq_nr) { |
- | |
797 | if (master_priv->sarea_priv) |
- | |
798 | master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); |
- | |
799 | return 0; |
- | |
800 | } |
- | |
801 | - | ||
802 | if (master_priv->sarea_priv) |
- | |
803 | master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; |
- | |
804 | - | ||
805 | if (ring->irq_get(ring)) { |
- | |
806 | DRM_WAIT_ON(ret, ring->irq_queue, 3 * HZ, |
- | |
807 | READ_BREADCRUMB(dev_priv) >= irq_nr); |
- | |
808 | ring->irq_put(ring); |
- | |
809 | } else if (wait_for(READ_BREADCRUMB(dev_priv) >= irq_nr, 3000)) |
- | |
810 | ret = -EBUSY; |
- | |
811 | - | ||
812 | if (ret == -EBUSY) { |
- | |
813 | DRM_ERROR("EBUSY -- rec: %d emitted: %d\n", |
- | |
814 | READ_BREADCRUMB(dev_priv), (int)dev_priv->dri1.counter); |
- | |
815 | } |
- | |
816 | - | ||
817 | return ret; |
- | |
818 | } |
- | |
819 | - | ||
820 | /* Needs the lock as it touches the ring. |
- | |
821 | */ |
- | |
822 | static int i915_irq_emit(struct drm_device *dev, void *data, |
- | |
823 | struct drm_file *file_priv) |
- | |
824 | { |
- | |
825 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
826 | drm_i915_irq_emit_t *emit = data; |
- | |
827 | int result; |
- | |
828 | - | ||
829 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
- | |
830 | return -ENODEV; |
- | |
831 | - | ||
832 | if (!dev_priv || !LP_RING(dev_priv)->buffer->virtual_start) { |
- | |
833 | DRM_ERROR("called with no initialization\n"); |
- | |
834 | return -EINVAL; |
- | |
835 | } |
- | |
836 | - | ||
837 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
- | |
838 | - | ||
839 | mutex_lock(&dev->struct_mutex); |
- | |
840 | result = i915_emit_irq(dev); |
- | |
841 | mutex_unlock(&dev->struct_mutex); |
- | |
842 | - | ||
843 | if (copy_to_user(emit->irq_seq, &result, sizeof(int))) { |
- | |
844 | DRM_ERROR("copy_to_user\n"); |
- | |
845 | return -EFAULT; |
- | |
846 | } |
- | |
847 | - | ||
848 | return 0; |
- | |
849 | } |
- | |
850 | - | ||
851 | /* Doesn't need the hardware lock. |
- | |
852 | */ |
- | |
853 | static int i915_irq_wait(struct drm_device *dev, void *data, |
- | |
854 | struct drm_file *file_priv) |
- | |
855 | { |
- | |
856 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
857 | drm_i915_irq_wait_t *irqwait = data; |
- | |
858 | - | ||
859 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
- | |
860 | return -ENODEV; |
- | |
861 | - | ||
862 | if (!dev_priv) { |
- | |
863 | DRM_ERROR("called with no initialization\n"); |
- | |
864 | return -EINVAL; |
- | |
865 | } |
- | |
866 | - | ||
867 | return i915_wait_irq(dev, irqwait->irq_seq); |
- | |
868 | } |
- | |
869 | - | ||
870 | static int i915_vblank_pipe_get(struct drm_device *dev, void *data, |
- | |
871 | struct drm_file *file_priv) |
- | |
872 | { |
- | |
873 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
874 | drm_i915_vblank_pipe_t *pipe = data; |
- | |
875 | - | ||
876 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
- | |
877 | return -ENODEV; |
- | |
878 | - | ||
879 | if (!dev_priv) { |
- | |
880 | DRM_ERROR("called with no initialization\n"); |
- | |
881 | return -EINVAL; |
- | |
882 | } |
- | |
883 | - | ||
884 | pipe->pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; |
- | |
885 | - | ||
886 | return 0; |
- | |
887 | } |
- | |
888 | - | ||
889 | /** |
- | |
890 | * Schedule buffer swap at given vertical blank. |
- | |
891 | */ |
- | |
892 | static int i915_vblank_swap(struct drm_device *dev, void *data, |
- | |
893 | struct drm_file *file_priv) |
- | |
894 | { |
- | |
895 | /* The delayed swap mechanism was fundamentally racy, and has been |
- | |
896 | * removed. The model was that the client requested a delayed flip/swap |
- | |
897 | * from the kernel, then waited for vblank before continuing to perform |
- | |
898 | * rendering. The problem was that the kernel might wake the client |
- | |
899 | * up before it dispatched the vblank swap (since the lock has to be |
- | |
900 | * held while touching the ringbuffer), in which case the client would |
- | |
901 | * clear and start the next frame before the swap occurred, and |
- | |
902 | * flicker would occur in addition to likely missing the vblank. |
- | |
903 | * |
- | |
904 | * In the absence of this ioctl, userland falls back to a correct path |
- | |
905 | * of waiting for a vblank, then dispatching the swap on its own. |
- | |
906 | * Context switching to userland and back is plenty fast enough for |
- | |
907 | * meeting the requirements of vblank swapping. |
- | |
908 | */ |
- | |
909 | return -EINVAL; |
- | |
910 | } |
- | |
911 | - | ||
912 | static int i915_flip_bufs(struct drm_device *dev, void *data, |
- | |
913 | struct drm_file *file_priv) |
- | |
914 | { |
- | |
915 | int ret; |
- | |
916 | - | ||
917 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
- | |
918 | return -ENODEV; |
- | |
919 | - | ||
920 | DRM_DEBUG_DRIVER("%s\n", __func__); |
- | |
921 | - | ||
922 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
- | |
923 | - | ||
924 | mutex_lock(&dev->struct_mutex); |
- | |
925 | ret = i915_dispatch_flip(dev); |
- | |
926 | mutex_unlock(&dev->struct_mutex); |
- | |
927 | - | ||
928 | return ret; |
46 | //#include |
929 | } |
47 | |
930 | #endif |
48 | void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen); |
931 | 49 | ||
932 | int i915_getparam(struct drm_device *dev, void *data, |
50 | int i915_getparam(struct drm_device *dev, void *data, |
933 | struct drm_file *file_priv) |
51 | struct drm_file *file_priv) |
Line 934... | Line -... | ||
934 | { |
- | |
935 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
936 | drm_i915_getparam_t *param = data; |
- | |
937 | int value; |
- | |
938 | - | ||
939 | if (!dev_priv) { |
52 | { |
940 | DRM_ERROR("called with no initialization\n"); |
53 | struct drm_i915_private *dev_priv = dev->dev_private; |
941 | return -EINVAL; |
- | |
942 | } |
- | |
943 | 54 | drm_i915_getparam_t *param = data; |
|
944 | switch (param->param) { |
- | |
945 | case I915_PARAM_IRQ_ACTIVE: |
- | |
946 | value = dev->pdev->irq ? 1 : 0; |
55 | int value; |
947 | break; |
56 | |
948 | case I915_PARAM_ALLOW_BATCHBUFFER: |
57 | switch (param->param) { |
949 | value = dev_priv->dri1.allow_batchbuffer ? 1 : 0; |
58 | case I915_PARAM_IRQ_ACTIVE: |
950 | break; |
59 | case I915_PARAM_ALLOW_BATCHBUFFER: |
951 | case I915_PARAM_LAST_DISPATCH: |
60 | case I915_PARAM_LAST_DISPATCH: |
952 | value = READ_BREADCRUMB(dev_priv); |
61 | /* Reject all old ums/dri params. */ |
953 | break; |
62 | return -ENODEV; |
Line 999... | Line 108... | ||
999 | break; |
108 | break; |
1000 | case I915_PARAM_HAS_WT: |
109 | case I915_PARAM_HAS_WT: |
1001 | value = HAS_WT(dev); |
110 | value = HAS_WT(dev); |
1002 | break; |
111 | break; |
1003 | case I915_PARAM_HAS_ALIASING_PPGTT: |
112 | case I915_PARAM_HAS_ALIASING_PPGTT: |
1004 | value = dev_priv->mm.aliasing_ppgtt || USES_FULL_PPGTT(dev); |
113 | value = USES_PPGTT(dev); |
1005 | break; |
114 | break; |
1006 | case I915_PARAM_HAS_WAIT_TIMEOUT: |
115 | case I915_PARAM_HAS_WAIT_TIMEOUT: |
1007 | value = 1; |
116 | value = 1; |
1008 | break; |
117 | break; |
1009 | case I915_PARAM_HAS_SEMAPHORES: |
118 | case I915_PARAM_HAS_SEMAPHORES: |
Line 1025... | Line 134... | ||
1025 | value = 1; |
134 | value = 1; |
1026 | break; |
135 | break; |
1027 | case I915_PARAM_CMD_PARSER_VERSION: |
136 | case I915_PARAM_CMD_PARSER_VERSION: |
1028 | value = i915_cmd_parser_get_version(); |
137 | value = i915_cmd_parser_get_version(); |
1029 | break; |
138 | break; |
- | 139 | case I915_PARAM_HAS_COHERENT_PHYS_GTT: |
|
- | 140 | value = 1; |
|
- | 141 | break; |
|
1030 | default: |
142 | default: |
1031 | DRM_DEBUG("Unknown parameter %d\n", param->param); |
143 | DRM_DEBUG("Unknown parameter %d\n", param->param); |
1032 | return -EINVAL; |
144 | return -EINVAL; |
1033 | } |
145 | } |
Line 1042... | Line 154... | ||
1042 | struct drm_file *file_priv) |
154 | struct drm_file *file_priv) |
1043 | { |
155 | { |
1044 | struct drm_i915_private *dev_priv = dev->dev_private; |
156 | struct drm_i915_private *dev_priv = dev->dev_private; |
1045 | drm_i915_setparam_t *param = data; |
157 | drm_i915_setparam_t *param = data; |
Line 1046... | Line -... | ||
1046 | - | ||
1047 | if (!dev_priv) { |
- | |
1048 | DRM_ERROR("called with no initialization\n"); |
- | |
1049 | return -EINVAL; |
- | |
1050 | } |
- | |
1051 | 158 | ||
1052 | switch (param->param) { |
159 | switch (param->param) { |
1053 | case I915_SETPARAM_USE_MI_BATCHBUFFER_START: |
- | |
1054 | break; |
160 | case I915_SETPARAM_USE_MI_BATCHBUFFER_START: |
1055 | case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY: |
- | |
1056 | break; |
161 | case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY: |
1057 | case I915_SETPARAM_ALLOW_BATCHBUFFER: |
162 | case I915_SETPARAM_ALLOW_BATCHBUFFER: |
1058 | dev_priv->dri1.allow_batchbuffer = param->value ? 1 : 0; |
163 | /* Reject all old ums/dri params. */ |
- | 164 | return -ENODEV; |
|
1059 | break; |
165 | |
1060 | case I915_SETPARAM_NUM_USED_FENCES: |
166 | case I915_SETPARAM_NUM_USED_FENCES: |
1061 | if (param->value > dev_priv->num_fence_regs || |
167 | if (param->value > dev_priv->num_fence_regs || |
1062 | param->value < 0) |
168 | param->value < 0) |
1063 | return -EINVAL; |
169 | return -EINVAL; |
Line 1072... | Line 178... | ||
1072 | 178 | ||
1073 | return 0; |
179 | return 0; |
1074 | } |
180 | } |
Line 1075... | Line -... | ||
1075 | #endif |
- | |
1076 | - | ||
1077 | 181 | #endif |
|
1078 | 182 | ||
1079 | static int i915_get_bridge_dev(struct drm_device *dev) |
183 | static int i915_get_bridge_dev(struct drm_device *dev) |
Line 1080... | Line 184... | ||
1080 | { |
184 | { |
Line 1180... | Line 284... | ||
1180 | if (ret) |
284 | if (ret) |
1181 | goto cleanup_vga_switcheroo; |
285 | goto cleanup_vga_switcheroo; |
Line 1182... | Line 286... | ||
1182 | 286 | ||
Line 1183... | Line -... | ||
1183 | intel_power_domains_init_hw(dev_priv); |
- | |
1184 | - | ||
1185 | /* |
- | |
1186 | * We enable some interrupt sources in our postinstall hooks, so mark |
- | |
1187 | * interrupts as enabled _before_ actually enabling them to avoid |
- | |
1188 | * special cases in our ordering checks. |
- | |
1189 | */ |
- | |
1190 | dev_priv->pm._irqs_disabled = false; |
287 | intel_power_domains_init_hw(dev_priv); |
1191 | 288 | ||
1192 | ret = drm_irq_install(dev, dev->pdev->irq); |
289 | ret = intel_irq_install(dev_priv); |
Line 1193... | Line 290... | ||
1193 | if (ret) |
290 | if (ret) |
1194 | goto cleanup_gem_stolen; |
291 | goto cleanup_gem_stolen; |
Line 1199... | Line 296... | ||
1199 | 296 | ||
1200 | ret = i915_gem_init(dev); |
297 | ret = i915_gem_init(dev); |
1201 | if (ret) |
298 | if (ret) |
Line 1202... | Line -... | ||
1202 | goto cleanup_irq; |
- | |
1203 | 299 | goto cleanup_irq; |
|
Line 1204... | Line 300... | ||
1204 | 300 | ||
1205 | intel_modeset_gem_init(dev); |
301 | intel_modeset_gem_init(dev); |
1206 | 302 | ||
Line 1213... | Line 309... | ||
1213 | ret = intel_fbdev_init(dev); |
309 | ret = intel_fbdev_init(dev); |
1214 | if (ret) |
310 | if (ret) |
1215 | goto cleanup_gem; |
311 | goto cleanup_gem; |
Line 1216... | Line 312... | ||
1216 | 312 | ||
1217 | /* Only enable hotplug handling once the fbdev is fully set up. */ |
313 | /* Only enable hotplug handling once the fbdev is fully set up. */ |
Line 1218... | Line 314... | ||
1218 | intel_hpd_init(dev); |
314 | intel_hpd_init(dev_priv); |
1219 | 315 | ||
1220 | /* |
316 | /* |
1221 | * Some ports require correctly set-up hpd registers for detection to |
317 | * Some ports require correctly set-up hpd registers for detection to |
Line 1225... | Line 321... | ||
1225 | * only once hotplug handling is enabled, but due to screwed-up locking |
321 | * only once hotplug handling is enabled, but due to screwed-up locking |
1226 | * around kms/fbdev init we can't protect the fdbev initial config |
322 | * around kms/fbdev init we can't protect the fdbev initial config |
1227 | * scanning against hotplug events. Hence do this first and ignore the |
323 | * scanning against hotplug events. Hence do this first and ignore the |
1228 | * tiny window where we will loose hotplug notifactions. |
324 | * tiny window where we will loose hotplug notifactions. |
1229 | */ |
325 | */ |
1230 | intel_fbdev_initial_config(dev); |
326 | intel_fbdev_initial_config(dev_priv, 0); |
Line 1231... | Line 327... | ||
1231 | 327 | ||
Line 1232... | Line 328... | ||
1232 | drm_kms_helper_poll_init(dev); |
328 | drm_kms_helper_poll_init(dev); |
Line 1233... | Line 329... | ||
1233 | 329 | ||
1234 | return 0; |
330 | return 0; |
1235 | 331 | ||
1236 | cleanup_gem: |
332 | cleanup_gem: |
1237 | mutex_lock(&dev->struct_mutex); |
333 | mutex_lock(&dev->struct_mutex); |
1238 | i915_gem_cleanup_ringbuffer(dev); |
- | |
1239 | i915_gem_context_fini(dev); |
334 | i915_gem_cleanup_ringbuffer(dev); |
1240 | mutex_unlock(&dev->struct_mutex); |
335 | i915_gem_context_fini(dev); |
1241 | WARN_ON(dev_priv->mm.aliasing_ppgtt); |
336 | mutex_unlock(&dev->struct_mutex); |
1242 | cleanup_irq: |
337 | cleanup_irq: |
1243 | // drm_irq_uninstall(dev); |
338 | // drm_irq_uninstall(dev); |
Line 1249... | Line 344... | ||
1249 | // vga_client_register(dev->pdev, NULL, NULL, NULL); |
344 | // vga_client_register(dev->pdev, NULL, NULL, NULL); |
1250 | out: |
345 | out: |
1251 | return ret; |
346 | return ret; |
1252 | } |
347 | } |
Line 1253... | Line -... | ||
1253 | - | ||
1254 | - | ||
1255 | 348 | ||
1256 | #if IS_ENABLED(CONFIG_FB) |
349 | #if IS_ENABLED(CONFIG_FB) |
1257 | static int i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv) |
350 | static int i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv) |
1258 | { |
351 | { |
1259 | struct apertures_struct *ap; |
352 | struct apertures_struct *ap; |
Line 1323... | Line 416... | ||
1323 | struct intel_device_info *info; |
416 | struct intel_device_info *info; |
1324 | enum pipe pipe; |
417 | enum pipe pipe; |
Line 1325... | Line 418... | ||
1325 | 418 | ||
Line 1326... | Line 419... | ||
1326 | info = (struct intel_device_info *)&dev_priv->info; |
419 | info = (struct intel_device_info *)&dev_priv->info; |
1327 | 420 | ||
1328 | if (IS_VALLEYVIEW(dev)) |
421 | if (IS_VALLEYVIEW(dev) || INTEL_INFO(dev)->gen == 9) |
1329 | for_each_pipe(pipe) |
422 | for_each_pipe(dev_priv, pipe) |
1330 | info->num_sprites[pipe] = 2; |
423 | info->num_sprites[pipe] = 2; |
1331 | else |
424 | else |
Line 1332... | Line 425... | ||
1332 | for_each_pipe(pipe) |
425 | for_each_pipe(dev_priv, pipe) |
1333 | info->num_sprites[pipe] = 1; |
426 | info->num_sprites[pipe] = 1; |
1334 | 427 | ||
Line 1386... | Line 479... | ||
1386 | return -ENOMEM; |
479 | return -ENOMEM; |
Line 1387... | Line 480... | ||
1387 | 480 | ||
1388 | dev->dev_private = dev_priv; |
481 | dev->dev_private = dev_priv; |
Line 1389... | Line 482... | ||
1389 | dev_priv->dev = dev; |
482 | dev_priv->dev = dev; |
1390 | 483 | ||
- | 484 | /* Setup the write-once "constant" device info */ |
|
1391 | /* copy initial configuration to dev_priv->info */ |
485 | device_info = (struct intel_device_info *)&dev_priv->info; |
Line 1392... | Line 486... | ||
1392 | device_info = (struct intel_device_info *)&dev_priv->info; |
486 | memcpy(device_info, info, sizeof(dev_priv->info)); |
1393 | *device_info = *info; |
487 | device_info->device_id = dev->pdev->device; |
1394 | 488 | ||
1395 | spin_lock_init(&dev_priv->irq_lock); |
489 | spin_lock_init(&dev_priv->irq_lock); |
1396 | spin_lock_init(&dev_priv->gpu_error.lock); |
490 | spin_lock_init(&dev_priv->gpu_error.lock); |
1397 | spin_lock_init(&dev_priv->backlight_lock); |
491 | mutex_init(&dev_priv->backlight_lock); |
1398 | spin_lock_init(&dev_priv->uncore.lock); |
492 | spin_lock_init(&dev_priv->uncore.lock); |
1399 | spin_lock_init(&dev_priv->mm.object_stat_lock); |
493 | spin_lock_init(&dev_priv->mm.object_stat_lock); |
Line 1447... | Line 541... | ||
1447 | 541 | ||
1448 | ret = i915_gem_gtt_init(dev); |
542 | ret = i915_gem_gtt_init(dev); |
1449 | if (ret) |
543 | if (ret) |
Line 1450... | Line -... | ||
1450 | goto out_regs; |
- | |
1451 | - | ||
Line 1452... | Line 544... | ||
1452 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
544 | goto out_regs; |
Line 1453... | Line 545... | ||
1453 | i915_kick_out_firmware_fb(dev_priv); |
545 | |
Line 1493... | Line 585... | ||
1493 | goto out_mtrrfree; |
585 | goto out_mtrrfree; |
1494 | } |
586 | } |
1495 | system_wq = dev_priv->wq; |
587 | system_wq = dev_priv->wq; |
Line 1496... | Line 588... | ||
1496 | 588 | ||
1497 | 589 | ||
Line 1498... | Line 590... | ||
1498 | intel_irq_init(dev); |
590 | intel_irq_init(dev_priv); |
1499 | intel_uncore_sanitize(dev); |
591 | intel_uncore_sanitize(dev); |
1500 | 592 | ||
Line 1533... | Line 625... | ||
1533 | ret = i915_load_modeset_init(dev); |
625 | ret = i915_load_modeset_init(dev); |
1534 | if (ret < 0) { |
626 | if (ret < 0) { |
1535 | DRM_ERROR("failed to init modeset\n"); |
627 | DRM_ERROR("failed to init modeset\n"); |
1536 | goto out_power_well; |
628 | goto out_power_well; |
1537 | } |
629 | } |
1538 | } else { |
- | |
1539 | /* Start out suspended in ums mode. */ |
- | |
1540 | dev_priv->ums.mm_suspended = 1; |
- | |
1541 | } |
630 | } |
Line 1542... | Line 631... | ||
1542 | 631 | ||
1543 | 632 | ||
Line 1547... | Line 636... | ||
1547 | } |
636 | } |
Line 1548... | Line 637... | ||
1548 | 637 | ||
1549 | if (IS_GEN5(dev)) |
638 | if (IS_GEN5(dev)) |
Line 1550... | Line 639... | ||
1550 | intel_gpu_ips_init(dev_priv); |
639 | intel_gpu_ips_init(dev_priv); |
Line 1551... | Line 640... | ||
1551 | 640 | ||
Line 1552... | Line 641... | ||
1552 | intel_init_runtime_pm(dev_priv); |
641 | intel_runtime_pm_enable(dev_priv); |
Line 1578... | Line 667... | ||
1578 | if (ret) { |
667 | if (ret) { |
1579 | DRM_ERROR("failed to idle hardware: %d\n", ret); |
668 | DRM_ERROR("failed to idle hardware: %d\n", ret); |
1580 | return ret; |
669 | return ret; |
1581 | } |
670 | } |
Line 1582... | Line -... | ||
1582 | - | ||
Line 1583... | Line 671... | ||
1583 | intel_fini_runtime_pm(dev_priv); |
671 | |
Line 1584... | Line 672... | ||
1584 | 672 | ||
1585 | intel_gpu_ips_teardown(); |
673 | intel_gpu_ips_teardown(); |
Line 1599... | Line 687... | ||
1599 | arch_phys_wc_del(dev_priv->gtt.mtrr); |
687 | arch_phys_wc_del(dev_priv->gtt.mtrr); |
Line 1600... | Line 688... | ||
1600 | 688 | ||
Line 1601... | Line 689... | ||
1601 | acpi_video_unregister(); |
689 | acpi_video_unregister(); |
1602 | - | ||
1603 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
690 | |
1604 | intel_fbdev_fini(dev); |
- | |
Line 1605... | Line 691... | ||
1605 | intel_modeset_cleanup(dev); |
691 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
1606 | cancel_work_sync(&dev_priv->console_resume_work); |
692 | intel_modeset_cleanup(dev); |
1607 | 693 | ||
1608 | /* |
694 | /* |
Line 1634... | Line 720... | ||
1634 | flush_workqueue(dev_priv->wq); |
720 | flush_workqueue(dev_priv->wq); |
Line 1635... | Line 721... | ||
1635 | 721 | ||
1636 | mutex_lock(&dev->struct_mutex); |
722 | mutex_lock(&dev->struct_mutex); |
1637 | i915_gem_cleanup_ringbuffer(dev); |
723 | i915_gem_cleanup_ringbuffer(dev); |
1638 | i915_gem_context_fini(dev); |
- | |
1639 | WARN_ON(dev_priv->mm.aliasing_ppgtt); |
724 | i915_gem_context_fini(dev); |
1640 | mutex_unlock(&dev->struct_mutex); |
725 | mutex_unlock(&dev->struct_mutex); |
1641 | i915_gem_cleanup_stolen(dev); |
- | |
1642 | - | ||
1643 | if (!I915_NEED_GFX_HWS(dev)) |
- | |
1644 | i915_free_hws(dev); |
726 | i915_gem_cleanup_stolen(dev); |
Line 1645... | Line -... | ||
1645 | } |
- | |
1646 | - | ||
1647 | WARN_ON(!list_empty(&dev_priv->vm_list)); |
- | |
1648 | - | ||
1649 | drm_vblank_cleanup(dev); |
727 | } |
1650 | 728 | ||
Line 1651... | Line 729... | ||
1651 | intel_teardown_gmbus(dev); |
729 | intel_teardown_gmbus(dev); |
1652 | intel_teardown_mchbar(dev); |
730 | intel_teardown_mchbar(dev); |
1653 | 731 | ||
Line 1654... | Line 732... | ||
1654 | destroy_workqueue(dev_priv->dp_wq); |
732 | destroy_workqueue(dev_priv->dp_wq); |
Line 1655... | Line 733... | ||
1655 | destroy_workqueue(dev_priv->wq); |
733 | destroy_workqueue(dev_priv->wq); |
1656 | pm_qos_remove_request(&dev_priv->pm_qos); |
734 | pm_qos_remove_request(&dev_priv->pm_qos); |
1657 | 735 | ||
Line 1695... | Line 773... | ||
1695 | * and DMA structures, since the kernel won't be using them, and clea |
773 | * and DMA structures, since the kernel won't be using them, and clea |
1696 | * up any GEM state. |
774 | * up any GEM state. |
1697 | */ |
775 | */ |
1698 | void i915_driver_lastclose(struct drm_device *dev) |
776 | void i915_driver_lastclose(struct drm_device *dev) |
1699 | { |
777 | { |
1700 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
1701 | - | ||
1702 | /* On gen6+ we refuse to init without kms enabled, but then the drm core |
- | |
1703 | * goes right around and calls lastclose. Check for this and don't clean |
- | |
1704 | * up anything. */ |
- | |
1705 | if (!dev_priv) |
- | |
1706 | return; |
- | |
1707 | - | ||
1708 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
- | |
1709 | intel_fbdev_restore_mode(dev); |
778 | intel_fbdev_restore_mode(dev); |
1710 | vga_switcheroo_process_delayed_switch(); |
779 | vga_switcheroo_process_delayed_switch(); |
1711 | return; |
- | |
1712 | } |
- | |
1713 | - | ||
1714 | i915_gem_lastclose(dev); |
- | |
1715 | - | ||
1716 | i915_dma_cleanup(dev); |
- | |
1717 | } |
780 | } |
Line 1718... | Line 781... | ||
1718 | 781 | ||
1719 | void i915_driver_preclose(struct drm_device *dev, struct drm_file *file) |
782 | void i915_driver_preclose(struct drm_device *dev, struct drm_file *file) |
1720 | { |
783 | { |
1721 | mutex_lock(&dev->struct_mutex); |
784 | mutex_lock(&dev->struct_mutex); |
1722 | i915_gem_context_close(dev, file); |
785 | i915_gem_context_close(dev, file); |
1723 | i915_gem_release(dev, file); |
786 | i915_gem_release(dev, file); |
- | 787 | mutex_unlock(&dev->struct_mutex); |
|
- | 788 | ||
- | 789 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
|
1724 | mutex_unlock(&dev->struct_mutex); |
790 | intel_modeset_preclose(dev, file); |
Line 1725... | Line 791... | ||
1725 | } |
791 | } |
1726 | 792 | ||
1727 | void i915_driver_postclose(struct drm_device *dev, struct drm_file *file) |
793 | void i915_driver_postclose(struct drm_device *dev, struct drm_file *file) |
Line 1732... | Line 798... | ||
1732 | file_priv->bsd_ring = NULL; |
798 | file_priv->bsd_ring = NULL; |
1733 | kfree(file_priv); |
799 | kfree(file_priv); |
1734 | } |
800 | } |
Line 1735... | Line 801... | ||
1735 | 801 | ||
1736 | const struct drm_ioctl_desc i915_ioctls[] = { |
802 | const struct drm_ioctl_desc i915_ioctls[] = { |
1737 | DRM_IOCTL_DEF_DRV(I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
803 | DRM_IOCTL_DEF_DRV(I915_INIT, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1738 | DRM_IOCTL_DEF_DRV(I915_FLUSH, i915_flush_ioctl, DRM_AUTH), |
804 | DRM_IOCTL_DEF_DRV(I915_FLUSH, drm_noop, DRM_AUTH), |
1739 | DRM_IOCTL_DEF_DRV(I915_FLIP, i915_flip_bufs, DRM_AUTH), |
805 | DRM_IOCTL_DEF_DRV(I915_FLIP, drm_noop, DRM_AUTH), |
1740 | DRM_IOCTL_DEF_DRV(I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH), |
806 | DRM_IOCTL_DEF_DRV(I915_BATCHBUFFER, drm_noop, DRM_AUTH), |
1741 | DRM_IOCTL_DEF_DRV(I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH), |
807 | DRM_IOCTL_DEF_DRV(I915_IRQ_EMIT, drm_noop, DRM_AUTH), |
1742 | DRM_IOCTL_DEF_DRV(I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH), |
808 | DRM_IOCTL_DEF_DRV(I915_IRQ_WAIT, drm_noop, DRM_AUTH), |
1743 | DRM_IOCTL_DEF_DRV(I915_GETPARAM, i915_getparam, DRM_AUTH|DRM_RENDER_ALLOW), |
809 | DRM_IOCTL_DEF_DRV(I915_GETPARAM, i915_getparam, DRM_AUTH|DRM_RENDER_ALLOW), |
1744 | DRM_IOCTL_DEF_DRV(I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
810 | DRM_IOCTL_DEF_DRV(I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1745 | DRM_IOCTL_DEF_DRV(I915_ALLOC, drm_noop, DRM_AUTH), |
811 | DRM_IOCTL_DEF_DRV(I915_ALLOC, drm_noop, DRM_AUTH), |
1746 | DRM_IOCTL_DEF_DRV(I915_FREE, drm_noop, DRM_AUTH), |
812 | DRM_IOCTL_DEF_DRV(I915_FREE, drm_noop, DRM_AUTH), |
1747 | DRM_IOCTL_DEF_DRV(I915_INIT_HEAP, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
813 | DRM_IOCTL_DEF_DRV(I915_INIT_HEAP, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1748 | DRM_IOCTL_DEF_DRV(I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH), |
814 | DRM_IOCTL_DEF_DRV(I915_CMDBUFFER, drm_noop, DRM_AUTH), |
1749 | DRM_IOCTL_DEF_DRV(I915_DESTROY_HEAP, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
815 | DRM_IOCTL_DEF_DRV(I915_DESTROY_HEAP, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1750 | DRM_IOCTL_DEF_DRV(I915_SET_VBLANK_PIPE, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
816 | DRM_IOCTL_DEF_DRV(I915_SET_VBLANK_PIPE, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1751 | DRM_IOCTL_DEF_DRV(I915_GET_VBLANK_PIPE, i915_vblank_pipe_get, DRM_AUTH), |
817 | DRM_IOCTL_DEF_DRV(I915_GET_VBLANK_PIPE, drm_noop, DRM_AUTH), |
1752 | DRM_IOCTL_DEF_DRV(I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH), |
818 | DRM_IOCTL_DEF_DRV(I915_VBLANK_SWAP, drm_noop, DRM_AUTH), |
1753 | DRM_IOCTL_DEF_DRV(I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
819 | DRM_IOCTL_DEF_DRV(I915_HWS_ADDR, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1754 | DRM_IOCTL_DEF_DRV(I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
820 | DRM_IOCTL_DEF_DRV(I915_GEM_INIT, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
1755 | DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH|DRM_UNLOCKED), |
821 | DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH|DRM_UNLOCKED), |
1756 | DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW), |
822 | DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW), |
1757 | DRM_IOCTL_DEF_DRV(I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED), |
823 | DRM_IOCTL_DEF_DRV(I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED), |
1758 | DRM_IOCTL_DEF_DRV(I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED), |
824 | DRM_IOCTL_DEF_DRV(I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED), |
1759 | DRM_IOCTL_DEF_DRV(I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW), |
825 | DRM_IOCTL_DEF_DRV(I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW), |
1760 | DRM_IOCTL_DEF_DRV(I915_GEM_SET_CACHING, i915_gem_set_caching_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW), |
826 | DRM_IOCTL_DEF_DRV(I915_GEM_SET_CACHING, i915_gem_set_caching_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW), |
1761 | DRM_IOCTL_DEF_DRV(I915_GEM_GET_CACHING, i915_gem_get_caching_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW), |
827 | DRM_IOCTL_DEF_DRV(I915_GEM_GET_CACHING, i915_gem_get_caching_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW), |
1762 | DRM_IOCTL_DEF_DRV(I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW), |
828 | DRM_IOCTL_DEF_DRV(I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW), |
1763 | DRM_IOCTL_DEF_DRV(I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
829 | DRM_IOCTL_DEF_DRV(I915_GEM_ENTERVT, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
1764 | DRM_IOCTL_DEF_DRV(I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
830 | DRM_IOCTL_DEF_DRV(I915_GEM_LEAVEVT, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
1765 | DRM_IOCTL_DEF_DRV(I915_GEM_CREATE, i915_gem_create_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW), |
831 | DRM_IOCTL_DEF_DRV(I915_GEM_CREATE, i915_gem_create_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW), |
1766 | DRM_IOCTL_DEF_DRV(I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW), |
832 | DRM_IOCTL_DEF_DRV(I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW), |
1767 | DRM_IOCTL_DEF_DRV(I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW), |
833 | DRM_IOCTL_DEF_DRV(I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW), |
1768 | DRM_IOCTL_DEF_DRV(I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW), |
834 | DRM_IOCTL_DEF_DRV(I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW), |
Line 1796... | Line 862... | ||
1796 | int i915_driver_device_is_agp(struct drm_device *dev) |
862 | int i915_driver_device_is_agp(struct drm_device *dev) |
1797 | { |
863 | { |
1798 | return 1; |
864 | return 1; |
1799 | } |
865 | } |
1800 | #endif>>><>>><>>>><>><>><>>>>>><>><>><>><>><>=>=>=>=>>>><>><>><>=>>> |
866 | #endif>>><>> |
1801 | - |