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Line 52... Line 52...
52
 
52
 
53
#define OUT_RING(x) \
53
#define OUT_RING(x) \
Line 54... Line 54...
54
	intel_ring_emit(LP_RING(dev_priv), x)
54
	intel_ring_emit(LP_RING(dev_priv), x)
55
 
55
 
Line 56... Line 56...
56
#define ADVANCE_LP_RING() \
56
#define ADVANCE_LP_RING() \
57
	intel_ring_advance(LP_RING(dev_priv))
57
	__intel_ring_advance(LP_RING(dev_priv))
58
 
58
 
59
/**
59
/**
Line 83... Line 83...
83
void i915_update_dri1_breadcrumb(struct drm_device *dev)
83
void i915_update_dri1_breadcrumb(struct drm_device *dev)
84
{
84
{
85
	drm_i915_private_t *dev_priv = dev->dev_private;
85
	drm_i915_private_t *dev_priv = dev->dev_private;
86
	struct drm_i915_master_private *master_priv;
86
	struct drm_i915_master_private *master_priv;
Line -... Line 87...
-
 
87
 
-
 
88
	/*
-
 
89
	 * The dri breadcrumb update races against the drm master disappearing.
-
 
90
	 * Instead of trying to fix this (this is by far not the only ums issue)
-
 
91
	 * just don't do the update in kms mode.
-
 
92
	 */
-
 
93
	if (drm_core_check_feature(dev, DRIVER_MODESET))
-
 
94
		return;
87
 
95
 
88
	if (dev->primary->master) {
96
	if (dev->primary->master) {
89
		master_priv = dev->primary->master->driver_priv;
97
		master_priv = dev->primary->master->driver_priv;
90
		if (master_priv->sarea_priv)
98
		if (master_priv->sarea_priv)
91
			master_priv->sarea_priv->last_dispatch =
99
			master_priv->sarea_priv->last_dispatch =
Line 645... Line 653...
645
	if (batch->num_cliprects < 0)
653
	if (batch->num_cliprects < 0)
646
		return -EINVAL;
654
		return -EINVAL;
Line 647... Line 655...
647
 
655
 
648
	if (batch->num_cliprects) {
656
	if (batch->num_cliprects) {
649
		cliprects = kcalloc(batch->num_cliprects,
657
		cliprects = kcalloc(batch->num_cliprects,
650
				    sizeof(struct drm_clip_rect),
658
				    sizeof(*cliprects),
651
				    GFP_KERNEL);
659
				    GFP_KERNEL);
652
		if (cliprects == NULL)
660
		if (cliprects == NULL)
Line 653... Line 661...
653
			return -ENOMEM;
661
			return -ENOMEM;
Line 707... Line 715...
707
		goto fail_batch_free;
715
		goto fail_batch_free;
708
	}
716
	}
Line 709... Line 717...
709
 
717
 
710
	if (cmdbuf->num_cliprects) {
718
	if (cmdbuf->num_cliprects) {
711
		cliprects = kcalloc(cmdbuf->num_cliprects,
719
		cliprects = kcalloc(cmdbuf->num_cliprects,
712
				    sizeof(struct drm_clip_rect), GFP_KERNEL);
720
				    sizeof(*cliprects), GFP_KERNEL);
713
		if (cliprects == NULL) {
721
		if (cliprects == NULL) {
714
			ret = -ENOMEM;
722
			ret = -ENOMEM;
715
			goto fail_batch_free;
723
			goto fail_batch_free;
Line 787... Line 795...
787
 
795
 
788
	if (master_priv->sarea_priv)
796
	if (master_priv->sarea_priv)
Line 789... Line 797...
789
		master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
797
		master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
790
 
798
 
791
	if (ring->irq_get(ring)) {
799
	if (ring->irq_get(ring)) {
792
		DRM_WAIT_ON(ret, ring->irq_queue, 3 * DRM_HZ,
800
		DRM_WAIT_ON(ret, ring->irq_queue, 3 * HZ,
793
			    READ_BREADCRUMB(dev_priv) >= irq_nr);
801
			    READ_BREADCRUMB(dev_priv) >= irq_nr);
794
		ring->irq_put(ring);
802
		ring->irq_put(ring);
Line 824... Line 832...
824
 
832
 
825
	mutex_lock(&dev->struct_mutex);
833
	mutex_lock(&dev->struct_mutex);
826
	result = i915_emit_irq(dev);
834
	result = i915_emit_irq(dev);
Line 827... Line 835...
827
	mutex_unlock(&dev->struct_mutex);
835
	mutex_unlock(&dev->struct_mutex);
828
 
836
 
829
	if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
837
	if (copy_to_user(emit->irq_seq, &result, sizeof(int))) {
830
		DRM_ERROR("copy_to_user\n");
838
		DRM_ERROR("copy_to_user\n");
Line 831... Line 839...
831
		return -EFAULT;
839
		return -EFAULT;
Line 1149... Line 1157...
1149
 
1157
 
1150
    ret = intel_parse_bios(dev);
1158
    ret = intel_parse_bios(dev);
1151
    if (ret)
1159
    if (ret)
Line 1152... Line 1160...
1152
        DRM_INFO("failed to find VBIOS tables\n");
1160
        DRM_INFO("failed to find VBIOS tables\n");
Line 1153... Line 1161...
1153
 
1161
 
1154
    fb_obj = kos_gem_fb_object_create(dev,0,12*1024*1024);
1162
    main_fb_obj = kos_gem_fb_object_create(dev,0,16*1024*1024);
1155
 
1163
 
1156
	/* Initialise stolen first so that we may reserve preallocated
1164
	/* Initialise stolen first so that we may reserve preallocated
Line 1162... Line 1170...
1162
 
1170
 
1163
	ret = drm_irq_install(dev);
1171
	ret = drm_irq_install(dev);
1164
	if (ret)
1172
	if (ret)
Line -... Line 1173...
-
 
1173
		goto cleanup_gem_stolen;
-
 
1174
 
1165
		goto cleanup_gem_stolen;
1175
	intel_power_domains_init_hw(dev);
1166
 
1176
 
1167
	/* Important: The output setup functions called by modeset_init need
1177
	/* Important: The output setup functions called by modeset_init need
Line 1168... Line 1178...
1168
	 * working irqs for e.g. gmbus and dp aux transfers. */
1178
	 * working irqs for e.g. gmbus and dp aux transfers. */
1169
    intel_modeset_init(dev);
1179
    intel_modeset_init(dev);
1170
 
1180
 
Line 1171... Line 1181...
1171
	ret = i915_gem_init(dev);
1181
	ret = i915_gem_init(dev);
Line 1172... Line 1182...
1172
    if (ret)
1182
    if (ret)
1173
		goto cleanup_irq;
1183
		goto cleanup_power;
1174
 
1184
 
1175
 
1185
 
-
 
1186
    intel_modeset_gem_init(dev);
1176
    intel_modeset_gem_init(dev);
1187
 
-
 
1188
    /* Always safe in the mode setting case. */
Line 1177... Line 1189...
1177
 
1189
    /* FIXME: do pre/post-mode set stuff in core KMS code */
1178
    /* Always safe in the mode setting case. */
1190
	dev->vblank_disable_allowed = true;
1179
    /* FIXME: do pre/post-mode set stuff in core KMS code */
1191
	if (INTEL_INFO(dev)->num_pipes == 0) {
Line 1211... Line 1223...
1211
	mutex_lock(&dev->struct_mutex);
1223
	mutex_lock(&dev->struct_mutex);
1212
	i915_gem_cleanup_ringbuffer(dev);
1224
	i915_gem_cleanup_ringbuffer(dev);
1213
	i915_gem_context_fini(dev);
1225
	i915_gem_context_fini(dev);
1214
	mutex_unlock(&dev->struct_mutex);
1226
	mutex_unlock(&dev->struct_mutex);
1215
	i915_gem_cleanup_aliasing_ppgtt(dev);
1227
	i915_gem_cleanup_aliasing_ppgtt(dev);
-
 
1228
	drm_mm_takedown(&dev_priv->gtt.base.mm);
1216
cleanup_irq:
1229
cleanup_power:
-
 
1230
	intel_display_power_put(dev, POWER_DOMAIN_VGA);
1217
//	drm_irq_uninstall(dev);
1231
//	drm_irq_uninstall(dev);
1218
cleanup_gem_stolen:
1232
cleanup_gem_stolen:
1219
//	i915_gem_cleanup_stolen(dev);
1233
//	i915_gem_cleanup_stolen(dev);
1220
cleanup_vga_switcheroo:
1234
cleanup_vga_switcheroo:
1221
//	vga_switcheroo_unregister_client(dev->pdev);
1235
//	vga_switcheroo_unregister_client(dev->pdev);
Line 1225... Line 1239...
1225
    return ret;
1239
    return ret;
1226
}
1240
}
Line -... Line 1241...
-
 
1241
 
-
 
1242
 
-
 
1243
 
-
 
1244
#if IS_ENABLED(CONFIG_FB)
-
 
1245
static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
-
 
1246
{
-
 
1247
	struct apertures_struct *ap;
-
 
1248
	struct pci_dev *pdev = dev_priv->dev->pdev;
-
 
1249
	bool primary;
-
 
1250
 
-
 
1251
	ap = alloc_apertures(1);
-
 
1252
	if (!ap)
-
 
1253
		return;
-
 
1254
 
-
 
1255
	ap->ranges[0].base = dev_priv->gtt.mappable_base;
-
 
1256
	ap->ranges[0].size = dev_priv->gtt.mappable_end;
-
 
1257
 
-
 
1258
	primary =
-
 
1259
		pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
-
 
1260
 
-
 
1261
	remove_conflicting_framebuffers(ap, "inteldrmfb", primary);
-
 
1262
 
-
 
1263
	kfree(ap);
-
 
1264
}
-
 
1265
#else
-
 
1266
static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
Line 1227... Line 1267...
1227
 
1267
{
1228
 
1268
}
1229
 
1269
#endif
Line 1266... Line 1306...
1266
	uint32_t aperture_size;
1306
	uint32_t aperture_size;
Line 1267... Line 1307...
1267
 
1307
 
Line 1268... Line 1308...
1268
	info = (struct intel_device_info *) flags;
1308
	info = (struct intel_device_info *) flags;
1269
 
1309
 
1270
 
1310
 
Line 1271... Line 1311...
1271
    dev_priv = kzalloc(sizeof(drm_i915_private_t), GFP_KERNEL);
1311
	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
1272
    if (dev_priv == NULL)
1312
    if (dev_priv == NULL)
1273
        return -ENOMEM;
1313
        return -ENOMEM;
Line 1274... Line 1314...
1274
 
1314
 
1275
    dev->dev_private = (void *)dev_priv;
1315
    dev->dev_private = (void *)dev_priv;
1276
    dev_priv->dev = dev;
1316
    dev_priv->dev = dev;
1277
	dev_priv->info = info;
1317
	dev_priv->info = info;
1278
 
1318
 
1279
	spin_lock_init(&dev_priv->irq_lock);
1319
	spin_lock_init(&dev_priv->irq_lock);
1280
	spin_lock_init(&dev_priv->gpu_error.lock);
-
 
1281
	spin_lock_init(&dev_priv->backlight.lock);
1320
	spin_lock_init(&dev_priv->gpu_error.lock);
Line 1282... Line 1321...
1282
	spin_lock_init(&dev_priv->uncore.lock);
1321
	spin_lock_init(&dev_priv->backlight_lock);
1283
	spin_lock_init(&dev_priv->mm.object_stat_lock);
-
 
-
 
1322
	spin_lock_init(&dev_priv->uncore.lock);
1284
	mutex_init(&dev_priv->dpio_lock);
1323
	spin_lock_init(&dev_priv->mm.object_stat_lock);
1285
	mutex_init(&dev_priv->rps.hw_lock);
-
 
1286
	mutex_init(&dev_priv->modeset_restore_lock);
-
 
1287
 
-
 
1288
	mutex_init(&dev_priv->pc8.lock);
-
 
Line 1289... Line 1324...
1289
	dev_priv->pc8.requirements_met = false;
1324
	mutex_init(&dev_priv->dpio_lock);
Line 1290... Line 1325...
1290
	dev_priv->pc8.gpu_idle = false;
1325
	mutex_init(&dev_priv->modeset_restore_lock);
1291
	dev_priv->pc8.irqs_disabled = false;
1326
 
Line 1328... Line 1363...
1328
		goto put_bridge;
1363
		goto put_bridge;
1329
	}
1364
	}
Line 1330... Line 1365...
1330
 
1365
 
Line 1331... Line -...
1331
	intel_uncore_early_sanitize(dev);
-
 
1332
 
1366
	intel_uncore_early_sanitize(dev);
1333
	if (IS_HASWELL(dev) && (I915_READ(HSW_EDRAM_PRESENT) == 1)) {
-
 
1334
		/* The docs do not explain exactly how the calculation can be
-
 
1335
		 * made. It is somewhat guessable, but for now, it's always
-
 
1336
		 * 128MB.
-
 
1337
		 * NB: We can't write IDICR yet because we do not have gt funcs
1367
 
1338
		 * set up */
-
 
1339
		dev_priv->ellc_size = 128;
1368
	/* This must be called before any calls to HAS_PCH_* */
-
 
1369
	intel_detect_pch(dev);
Line 1340... Line 1370...
1340
		DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
1370
 
1341
	}
1371
	intel_uncore_init(dev);
1342
 
1372
 
Line -... Line 1373...
-
 
1373
	ret = i915_gem_gtt_init(dev);
-
 
1374
	if (ret)
Line 1343... Line 1375...
1343
	ret = i915_gem_gtt_init(dev);
1375
		goto out_regs;
Line 1344... Line 1376...
1344
	if (ret)
1376
 
Line 1361... Line 1393...
1361
	aperture_size = dev_priv->gtt.mappable_end;
1393
	aperture_size = dev_priv->gtt.mappable_end;
Line 1362... Line 1394...
1362
 
1394
 
1363
	dev_priv->gtt.mappable = AllocKernelSpace(8192);
1395
	dev_priv->gtt.mappable = AllocKernelSpace(8192);
1364
	if (dev_priv->gtt.mappable == NULL) {
1396
	if (dev_priv->gtt.mappable == NULL) {
1365
		ret = -EIO;
1397
		ret = -EIO;
1366
		goto out_rmmap;
1398
		goto out_gtt;
Line 1367... Line 1399...
1367
	}
1399
	}
1368
 
1400
 
1369
    /* The i915 workqueue is primarily used for batched retirement of
1401
    /* The i915 workqueue is primarily used for batched retirement of
Line 1385... Line 1417...
1385
		ret = -ENOMEM;
1417
		ret = -ENOMEM;
1386
		goto out_mtrrfree;
1418
		goto out_mtrrfree;
1387
	}
1419
	}
1388
    system_wq = dev_priv->wq;
1420
    system_wq = dev_priv->wq;
Line 1389... Line -...
1389
 
-
 
1390
	/* This must be called before any calls to HAS_PCH_* */
-
 
Line 1391... Line 1421...
1391
	intel_detect_pch(dev);
1421
 
1392
 
-
 
1393
	intel_irq_init(dev);
1422
 
1394
	intel_pm_init(dev);
-
 
Line 1395... Line 1423...
1395
	intel_uncore_sanitize(dev);
1423
	intel_irq_init(dev);
1396
	intel_uncore_init(dev);
1424
	intel_uncore_sanitize(dev);
1397
 
1425
 
1398
    /* Try to make sure MCHBAR is enabled before poking at it */
1426
    /* Try to make sure MCHBAR is enabled before poking at it */
Line 1418... Line 1446...
1418
 
1446
 
1419
	dev_priv->num_plane = 1;
1447
	dev_priv->num_plane = 1;
1420
	if (IS_VALLEYVIEW(dev))
1448
	if (IS_VALLEYVIEW(dev))
Line 1421... Line 1449...
1421
		dev_priv->num_plane = 2;
1449
		dev_priv->num_plane = 2;
-
 
1450
 
-
 
1451
//   if (INTEL_INFO(dev)->num_pipes) {
-
 
1452
//       ret = drm_vblank_init(dev, INTEL_INFO(dev)->num_pipes);
-
 
1453
//       if (ret)
-
 
1454
//           goto out_gem_unload;
1422
 
1455
//   }
Line 1423... Line 1456...
1423
	if (HAS_POWER_WELL(dev))
1456
 
1424
		i915_init_power_well(dev);
1457
	intel_power_domains_init(dev);
1425
 
1458
 
1426
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1459
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1427
    ret = i915_load_modeset_init(dev);
1460
    ret = i915_load_modeset_init(dev);
1428
    if (ret < 0) {
1461
    if (ret < 0) {
1429
        DRM_ERROR("failed to init modeset\n");
1462
        DRM_ERROR("failed to init modeset\n");
1430
            goto out_gem_unload;
1463
			goto out_power_well;
1431
    }
1464
    }
1432
	} else {
1465
	} else {
Line 1442... Line 1475...
1442
	}
1475
	}
Line 1443... Line 1476...
1443
 
1476
 
1444
	if (IS_GEN5(dev))
1477
	if (IS_GEN5(dev))
Line -... Line 1478...
-
 
1478
		intel_gpu_ips_init(dev_priv);
-
 
1479
 
1445
		intel_gpu_ips_init(dev_priv);
1480
	intel_init_runtime_pm(dev_priv);
Line 1446... Line 1481...
1446
 
1481
 
Line -... Line 1482...
-
 
1482
    main_device = dev;
1447
    main_device = dev;
1483
 
1448
 
-
 
1449
    return 0;
-
 
1450
 
-
 
1451
out_gem_unload:
-
 
1452
//    if (dev_priv->mm.inactive_shrinker.shrink)
-
 
Line 1453... Line -...
1453
//        unregister_shrinker(&dev_priv->mm.inactive_shrinker);
-
 
1454
 
-
 
1455
//    if (dev->pdev->msi_enabled)
-
 
1456
//        pci_disable_msi(dev->pdev);
1484
    return 0;
1457
 
-
 
1458
//    intel_teardown_gmbus(dev);
-
 
1459
//    intel_teardown_mchbar(dev);
1485
 
1460
//    destroy_workqueue(dev_priv->wq);
1486
out_power_well:
1461
out_mtrrfree:
-
 
1462
//	arch_phys_wc_del(dev_priv->mm.gtt_mtrr);
1487
out_gem_unload:
1463
//	io_mapping_free(dev_priv->gtt.mappable);
-
 
1464
//	dev_priv->gtt.gtt_remove(dev);
1488
 
1465
out_rmmap:
1489
out_mtrrfree:
1466
    pci_iounmap(dev->pdev, dev_priv->regs);
1490
out_gtt:
1467
put_bridge:
1491
out_regs:
Line 1476... Line 1500...
1476
int i915_driver_unload(struct drm_device *dev)
1500
int i915_driver_unload(struct drm_device *dev)
1477
{
1501
{
1478
	struct drm_i915_private *dev_priv = dev->dev_private;
1502
	struct drm_i915_private *dev_priv = dev->dev_private;
1479
	int ret;
1503
	int ret;
Line -... Line 1504...
-
 
1504
 
-
 
1505
	ret = i915_gem_suspend(dev);
-
 
1506
	if (ret) {
-
 
1507
		DRM_ERROR("failed to idle hardware: %d\n", ret);
-
 
1508
		return ret;
-
 
1509
	}
-
 
1510
 
-
 
1511
	intel_fini_runtime_pm(dev_priv);
1480
 
1512
 
Line 1481... Line -...
1481
	intel_gpu_ips_teardown();
-
 
1482
 
1513
	intel_gpu_ips_teardown();
1483
	if (HAS_POWER_WELL(dev)) {
1514
 
1484
		/* The i915.ko module is still not prepared to be loaded when
1515
		/* The i915.ko module is still not prepared to be loaded when
1485
		 * the power well is not enabled, so just enable it in case
1516
		 * the power well is not enabled, so just enable it in case
1486
		 * we're going to unload/reload. */
1517
		 * we're going to unload/reload. */
1487
		intel_set_power_well(dev, true);
-
 
Line 1488... Line 1518...
1488
		i915_remove_power_well(dev);
1518
	intel_display_set_init_power(dev, true);
Line 1489... Line 1519...
1489
	}
1519
	intel_power_domains_remove(dev);
1490
 
1520
 
Line 1491... Line -...
1491
	i915_teardown_sysfs(dev);
-
 
1492
 
-
 
1493
	if (dev_priv->mm.inactive_shrinker.scan_objects)
-
 
1494
		unregister_shrinker(&dev_priv->mm.inactive_shrinker);
-
 
1495
 
-
 
1496
	mutex_lock(&dev->struct_mutex);
-
 
1497
	ret = i915_gpu_idle(dev);
-
 
1498
	if (ret)
-
 
1499
		DRM_ERROR("failed to idle hardware: %d\n", ret);
-
 
1500
	i915_gem_retire_requests(dev);
-
 
1501
	mutex_unlock(&dev->struct_mutex);
1521
	i915_teardown_sysfs(dev);
1502
 
1522
 
Line 1503... Line 1523...
1503
	/* Cancel the retire work handler, which should be idle now. */
1523
	if (dev_priv->mm.inactive_shrinker.scan_objects)
Line 1555... Line 1575...
1555
			i915_free_hws(dev);
1575
			i915_free_hws(dev);
1556
	}
1576
	}
Line 1557... Line 1577...
1557
 
1577
 
1558
	list_del(&dev_priv->gtt.base.global_link);
1578
	list_del(&dev_priv->gtt.base.global_link);
-
 
1579
	WARN_ON(!list_empty(&dev_priv->vm_list));
1559
	WARN_ON(!list_empty(&dev_priv->vm_list));
1580
 
1560
	drm_mm_takedown(&dev_priv->gtt.base.mm);
-
 
1561
	if (dev_priv->regs != NULL)
-
 
Line 1562... Line 1581...
1562
		pci_iounmap(dev->pdev, dev_priv->regs);
1581
	drm_vblank_cleanup(dev);
1563
 
1582
 
Line 1564... Line 1583...
1564
	intel_teardown_gmbus(dev);
1583
	intel_teardown_gmbus(dev);
1565
	intel_teardown_mchbar(dev);
1584
	intel_teardown_mchbar(dev);
Line 1566... Line 1585...
1566
 
1585
 
Line -... Line 1586...
-
 
1586
	destroy_workqueue(dev_priv->wq);
-
 
1587
	pm_qos_remove_request(&dev_priv->pm_qos);
-
 
1588
 
-
 
1589
	dev_priv->gtt.base.cleanup(&dev_priv->gtt.base);
1567
	destroy_workqueue(dev_priv->wq);
1590
 
1568
	pm_qos_remove_request(&dev_priv->pm_qos);
1591
	intel_uncore_fini(dev);
Line 1569... Line 1592...
1569
 
1592
	if (dev_priv->regs != NULL)
1570
	dev_priv->gtt.base.cleanup(&dev_priv->gtt.base);
1593
		pci_iounmap(dev->pdev, dev_priv->regs);
Line 1620... Line 1643...
1620
	 * up anything. */
1643
	 * up anything. */
1621
	if (!dev_priv)
1644
	if (!dev_priv)
1622
		return;
1645
		return;
Line 1623... Line 1646...
1623
 
1646
 
1624
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1647
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1625
		intel_fb_restore_mode(dev);
1648
		intel_fbdev_restore_mode(dev);
1626
		vga_switcheroo_process_delayed_switch();
1649
		vga_switcheroo_process_delayed_switch();
1627
		return;
1650
		return;
Line 1628... Line 1651...
1628
	}
1651
	}
Line 1632... Line 1655...
1632
	i915_dma_cleanup(dev);
1655
	i915_dma_cleanup(dev);
1633
}
1656
}
Line 1634... Line 1657...
1634
 
1657
 
1635
void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
1658
void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
-
 
1659
{
1636
{
1660
	mutex_lock(&dev->struct_mutex);
1637
	i915_gem_context_close(dev, file_priv);
1661
	i915_gem_context_close(dev, file_priv);
-
 
1662
	i915_gem_release(dev, file_priv);
1638
	i915_gem_release(dev, file_priv);
1663
	mutex_unlock(&dev->struct_mutex);
Line 1639... Line 1664...
1639
}
1664
}
1640
 
1665
 
1641
void i915_driver_postclose(struct drm_device *dev, struct drm_file *file)
1666
void i915_driver_postclose(struct drm_device *dev, struct drm_file *file)
Line 1692... Line 1717...
1692
	DRM_IOCTL_DEF_DRV(I915_GET_SPRITE_COLORKEY, intel_sprite_get_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
1717
	DRM_IOCTL_DEF_DRV(I915_GET_SPRITE_COLORKEY, intel_sprite_get_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
1693
	DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
1718
	DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
1694
	DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_CREATE, i915_gem_context_create_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
1719
	DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_CREATE, i915_gem_context_create_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
1695
	DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_DESTROY, i915_gem_context_destroy_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
1720
	DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_DESTROY, i915_gem_context_destroy_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
1696
	DRM_IOCTL_DEF_DRV(I915_REG_READ, i915_reg_read_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
1721
	DRM_IOCTL_DEF_DRV(I915_REG_READ, i915_reg_read_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-
 
1722
	DRM_IOCTL_DEF_DRV(I915_GET_RESET_STATS, i915_get_reset_stats_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
1697
};
1723
};
Line 1698... Line 1724...
1698
 
1724
 
Line 1699... Line 1725...
1699
int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
1725
int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
Line 1707... Line 1733...
1707
{
1733
{
1708
	return 1;
1734
	return 1;
1709
}
1735
}
1710
#endif
1736
#endif
Line 1711... Line -...
1711
-